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Add PowerPC64 ELFv2 tests.
* ld-powerpc/elfv2.s, * ld-powerpc/elfv2so.d, * ld-powerpc/elfv2exe.d: New tests. * ld-powerpc/powerpc.exp: Run them.
This commit is contained in:
Alan Modra
parent
e8910a83af
commit
d4a95d4999
@ -1,3 +1,10 @@
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2013-10-30 Alan Modra <amodra@gmail.com>
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* ld-powerpc/elfv2.s,
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* ld-powerpc/elfv2so.d,
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* ld-powerpc/elfv2exe.d: New tests.
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* ld-powerpc/powerpc.exp: Run them.
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2013-10-30 Alan Modra <amodra@gmail.com>
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* ld-powerpc/tls.s: Add proper .opd entry for _start.
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32
ld/testsuite/ld-powerpc/elfv2.s
Normal file
32
ld/testsuite/ld-powerpc/elfv2.s
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@ -0,0 +1,32 @@
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.section .toc,"aw",@progbits
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.L0:
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.quad x
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.data
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x:
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.quad f1
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.globl f1
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.type f1,@function
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.text
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f1:
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addis 2,12,.TOC.-f1@ha
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addi 2,2,.TOC.-f1@l
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.localentry f1,.-f1
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mflr 0
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stdu 1,-32(1)
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std 0,48(1)
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bl f1
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ld 3,.L0@toc(2)
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bl f2
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nop
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ld 3,x@got(2)
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bl f3
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nop
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bl f4
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nop
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ld 0,48(1)
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addi 1,1,32
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mtlr 0
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blr
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.size f1,.-f1
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40
ld/testsuite/ld-powerpc/elfv2exe.d
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40
ld/testsuite/ld-powerpc/elfv2exe.d
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@ -0,0 +1,40 @@
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#source: elfv2.s
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#as: -a64
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#ld: -melf64ppc --defsym f2=0x1234 --defsym f3=0x10008888 --defsym f4=0x1200000 --defsym _start=f1
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#objdump: -dr
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.*
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Disassembly of section \.text:
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0+100000c0 <.*\.plt_branch\.f2>:
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.*: (ff ff 62 3d|3d 62 ff ff) addis r11,r2,-1
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.*: (f0 7f 8b e9|e9 8b 7f f0) ld r12,32752\(r11\)
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.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
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.*: (20 04 80 4e|4e 80 04 20) bctr
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0+100000d0 <.*\.plt_branch\.f4>:
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.*: (ff ff 62 3d|3d 62 ff ff) addis r11,r2,-1
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.*: (f8 7f 8b e9|e9 8b 7f f8) ld r12,32760\(r11\)
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.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
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.*: (20 04 80 4e|4e 80 04 20) bctr
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0+100000e0 <_start>:
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.*: (02 00 4c 3c|3c 4c 00 02) addis r2,r12,2
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.*: (60 80 42 38|38 42 80 60) addi r2,r2,-32672
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.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
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.*: (e1 ff 21 f8|f8 21 ff e1) stdu r1,-32\(r1\)
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.*: (30 00 01 f8|f8 01 00 30) std r0,48\(r1\)
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.*: (f5 ff ff 4b|4b ff ff f5) bl .* <_start\+0x8>
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.*: (08 80 62 e8|e8 62 80 08) ld r3,-32760\(r2\)
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.*: (c5 ff ff 4b|4b ff ff c5) bl .*\.plt_branch\.f2>
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.*: (00 00 00 60|60 00 00 00) nop
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.*: (10 80 62 e8|e8 62 80 10) ld r3,-32752\(r2\)
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.*: (81 87 00 48|48 00 87 81) bl 10008888 <f3>
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.*: (00 00 00 60|60 00 00 00) nop
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.*: (c1 ff ff 4b|4b ff ff c1) bl .*\.plt_branch\.f4>
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.*: (00 00 00 60|60 00 00 00) nop
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.*: (30 00 01 e8|e8 01 00 30) ld r0,48\(r1\)
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.*: (20 00 21 38|38 21 00 20) addi r1,r1,32
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.*: (a6 03 08 7c|7c 08 03 a6) mtlr r0
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.*: (20 00 80 4e|4e 80 00 20) blr
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82
ld/testsuite/ld-powerpc/elfv2so.d
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82
ld/testsuite/ld-powerpc/elfv2so.d
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@ -0,0 +1,82 @@
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#source: elfv2.s
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#as: -a64
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#ld: -melf64ppc -shared
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#objdump: -dr
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.*
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Disassembly of section \.text:
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0+300 <.*\.plt_call\.f4>:
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.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
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.*: (38 80 82 e9|e9 82 80 38) ld r12,-32712\(r2\)
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.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
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.*: (20 04 80 4e|4e 80 04 20) bctr
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0+310 <.*\.plt_call\.f3>:
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.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
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.*: (28 80 82 e9|e9 82 80 28) ld r12,-32728\(r2\)
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.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
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.*: (20 04 80 4e|4e 80 04 20) bctr
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0+320 <.*\.plt_call\.f2>:
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.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
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.*: (30 80 82 e9|e9 82 80 30) ld r12,-32720\(r2\)
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.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
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.*: (20 04 80 4e|4e 80 04 20) bctr
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0+330 <.*\.plt_call\.f1>:
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.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
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.*: (40 80 82 e9|e9 82 80 40) ld r12,-32704\(r2\)
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.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
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.*: (20 04 80 4e|4e 80 04 20) bctr
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0+340 <f1>:
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.*: (02 00 4c 3c|3c 4c 00 02) addis r2,r12,2
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.*: (e0 81 42 38|38 42 81 e0) addi r2,r2,-32288
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.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
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.*: (e1 ff 21 f8|f8 21 ff e1) stdu r1,-32\(r1\)
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.*: (30 00 01 f8|f8 01 00 30) std r0,48\(r1\)
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.*: (dd ff ff 4b|4b ff ff dd) bl .*\.plt_call\.f1>
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.*: (08 80 62 e8|e8 62 80 08) ld r3,-32760\(r2\)
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.*: (c5 ff ff 4b|4b ff ff c5) bl .*\.plt_call\.f2>
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.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\)
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.*: (10 80 62 e8|e8 62 80 10) ld r3,-32752\(r2\)
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.*: (a9 ff ff 4b|4b ff ff a9) bl .*\.plt_call\.f3>
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.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\)
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.*: (91 ff ff 4b|4b ff ff 91) bl .*\.plt_call\.f4>
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.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\)
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.*: (30 00 01 e8|e8 01 00 30) ld r0,48\(r1\)
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.*: (20 00 21 38|38 21 00 20) addi r1,r1,32
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.*: (a6 03 08 7c|7c 08 03 a6) mtlr r0
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.*: (20 00 80 4e|4e 80 00 20) blr
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.*: (a0 01 01 00|00 00 00 00) .*
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.*: (00 00 00 00|00 01 01 a0) .*
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0+390 <__glink_PLTresolve>:
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.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
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.*: (05 00 9f 42|42 9f 00 05) bcl .*
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.*: (a6 02 68 7d|7d 68 02 a6) mflr r11
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.*: (f0 ff 4b e8|e8 4b ff f0) ld r2,-16\(r11\)
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.*: (a6 03 08 7c|7c 08 03 a6) mtlr r0
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.*: (50 60 8b 7d|7d 8b 60 50) subf r12,r11,r12
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.*: (14 5a 62 7d|7d 62 5a 14) add r11,r2,r11
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.*: (d0 ff 0c 38|38 0c ff d0) addi r0,r12,-48
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.*: (00 00 8b e9|e9 8b 00 00) ld r12,0\(r11\)
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.*: (82 f0 00 78|78 00 f0 82) rldicl r0,r0,62,2
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.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
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.*: (08 00 6b e9|e9 6b 00 08) ld r11,8\(r11\)
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.*: (20 04 80 4e|4e 80 04 20) bctr
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.*: (00 00 00 60|60 00 00 00) nop
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.* <f3@plt>:
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.*: (c8 ff ff 4b|4b ff ff c8) b .* <__glink_PLTresolve>
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.* <f2@plt>:
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.*: (c4 ff ff 4b|4b ff ff c4) b .* <__glink_PLTresolve>
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.* <f4@plt>:
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.*: (c0 ff ff 4b|4b ff ff c0) b .* <__glink_PLTresolve>
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.* <f1@plt>:
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.*: (bc ff ff 4b|4b ff ff bc) b .* <__glink_PLTresolve>
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@ -269,6 +269,8 @@ run_ld_link_tests $ppcelftests
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if [ supports_ppc64 ] then {
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run_ld_link_tests $ppc64elftests
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run_dump_test "relbrlt"
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run_dump_test "elfv2so"
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run_dump_test "elfv2exe"
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}
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if { [istarget "powerpc*-eabi*"] } {
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