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aarch64: Make indexed_za use 64-bit immediates
A later patch moves the range checking for ZA vector select offsets from gas to libopcodes. That in turn requires the immediate field to be big enough to support all parsed values. This shouldn't be a particularly size-sensitive structure, so there should be no memory problems with doing this.
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@ -1115,7 +1115,7 @@ struct aarch64_indexed_za
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struct
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{
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int regno; /* <Wv> */
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int imm; /* <imm> */
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int64_t imm; /* <imm> */
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} index;
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unsigned v : 1; /* <HV> horizontal or vertical vector indicator. */
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};
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@ -3560,7 +3560,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
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opnd->indexed_za.v == 1 ? 'v' : 'h',
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aarch64_get_qualifier_name (opnd->qualifier)),
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style_reg (styler, "w%d", opnd->indexed_za.index.regno),
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style_imm (styler, "%d", opnd->indexed_za.index.imm),
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style_imm (styler, "%" PRIi64, opnd->indexed_za.index.imm),
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opnd->type == AARCH64_OPND_SME_ZA_HV_idx_ldstr ? "}" : "");
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break;
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@ -3572,7 +3572,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
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snprintf (buf, size, "%s[%s, %s]",
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style_reg (styler, "za"),
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style_reg (styler, "w%d", opnd->indexed_za.index.regno),
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style_imm (styler, "%d", opnd->indexed_za.index.imm));
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style_imm (styler, "%" PRIi64, opnd->indexed_za.index.imm));
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break;
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case AARCH64_OPND_SME_SM_ZA:
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@ -3585,7 +3585,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
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style_reg (styler, "p%d.%s", opnd->indexed_za.regno,
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aarch64_get_qualifier_name (opnd->qualifier)),
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style_reg (styler, "w%d", opnd->indexed_za.index.regno),
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style_imm (styler, "%d", opnd->indexed_za.index.imm));
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style_imm (styler, "%" PRIi64, opnd->indexed_za.index.imm));
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break;
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case AARCH64_OPND_CRn:
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