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Use aarch64_decode_insn in aarch64_displaced_step_copy_insn

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gdb:

2015-11-05  Yao Qi  <yao.qi@linaro.org>

	* aarch64-tdep.c (aarch64_displaced_step_copy_insn): Call
	aarch64_decode_insn and decode instruction by aarch64_inst.
This commit is contained in:
Yao Qi 2015-11-05 09:44:32 +00:00
parent d9ebcbce29
commit c86a40c6c2
2 changed files with 10 additions and 1 deletions
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5
gdb/ChangeLog
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@ -1,3 +1,8 @@
2015-11-05 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_displaced_step_copy_insn): Call
aarch64_decode_insn and decode instruction by aarch64_inst.
2015-11-05 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (extract_signed_bitfield): Remove.

6
gdb/aarch64-tdep.c
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@ -2500,9 +2500,13 @@ aarch64_displaced_step_copy_insn (struct gdbarch *gdbarch,
enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
uint32_t insn = read_memory_unsigned_integer (from, 4, byte_order_for_code);
struct aarch64_displaced_step_data dsd;
aarch64_inst inst;
if (aarch64_decode_insn (insn, &inst, 1) != 0)
return NULL;
/* Look for a Load Exclusive instruction which begins the sequence. */
if (decode_masked_match (insn, 0x3fc00000, 0x08400000))
if (inst.opcode->iclass == ldstexcl && bit (insn, 22))
{
/* We can't displaced step atomic sequences. */
return NULL;