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* config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE) (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE) (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE) (ISA_SUPPORTS_VIRT64_ASE): Delete. (mips_ase): New structure. (mips_ases): New table. (FP64_ASES): New macro. (mips_ase_groups): New array. (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase) (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New functions. (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags. (md_parse_option): Use mips_ases and mips_set_ase instead of separate case statements for each ASE option. (mips_after_parse_args): Use FP64_ASES. Use mips_check_isa_supports_ases to check the ASEs against other options. (s_mipsset): Use mips_ases and mips_set_ase instead of separate if statements for each ASE option. Use mips_check_isa_supports_ases, even when a non-ASE option is specified. gas/testsuite/ * gas/mips/ase-errors-1.s, gas/mips/ase-errors-1.l, gas/mips/ase-errors-2.s, gas/mips/ase-errors-2.l, gas/mips/ase-errors-3.s, gas/mips/ase-errors-3.l, gas/mips/ase-errors-4.s, gas/mips/ase-errors-4.l: New tests. * gas/mips/mips.exp: Run them.
This commit is contained in:
Richard Sandiford
parent
b9eead841d
commit
c62781705e
@ -1,3 +1,27 @@
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2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
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* config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
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(ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
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(ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
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(ISA_SUPPORTS_VIRT64_ASE): Delete.
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(mips_ase): New structure.
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(mips_ases): New table.
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(FP64_ASES): New macro.
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(mips_ase_groups): New array.
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(mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
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(mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
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functions.
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(is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
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(md_parse_option): Use mips_ases and mips_set_ase instead of
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separate case statements for each ASE option.
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(mips_after_parse_args): Use FP64_ASES. Use
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mips_check_isa_supports_ases to check the ASEs against
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other options.
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(s_mipsset): Use mips_ases and mips_set_ase instead of
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separate if statements for each ASE option. Use
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mips_check_isa_supports_ases, even when a non-ASE option
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is specified.
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2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
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* config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
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@ -330,38 +330,6 @@ static int file_ase_micromips;
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|| ((EXPR)->X_op == O_symbol && (EXPR)->X_add_number == 0))
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#endif
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#define ISA_SUPPORTS_SMARTMIPS (mips_opts.isa == ISA_MIPS32 \
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|| mips_opts.isa == ISA_MIPS32R2)
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#define ISA_SUPPORTS_DSP_ASE (mips_opts.isa == ISA_MIPS32R2 \
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|| mips_opts.isa == ISA_MIPS64R2 \
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|| mips_opts.micromips)
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#define ISA_SUPPORTS_DSP64_ASE (mips_opts.isa == ISA_MIPS64R2)
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#define ISA_SUPPORTS_DSPR2_ASE (mips_opts.isa == ISA_MIPS32R2 \
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|| mips_opts.isa == ISA_MIPS64R2 \
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|| mips_opts.micromips)
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#define ISA_SUPPORTS_EVA_ASE (mips_opts.isa == ISA_MIPS32R2 \
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|| mips_opts.isa == ISA_MIPS64R2 \
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|| mips_opts.micromips)
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#define ISA_SUPPORTS_MT_ASE (mips_opts.isa == ISA_MIPS32R2 \
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|| mips_opts.isa == ISA_MIPS64R2)
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#define ISA_SUPPORTS_MCU_ASE (mips_opts.isa == ISA_MIPS32R2 \
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|| mips_opts.isa == ISA_MIPS64R2 \
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|| mips_opts.micromips)
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#define ISA_SUPPORTS_VIRT_ASE (mips_opts.isa == ISA_MIPS32R2 \
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|| mips_opts.isa == ISA_MIPS64R2 \
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|| mips_opts.micromips)
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#define ISA_SUPPORTS_VIRT64_ASE (mips_opts.isa == ISA_MIPS64R2 \
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|| (mips_opts.micromips \
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&& ISA_HAS_64BIT_REGS (mips_opts.isa)))
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/* The argument of the -march= flag. The architecture we are assembling. */
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static int file_mips_arch = CPU_UNKNOWN;
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static const char *mips_arch_string;
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@ -1603,6 +1571,84 @@ struct option md_longopts[] =
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};
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size_t md_longopts_size = sizeof (md_longopts);
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/* Information about either an Application Specific Extension or an
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optional architecture feature that, for simplicity, we treat in the
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same way as an ASE. */
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struct mips_ase
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{
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/* The name of the ASE, used in both the command-line and .set options. */
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const char *name;
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/* The associated ASE_* flags. If the ASE is available on both 32-bit
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and 64-bit architectures, the flags here refer to the subset that
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is available on both. */
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unsigned int flags;
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/* The ASE_* flag used for instructions that are available on 64-bit
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architectures but that are not included in FLAGS. */
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unsigned int flags64;
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/* The command-line options that turn the ASE on and off. */
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int option_on;
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int option_off;
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/* The minimum required architecture revisions for MIPS32, MIPS64,
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microMIPS32 and microMIPS64, or -1 if the extension isn't supported. */
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int mips32_rev;
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int mips64_rev;
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int micromips32_rev;
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int micromips64_rev;
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};
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/* A table of all supported ASEs. */
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static const struct mips_ase mips_ases[] = {
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{ "dsp", ASE_DSP, ASE_DSP64,
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OPTION_DSP, OPTION_NO_DSP,
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2, 2, 2, 2 },
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{ "dspr2", ASE_DSP | ASE_DSPR2, 0,
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OPTION_DSPR2, OPTION_NO_DSPR2,
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2, 2, 2, 2 },
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{ "eva", ASE_EVA, 0,
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OPTION_EVA, OPTION_NO_EVA,
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2, 2, 2, 2 },
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{ "mcu", ASE_MCU, 0,
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OPTION_MCU, OPTION_NO_MCU,
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2, 2, 2, 2 },
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/* Deprecated in MIPS64r5, but we don't implement that yet. */
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{ "mdmx", ASE_MDMX, 0,
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OPTION_MDMX, OPTION_NO_MDMX,
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-1, 1, -1, -1 },
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/* Requires 64-bit FPRs, so the minimum MIPS32 revision is 2. */
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{ "mips3d", ASE_MIPS3D, 0,
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OPTION_MIPS3D, OPTION_NO_MIPS3D,
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2, 1, -1, -1 },
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{ "mt", ASE_MT, 0,
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OPTION_MT, OPTION_NO_MT,
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2, 2, -1, -1 },
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{ "smartmips", ASE_SMARTMIPS, 0,
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OPTION_SMARTMIPS, OPTION_NO_SMARTMIPS,
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1, -1, -1, -1 },
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{ "virt", ASE_VIRT, ASE_VIRT64,
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OPTION_VIRT, OPTION_NO_VIRT,
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2, 2, 2, 2 }
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};
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/* The set of ASEs that require -mfp64. */
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#define FP64_ASES (ASE_MIPS3D | ASE_MDMX)
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/* Groups of ASE_* flags that represent different revisions of an ASE. */
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static const unsigned int mips_ase_groups[] = {
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ASE_DSP | ASE_DSPR2
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};
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/* Pseudo-op table.
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The following pseudo-ops from the Kane and Heinrich MIPS book
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@ -1842,6 +1888,119 @@ mips_target_format (void)
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}
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}
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/* Return the ISA revision that is currently in use, or 0 if we are
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generating code for MIPS V or below. */
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static int
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mips_isa_rev (void)
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{
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if (mips_opts.isa == ISA_MIPS32R2 || mips_opts.isa == ISA_MIPS64R2)
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return 2;
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/* microMIPS implies revision 2 or above. */
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if (mips_opts.micromips)
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return 2;
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if (mips_opts.isa == ISA_MIPS32 || mips_opts.isa == ISA_MIPS64)
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return 1;
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return 0;
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}
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/* Return the mask of all ASEs that are revisions of those in FLAGS. */
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static unsigned int
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mips_ase_mask (unsigned int flags)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE (mips_ase_groups); i++)
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if (flags & mips_ase_groups[i])
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flags |= mips_ase_groups[i];
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return flags;
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}
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/* Check whether the current ISA supports ASE. Issue a warning if
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appropriate. */
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static void
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mips_check_isa_supports_ase (const struct mips_ase *ase)
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{
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const char *base;
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int min_rev, size;
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static unsigned int warned_isa;
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static unsigned int warned_fp32;
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if (ISA_HAS_64BIT_REGS (mips_opts.isa))
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min_rev = mips_opts.micromips ? ase->micromips64_rev : ase->mips64_rev;
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else
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min_rev = mips_opts.micromips ? ase->micromips32_rev : ase->mips32_rev;
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if ((min_rev < 0 || mips_isa_rev () < min_rev)
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&& (warned_isa & ase->flags) != ase->flags)
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{
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warned_isa |= ase->flags;
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base = mips_opts.micromips ? "microMIPS" : "MIPS";
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size = ISA_HAS_64BIT_REGS (mips_opts.isa) ? 64 : 32;
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if (min_rev < 0)
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as_warn (_("The %d-bit %s architecture does not support the"
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" `%s' extension"), size, base, ase->name);
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else
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as_warn (_("The `%s' extension requires %s%d revision %d or greater"),
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ase->name, base, size, min_rev);
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}
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if ((ase->flags & FP64_ASES)
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&& mips_opts.fp32
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&& (warned_fp32 & ase->flags) != ase->flags)
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{
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warned_fp32 |= ase->flags;
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as_warn (_("The `%s' extension requires 64-bit FPRs"), ase->name);
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}
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}
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/* Check all enabled ASEs to see whether they are supported by the
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chosen architecture. */
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static void
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mips_check_isa_supports_ases (void)
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{
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unsigned int i, mask;
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for (i = 0; i < ARRAY_SIZE (mips_ases); i++)
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{
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mask = mips_ase_mask (mips_ases[i].flags);
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if ((mips_opts.ase & mask) == mips_ases[i].flags)
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mips_check_isa_supports_ase (&mips_ases[i]);
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}
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}
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/* Set the state of ASE to ENABLED_P. Return the mask of ASE_* flags
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that were affected. */
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static unsigned int
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mips_set_ase (const struct mips_ase *ase, bfd_boolean enabled_p)
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{
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unsigned int mask;
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mask = mips_ase_mask (ase->flags);
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mips_opts.ase &= ~mask;
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if (enabled_p)
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mips_opts.ase |= ase->flags;
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return mask;
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}
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/* Return the ASE called NAME, or null if none. */
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static const struct mips_ase *
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mips_lookup_ase (const char *name)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE (mips_ases); i++)
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if (strcmp (name, mips_ases[i].name) == 0)
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return &mips_ases[i];
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return NULL;
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}
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/* Return the length of a microMIPS instruction in bytes. If bits of
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the mask beyond the low 16 are 0, then it is a 16-bit instruction.
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Otherwise assume a 32-bit instruction; 48-bit instructions (0x1f
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@ -2446,11 +2605,12 @@ is_opcode_valid (const struct mips_opcode *mo)
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int isa = mips_opts.isa;
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int ase = mips_opts.ase;
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int fp_s, fp_d;
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unsigned int i;
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if ((ase & ASE_DSP) && ISA_SUPPORTS_DSP64_ASE)
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ase |= ASE_DSP64;
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if ((ase & ASE_VIRT) && ISA_SUPPORTS_VIRT64_ASE)
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ase |= ASE_VIRT64;
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if (ISA_HAS_64BIT_REGS (mips_opts.isa))
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for (i = 0; i < ARRAY_SIZE (mips_ases); i++)
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if ((ase & mips_ases[i].flags) == mips_ases[i].flags)
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ase |= mips_ases[i].flags64;
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if (!opcode_is_member (mo, isa, ase, mips_opts.arch))
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return FALSE;
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@ -14872,6 +15032,16 @@ mips_set_option_string (const char **string_ptr, const char *new_value)
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int
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md_parse_option (int c, char *arg)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE (mips_ases); i++)
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if (c == mips_ases[i].option_on || c == mips_ases[i].option_off)
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{
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file_ase_explicit |= mips_set_ase (&mips_ases[i],
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c == mips_ases[i].option_on);
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return 1;
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}
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switch (c)
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{
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case OPTION_CONSTRUCT_FLOATS:
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@ -14992,63 +15162,6 @@ md_parse_option (int c, char *arg)
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case OPTION_NO_M3900:
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break;
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case OPTION_MDMX:
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mips_opts.ase |= ASE_MDMX;
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file_ase_explicit |= ASE_MDMX;
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break;
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case OPTION_NO_MDMX:
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mips_opts.ase &= ~ASE_MDMX;
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file_ase_explicit |= ASE_MDMX;
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break;
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case OPTION_DSP:
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mips_opts.ase |= ASE_DSP;
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mips_opts.ase &= ~ASE_DSPR2;
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file_ase_explicit |= ASE_DSP | ASE_DSPR2;
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break;
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case OPTION_DSPR2:
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mips_opts.ase |= ASE_DSP | ASE_DSPR2;
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file_ase_explicit |= ASE_DSP | ASE_DSPR2;
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break;
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case OPTION_NO_DSP:
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case OPTION_NO_DSPR2:
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mips_opts.ase &= ~(ASE_DSP | ASE_DSPR2);
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file_ase_explicit |= ASE_DSP | ASE_DSPR2;
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break;
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case OPTION_EVA:
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mips_opts.ase |= ASE_EVA;
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file_ase_explicit |= ASE_EVA;
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break;
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case OPTION_NO_EVA:
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mips_opts.ase &= ~ASE_EVA;
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file_ase_explicit |= ASE_EVA;
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break;
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case OPTION_MT:
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mips_opts.ase |= ASE_MT;
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file_ase_explicit |= ASE_MT;
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break;
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case OPTION_NO_MT:
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mips_opts.ase &= ~ASE_MT;
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file_ase_explicit |= ASE_MT;
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break;
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case OPTION_MCU:
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mips_opts.ase |= ASE_MCU;
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file_ase_explicit |= ASE_MCU;
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break;
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case OPTION_NO_MCU:
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mips_opts.ase &= ~ASE_MCU;
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file_ase_explicit |= ASE_MCU;
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break;
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case OPTION_MICROMIPS:
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if (mips_opts.mips16 == 1)
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{
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@ -15064,16 +15177,6 @@ md_parse_option (int c, char *arg)
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mips_no_prev_insn ();
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break;
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case OPTION_VIRT:
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mips_opts.ase |= ASE_VIRT;
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file_ase_explicit |= ASE_VIRT;
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break;
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case OPTION_NO_VIRT:
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mips_opts.ase &= ~ASE_VIRT;
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file_ase_explicit |= ASE_VIRT;
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break;
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case OPTION_MIPS16:
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if (mips_opts.micromips == 1)
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{
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@ -15089,26 +15192,6 @@ md_parse_option (int c, char *arg)
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mips_no_prev_insn ();
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break;
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case OPTION_MIPS3D:
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mips_opts.ase |= ASE_MIPS3D;
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file_ase_explicit |= ASE_MIPS3D;
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break;
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case OPTION_NO_MIPS3D:
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mips_opts.ase &= ~ASE_MIPS3D;
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file_ase_explicit |= ASE_MIPS3D;
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break;
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case OPTION_SMARTMIPS:
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mips_opts.ase |= ASE_SMARTMIPS;
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file_ase_explicit |= ASE_SMARTMIPS;
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break;
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case OPTION_NO_SMARTMIPS:
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mips_opts.ase &= ~ASE_SMARTMIPS;
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file_ase_explicit |= ASE_SMARTMIPS;
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break;
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|
||||
case OPTION_FIX_24K:
|
||||
mips_fix_24k = 1;
|
||||
break;
|
||||
@ -15484,7 +15567,7 @@ mips_after_parse_args (void)
|
||||
if (file_mips_gp32 == 0)
|
||||
/* 64-bit integer registers implies 64-bit float registers. */
|
||||
file_mips_fp32 = 0;
|
||||
else if ((mips_opts.ase & (ASE_MIPS3D | ASE_MDMX))
|
||||
else if ((mips_opts.ase & FP64_ASES)
|
||||
&& ISA_HAS_64BIT_FPRS (mips_opts.isa))
|
||||
/* -mips3d and -mdmx imply 64-bit float registers, if possible. */
|
||||
file_mips_fp32 = 0;
|
||||
@ -15536,40 +15619,6 @@ mips_after_parse_args (void)
|
||||
use the default setting for the CPU. */
|
||||
mips_opts.ase |= (arch_info->ase & ~file_ase_explicit);
|
||||
|
||||
if ((mips_opts.ase & ASE_MIPS3D) && file_mips_fp32 == 1)
|
||||
as_bad (_("-mfp32 used with -mips3d"));
|
||||
|
||||
if ((mips_opts.ase & ASE_MDMX) && file_mips_fp32 == 1)
|
||||
as_bad (_("-mfp32 used with -mdmx"));
|
||||
|
||||
if ((mips_opts.ase & ASE_SMARTMIPS) && !ISA_SUPPORTS_SMARTMIPS)
|
||||
as_warn (_("%s ISA does not support SmartMIPS"),
|
||||
mips_cpu_info_from_isa (mips_opts.isa)->name);
|
||||
|
||||
if ((mips_opts.ase & ASE_DSP) && !ISA_SUPPORTS_DSP_ASE)
|
||||
as_warn (_("%s ISA does not support DSP ASE"),
|
||||
mips_cpu_info_from_isa (mips_opts.isa)->name);
|
||||
|
||||
if ((mips_opts.ase & ASE_DSPR2) && !ISA_SUPPORTS_DSPR2_ASE)
|
||||
as_warn (_("%s ISA does not support DSP R2 ASE"),
|
||||
mips_cpu_info_from_isa (mips_opts.isa)->name);
|
||||
|
||||
if ((mips_opts.ase & ASE_EVA) && !ISA_SUPPORTS_EVA_ASE)
|
||||
as_warn (_("%s ISA does not support EVA ASE"),
|
||||
mips_cpu_info_from_isa (mips_opts.isa)->name);
|
||||
|
||||
if ((mips_opts.ase & ASE_MT) && !ISA_SUPPORTS_MT_ASE)
|
||||
as_warn (_("%s ISA does not support MT ASE"),
|
||||
mips_cpu_info_from_isa (mips_opts.isa)->name);
|
||||
|
||||
if ((mips_opts.ase & ASE_MCU) && !ISA_SUPPORTS_MCU_ASE)
|
||||
as_warn (_("%s ISA does not support MCU ASE"),
|
||||
mips_cpu_info_from_isa (mips_opts.isa)->name);
|
||||
|
||||
if ((mips_opts.ase & ASE_VIRT) && !ISA_SUPPORTS_VIRT_ASE)
|
||||
as_warn (_("%s ISA does not support Virtualization ASE"),
|
||||
mips_cpu_info_from_isa (mips_opts.isa)->name);
|
||||
|
||||
file_mips_isa = mips_opts.isa;
|
||||
file_ase = mips_opts.ase;
|
||||
mips_opts.gp32 = file_mips_gp32;
|
||||
@ -15577,6 +15626,8 @@ mips_after_parse_args (void)
|
||||
mips_opts.soft_float = file_mips_soft_float;
|
||||
mips_opts.single_float = file_mips_single_float;
|
||||
|
||||
mips_check_isa_supports_ases ();
|
||||
|
||||
if (mips_flag_mdebug < 0)
|
||||
{
|
||||
#ifdef OBJ_MAYBE_ECOFF
|
||||
@ -16481,6 +16532,7 @@ static void
|
||||
s_mipsset (int x ATTRIBUTE_UNUSED)
|
||||
{
|
||||
char *name = input_line_pointer, ch;
|
||||
const struct mips_ase *ase;
|
||||
|
||||
while (!is_end_of_line[(unsigned char) *input_line_pointer])
|
||||
++input_line_pointer;
|
||||
@ -16586,72 +16638,12 @@ s_mipsset (int x ATTRIBUTE_UNUSED)
|
||||
}
|
||||
else if (strcmp (name, "nomicromips") == 0)
|
||||
mips_opts.micromips = 0;
|
||||
else if (strcmp (name, "smartmips") == 0)
|
||||
{
|
||||
if (!ISA_SUPPORTS_SMARTMIPS)
|
||||
as_warn (_("%s ISA does not support SmartMIPS ASE"),
|
||||
mips_cpu_info_from_isa (mips_opts.isa)->name);
|
||||
mips_opts.ase |= ASE_SMARTMIPS;
|
||||
}
|
||||
else if (strcmp (name, "nosmartmips") == 0)
|
||||
mips_opts.ase &= ~ASE_SMARTMIPS;
|
||||
else if (strcmp (name, "mips3d") == 0)
|
||||
mips_opts.ase |= ASE_MIPS3D;
|
||||
else if (strcmp (name, "nomips3d") == 0)
|
||||
mips_opts.ase &= ~ASE_MIPS3D;
|
||||
else if (strcmp (name, "mdmx") == 0)
|
||||
mips_opts.ase |= ASE_MDMX;
|
||||
else if (strcmp (name, "nomdmx") == 0)
|
||||
mips_opts.ase &= ~ASE_MDMX;
|
||||
else if (strcmp (name, "dsp") == 0)
|
||||
{
|
||||
if (!ISA_SUPPORTS_DSP_ASE)
|
||||
as_warn (_("%s ISA does not support DSP ASE"),
|
||||
mips_cpu_info_from_isa (mips_opts.isa)->name);
|
||||
mips_opts.ase |= ASE_DSP;
|
||||
mips_opts.ase &= ~ASE_DSPR2;
|
||||
}
|
||||
else if (strcmp (name, "dspr2") == 0)
|
||||
{
|
||||
if (!ISA_SUPPORTS_DSPR2_ASE)
|
||||
as_warn (_("%s ISA does not support DSP R2 ASE"),
|
||||
mips_cpu_info_from_isa (mips_opts.isa)->name);
|
||||
mips_opts.ase |= ASE_DSP | ASE_DSPR2;
|
||||
}
|
||||
else if (strcmp (name, "nodsp") == 0
|
||||
|| strcmp (name, "nodspr2") == 0)
|
||||
mips_opts.ase &= ~(ASE_DSP | ASE_DSPR2);
|
||||
else if (strcmp (name, "eva") == 0)
|
||||
{
|
||||
if (!ISA_SUPPORTS_EVA_ASE)
|
||||
as_warn (_("%s ISA does not support EVA ASE"),
|
||||
mips_cpu_info_from_isa (mips_opts.isa)->name);
|
||||
mips_opts.ase |= ASE_EVA;
|
||||
}
|
||||
else if (strcmp (name, "noeva") == 0)
|
||||
mips_opts.ase &= ~ASE_EVA;
|
||||
else if (strcmp (name, "mt") == 0)
|
||||
{
|
||||
if (!ISA_SUPPORTS_MT_ASE)
|
||||
as_warn (_("%s ISA does not support MT ASE"),
|
||||
mips_cpu_info_from_isa (mips_opts.isa)->name);
|
||||
mips_opts.ase |= ASE_MT;
|
||||
}
|
||||
else if (strcmp (name, "nomt") == 0)
|
||||
mips_opts.ase &= ~ASE_MT;
|
||||
else if (strcmp (name, "mcu") == 0)
|
||||
mips_opts.ase |= ASE_MCU;
|
||||
else if (strcmp (name, "nomcu") == 0)
|
||||
mips_opts.ase &= ~ASE_MCU;
|
||||
else if (strcmp (name, "virt") == 0)
|
||||
{
|
||||
if (!ISA_SUPPORTS_VIRT_ASE)
|
||||
as_warn (_("%s ISA does not support Virtualization ASE"),
|
||||
mips_cpu_info_from_isa (mips_opts.isa)->name);
|
||||
mips_opts.ase |= ASE_VIRT;
|
||||
}
|
||||
else if (strcmp (name, "novirt") == 0)
|
||||
mips_opts.ase &= ~ASE_VIRT;
|
||||
else if (name[0] == 'n'
|
||||
&& name[1] == 'o'
|
||||
&& (ase = mips_lookup_ase (name + 2)))
|
||||
mips_set_ase (ase, FALSE);
|
||||
else if ((ase = mips_lookup_ase (name)))
|
||||
mips_set_ase (ase, TRUE);
|
||||
else if (strncmp (name, "mips", 4) == 0 || strncmp (name, "arch=", 5) == 0)
|
||||
{
|
||||
int reset = 0;
|
||||
@ -16779,6 +16771,7 @@ s_mipsset (int x ATTRIBUTE_UNUSED)
|
||||
{
|
||||
as_warn (_("Tried to set unrecognized symbol: %s\n"), name);
|
||||
}
|
||||
mips_check_isa_supports_ases ();
|
||||
*input_line_pointer = ch;
|
||||
demand_empty_rest_of_line ();
|
||||
}
|
||||
|
||||
@ -1,3 +1,11 @@
|
||||
2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
|
||||
|
||||
* gas/mips/ase-errors-1.s, gas/mips/ase-errors-1.l,
|
||||
gas/mips/ase-errors-2.s, gas/mips/ase-errors-2.l,
|
||||
gas/mips/ase-errors-3.s, gas/mips/ase-errors-3.l,
|
||||
gas/mips/ase-errors-4.s, gas/mips/ase-errors-4.l: New tests.
|
||||
* gas/mips/mips.exp: Run them.
|
||||
|
||||
2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
|
||||
|
||||
* gas/mips/eva.d: Use -32.
|
||||
|
||||
42
gas/testsuite/gas/mips/ase-errors-1.l
Normal file
42
gas/testsuite/gas/mips/ase-errors-1.l
Normal file
@ -0,0 +1,42 @@
|
||||
.*Assembler messages:
|
||||
.*:6: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
|
||||
.*:7: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
|
||||
.*:9: Warning: The `dsp' extension requires MIPS32 revision 2 or greater
|
||||
.*:11: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
|
||||
.*:12: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
|
||||
.*:14: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
|
||||
.*:15: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
|
||||
.*:16: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:22: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
|
||||
.*:25: Warning: The `dspr2' extension requires MIPS32 revision 2 or greater
|
||||
.*:27: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
|
||||
.*:30: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
|
||||
.*:31: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
|
||||
.*:32: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:39: Warning: The `mcu' extension requires MIPS32 revision 2 or greater
|
||||
.*:42: Error: Opcode not supported.* `aclr 4,100\(\$4\)'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:46: Warning: The 32-bit MIPS architecture does not support the `mdmx' extension
|
||||
.*:48: Warning: The `mdmx' extension requires 64-bit FPRs
|
||||
.*:51: Error: Opcode not supported.* `add.ob \$f4,\$f6,\$f8'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:57: Warning: The `mips3d' extension requires 64-bit FPRs
|
||||
.*:58: Warning: The `mips3d' extension requires MIPS32 revision 2 or greater
|
||||
.*:61: Error: Opcode not supported.* `addr.ps \$f4,\$f6,\$f8'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:68: Warning: The `mt' extension requires MIPS32 revision 2 or greater
|
||||
.*:71: Error: Opcode not supported.* `dmt *'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:77: Warning: The `smartmips' extension requires MIPS32 revision 1 or greater
|
||||
.*:80: Error: Opcode not supported.* `maddp \$4,\$5'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:86: Error: Opcode not supported.* `dmfgc0 \$3,\$29'
|
||||
.*:88: Warning: The `virt' extension requires MIPS32 revision 2 or greater
|
||||
.*:90: Error: Opcode not supported.* `dmfgc0 \$3,\$29'
|
||||
.*:92: Error: Opcode not supported.* `hypcall *'
|
||||
.*:93: Error: Opcode not supported.* `dmfgc0 \$3,\$29'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:100: Warning: The `eva' extension requires MIPS32 revision 2 or greater
|
||||
.*:103: Error: Opcode not supported.* `lbue \$4,16\(\$5\)'
|
||||
115
gas/testsuite/gas/mips/ase-errors-1.s
Normal file
115
gas/testsuite/gas/mips/ase-errors-1.s
Normal file
@ -0,0 +1,115 @@
|
||||
.set nomicromips
|
||||
.set mips32r2
|
||||
.set fp=64
|
||||
.set dsp # OK
|
||||
lbux $4,$5($6) # OK
|
||||
ldx $4,$5($6) # ERROR: 64-bit only
|
||||
absq_s.qb $3,$4 # ERROR: dspr2 not enabled
|
||||
.set fp=32 # OK
|
||||
.set mips32 # ERROR: too low
|
||||
lbux $4,$5($6) # OK
|
||||
ldx $4,$5($6) # ERROR: 64-bit only
|
||||
absq_s.qb $3,$4 # ERROR: dspr2 not enabled
|
||||
.set nodsp
|
||||
lbux $4,$5($6) # ERROR: dsp not enabled
|
||||
ldx $4,$5($6) # ERROR: dsp not enabled
|
||||
absq_s.qb $3,$4 # ERROR: dspr2 not enabled
|
||||
|
||||
.set mips32r2
|
||||
.set fp=64
|
||||
.set dspr2 # OK
|
||||
lbux $4,$5($6) # OK
|
||||
ldx $4,$5($6) # ERROR: 64-bit only
|
||||
absq_s.qb $3,$4 # OK
|
||||
.set fp=32 # OK
|
||||
.set mips32 # ERROR: too low
|
||||
lbux $4,$5($6) # OK
|
||||
ldx $4,$5($6) # ERROR: 64-bit only
|
||||
absq_s.qb $3,$4 # OK
|
||||
.set nodspr2
|
||||
lbux $4,$5($6) # ERROR: dsp not enabled
|
||||
ldx $4,$5($6) # ERROR: dsp not enabled
|
||||
absq_s.qb $3,$4 # ERROR: dspr2 not enabled
|
||||
|
||||
.set mips32r2
|
||||
.set fp=64
|
||||
.set mcu # OK
|
||||
aclr 4,100($4) # OK
|
||||
.set fp=32 # OK
|
||||
.set mips32 # ERROR: too low
|
||||
aclr 4,100($4) # OK
|
||||
.set nomcu
|
||||
aclr 4,100($4) # ERROR: mcu not enabled
|
||||
|
||||
.set mips32r2
|
||||
.set fp=64
|
||||
.set mdmx # ERROR: needs a 64-bit target
|
||||
add.ob $f4,$f6,$f8 # OK
|
||||
.set fp=32 # ERROR: needs fp=64
|
||||
add.ob $f4,$f6,$f8 # OK
|
||||
.set nomdmx
|
||||
add.ob $f4,$f6,$f8 # ERROR: mdmx not enabled
|
||||
|
||||
.set mips32r2
|
||||
.set fp=64
|
||||
.set mips3d # OK
|
||||
addr.ps $f4,$f6,$f8 # OK
|
||||
.set fp=32 # ERROR: needs fp=64
|
||||
.set mips32 # ERROR: too low
|
||||
addr.ps $f4,$f6,$f8 # OK
|
||||
.set nomips3d
|
||||
addr.ps $f4,$f6,$f8 # ERROR: mips3d not enabled
|
||||
|
||||
.set mips32r2
|
||||
.set fp=64
|
||||
.set mt # OK
|
||||
dmt # OK
|
||||
.set fp=32 # OK
|
||||
.set mips32 # ERROR: too low
|
||||
dmt # OK
|
||||
.set nomt
|
||||
dmt # ERROR: mt not enabled
|
||||
|
||||
.set fp=32
|
||||
.set mips32
|
||||
.set smartmips # OK
|
||||
maddp $4,$5 # OK
|
||||
.set mips2 # ERROR: too low
|
||||
maddp $4,$5 # OK
|
||||
.set nosmartmips
|
||||
maddp $4,$5 # ERROR: smartmips not enabled
|
||||
|
||||
.set mips32r2
|
||||
.set fp=64
|
||||
.set virt # OK
|
||||
hypcall # OK
|
||||
dmfgc0 $3, $29 # ERROR: 64-bit only
|
||||
.set fp=32 # OK
|
||||
.set mips32 # ERROR: too low
|
||||
hypcall # OK
|
||||
dmfgc0 $3, $29 # ERROR: 64-bit only
|
||||
.set novirt
|
||||
hypcall # ERROR: virt not enabled
|
||||
dmfgc0 $3, $29 # ERROR: virt not enabled
|
||||
|
||||
.set mips32r2
|
||||
.set fp=64
|
||||
.set eva # OK
|
||||
lbue $4,16($5) # OK
|
||||
.set fp=32 # OK
|
||||
.set mips32 # ERROR: too low
|
||||
lbue $4,16($5) # OK
|
||||
.set noeva
|
||||
lbue $4,16($5) # ERROR: eva not enabled
|
||||
|
||||
# There should be no errors after this.
|
||||
.set fp=32
|
||||
.set mips1
|
||||
.set dsp
|
||||
.set dspr2
|
||||
.set mcu
|
||||
.set mdmx
|
||||
.set mips3d
|
||||
.set mt
|
||||
.set smartmips
|
||||
.set eva
|
||||
34
gas/testsuite/gas/mips/ase-errors-2.l
Normal file
34
gas/testsuite/gas/mips/ase-errors-2.l
Normal file
@ -0,0 +1,34 @@
|
||||
.*Assembler messages:
|
||||
.*:6: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
|
||||
.*:7: Warning: The `dsp' extension requires MIPS64 revision 2 or greater
|
||||
.*:10: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
|
||||
.*:12: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
|
||||
.*:13: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
|
||||
.*:14: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:21: Warning: The `dspr2' extension requires MIPS64 revision 2 or greater
|
||||
.*:26: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
|
||||
.*:27: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
|
||||
.*:28: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:33: Warning: The `mcu' extension requires MIPS64 revision 2 or greater
|
||||
.*:36: Error: Opcode not supported.* `aclr 4,100\(\$4\)'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:41: Warning: The `mdmx' extension requires MIPS64 revision 1 or greater
|
||||
.*:44: Error: Opcode not supported.* `add.ob \$f4,\$f6,\$f8'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:49: Warning: The `mips3d' extension requires MIPS64 revision 1 or greater
|
||||
.*:52: Error: Opcode not supported.* `addr.ps \$f4,\$f6,\$f8'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:57: Warning: The `mt' extension requires MIPS64 revision 2 or greater
|
||||
.*:60: Error: Opcode not supported.* `dmt *'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:63: Warning: The 64-bit MIPS architecture does not support the `smartmips' extension
|
||||
.*:68: Error: Opcode not supported.* `maddp \$4,\$5'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:74: Warning: The `virt' extension requires MIPS64 revision 2 or greater
|
||||
.*:78: Error: Opcode not supported.* `hypcall *'
|
||||
.*:79: Error: Opcode not supported.* `dmfgc0 \$3,\$29'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:84: Warning: The `eva' extension requires MIPS64 revision 2 or greater
|
||||
.*:87: Error: Opcode not supported.* `lbue \$4,16\(\$5\)'
|
||||
99
gas/testsuite/gas/mips/ase-errors-2.s
Normal file
99
gas/testsuite/gas/mips/ase-errors-2.s
Normal file
@ -0,0 +1,99 @@
|
||||
.set nomicromips
|
||||
.set mips64r2
|
||||
.set dsp # OK
|
||||
lbux $4,$5($6) # OK
|
||||
ldx $4,$5($6) # OK
|
||||
absq_s.qb $3,$4 # ERROR: dspr2 not enabled
|
||||
.set mips64 # ERROR: too low
|
||||
lbux $4,$5($6) # OK
|
||||
ldx $4,$5($6) # OK
|
||||
absq_s.qb $3,$4 # ERROR: dspr2 not enabled
|
||||
.set nodsp
|
||||
lbux $4,$5($6) # ERROR: dsp not enabled
|
||||
ldx $4,$5($6) # ERROR: dsp not enabled
|
||||
absq_s.qb $3,$4 # ERROR: dspr2 not enabled
|
||||
|
||||
.set mips64r2
|
||||
.set dspr2 # OK
|
||||
lbux $4,$5($6) # OK
|
||||
ldx $4,$5($6) # OK
|
||||
absq_s.qb $3,$4 # OK
|
||||
.set mips64 # ERROR: too low
|
||||
lbux $4,$5($6) # OK
|
||||
ldx $4,$5($6) # OK
|
||||
absq_s.qb $3,$4 # OK
|
||||
.set nodspr2
|
||||
lbux $4,$5($6) # ERROR: dsp not enabled
|
||||
ldx $4,$5($6) # ERROR: dsp not enabled
|
||||
absq_s.qb $3,$4 # ERROR: dspr2 not enabled
|
||||
|
||||
.set mips64r2
|
||||
.set mcu # OK
|
||||
aclr 4,100($4) # OK
|
||||
.set mips64 # ERROR: too low
|
||||
aclr 4,100($4) # OK
|
||||
.set nomcu
|
||||
aclr 4,100($4) # ERROR: mcu not enabled
|
||||
|
||||
.set mips64
|
||||
.set mdmx # OK
|
||||
add.ob $f4,$f6,$f8 # OK
|
||||
.set mips4 # ERROR: too low
|
||||
add.ob $f4,$f6,$f8 # OK
|
||||
.set nomdmx
|
||||
add.ob $f4,$f6,$f8 # ERROR: mdmx not enabled
|
||||
|
||||
.set mips64
|
||||
.set mips3d # OK
|
||||
addr.ps $f4,$f6,$f8 # OK
|
||||
.set mips4 # ERROR: too low
|
||||
addr.ps $f4,$f6,$f8 # OK
|
||||
.set nomips3d
|
||||
addr.ps $f4,$f6,$f8 # ERROR: mips3d not enabled
|
||||
|
||||
.set mips64r2
|
||||
.set mt # OK
|
||||
dmt # OK
|
||||
.set mips64 # ERROR: too low
|
||||
dmt # OK
|
||||
.set nomt
|
||||
dmt # ERROR: mt not enabled
|
||||
|
||||
.set mips64
|
||||
.set smartmips # OK
|
||||
maddp $4,$5 # OK
|
||||
.set mips4 # ERROR: too low
|
||||
maddp $4,$5 # OK
|
||||
.set nosmartmips
|
||||
maddp $4,$5 # ERROR: smartmips not enabled
|
||||
|
||||
.set mips64r2
|
||||
.set virt # OK
|
||||
hypcall # OK
|
||||
dmfgc0 $3, $29 # OK
|
||||
.set mips64 # ERROR: too low
|
||||
hypcall # OK
|
||||
dmfgc0 $3, $29 # OK
|
||||
.set novirt
|
||||
hypcall # ERROR: virt not enabled
|
||||
dmfgc0 $3, $29 # ERROR: virt not enabled
|
||||
|
||||
.set mips64r2
|
||||
.set eva # OK
|
||||
lbue $4,16($5) # OK
|
||||
.set mips64 # ERROR: too low
|
||||
lbue $4,16($5) # OK
|
||||
.set noeva
|
||||
lbue $4,16($5) # ERROR: eva not enabled
|
||||
|
||||
# There should be no errors after this.
|
||||
.set fp=32
|
||||
.set mips4
|
||||
.set dsp
|
||||
.set dspr2
|
||||
.set mcu
|
||||
.set mdmx
|
||||
.set mips3d
|
||||
.set mt
|
||||
.set smartmips
|
||||
.set eva
|
||||
30
gas/testsuite/gas/mips/ase-errors-3.l
Normal file
30
gas/testsuite/gas/mips/ase-errors-3.l
Normal file
@ -0,0 +1,30 @@
|
||||
.*Assembler messages:
|
||||
.*:5: Error: Unrecognized opcode `ldx \$4,\$5\(\$6\)'
|
||||
.*:6: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
|
||||
.*:9: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
|
||||
.*:10: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:18: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
|
||||
.*:19: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:26: Error: Opcode not supported.* `aclr 4,100\(\$4\)'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:29: Warning: The 32-bit microMIPS architecture does not support the `mdmx' extension
|
||||
.*:29: Warning: The `mdmx' extension requires 64-bit FPRs
|
||||
.*:30: Error: Unrecognized opcode `add.ob \$f4,\$f6,\$f8'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:34: Warning: The 32-bit microMIPS architecture does not support the `mips3d' extension
|
||||
.*:34: Warning: The `mips3d' extension requires 64-bit FPRs
|
||||
.*:35: Error: Unrecognized opcode `addr.ps \$f4,\$f6,\$f8'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:39: Warning: The 32-bit microMIPS architecture does not support the `mt' extension
|
||||
.*:40: Error: Unrecognized opcode `dmt *'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:44: Warning: The 32-bit microMIPS architecture does not support the `smartmips' extension
|
||||
.*:45: Error: Unrecognized opcode `maddp \$4,\$5'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:51: Error: Opcode not supported.* `dmfgc0 \$3,\$29'
|
||||
.*:54: Error: Opcode not supported.* `hypcall *'
|
||||
.*:55: Error: Opcode not supported.* `dmfgc0 \$3,\$29'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:65: Error: Opcode not supported.* `lbue \$4,16\(\$5\)'
|
||||
77
gas/testsuite/gas/mips/ase-errors-3.s
Normal file
77
gas/testsuite/gas/mips/ase-errors-3.s
Normal file
@ -0,0 +1,77 @@
|
||||
.set micromips
|
||||
.set mips32r2
|
||||
.set dsp # OK
|
||||
lbux $4,$5($6) # OK
|
||||
ldx $4,$5($6) # ERROR: micromips doesn't have 64-bit DSPr1
|
||||
absq_s.qb $3,$4 # ERROR: dspr2 not enabled
|
||||
.set mips1 # OK (we assume r2 anyway)
|
||||
.set nodsp
|
||||
lbux $4,$5($6) # ERROR: dsp not enabled
|
||||
absq_s.qb $3,$4 # ERROR: dspr2 not enabled
|
||||
|
||||
.set mips32r2
|
||||
.set dspr2 # OK
|
||||
lbux $4,$5($6) # OK
|
||||
absq_s.qb $3,$4 # OK
|
||||
.set mips1 # OK (we assume r2 anyway)
|
||||
.set nodspr2
|
||||
lbux $4,$5($6) # ERROR: dsp not enabled
|
||||
absq_s.qb $3,$4 # ERROR: dspr2 not enabled
|
||||
|
||||
.set mips32r2
|
||||
.set mcu # OK
|
||||
aclr 4,100($4) # OK
|
||||
.set mips1 # OK (we assume r2 anyway)
|
||||
.set nomcu
|
||||
aclr 4,100($4) # ERROR: mcu not enabled
|
||||
|
||||
.set mips32r2
|
||||
.set mdmx # ERROR: not supported at all
|
||||
add.ob $f4,$f6,$f8 # ERROR: not supported at all
|
||||
.set nomdmx
|
||||
|
||||
.set mips32r2
|
||||
.set mips3d # ERROR: not supported at all
|
||||
addr.ps $f4,$f6,$f8 # ERROR: not supported at all
|
||||
.set nomips3d
|
||||
|
||||
.set mips32r2
|
||||
.set mt # ERROR: not supported at all
|
||||
dmt # ERROR: not supported at all
|
||||
.set nomt
|
||||
|
||||
.set mips32
|
||||
.set smartmips # ERROR: not supported at all
|
||||
maddp $4,$5 # ERROR: not supported at all
|
||||
.set nosmartmips
|
||||
|
||||
.set mips32r2
|
||||
.set virt # OK
|
||||
hypcall # OK
|
||||
dmfgc0 $3, $29 # ERROR: 64-bit only
|
||||
.set mips1 # OK (we assume r2 anyway)
|
||||
.set novirt
|
||||
hypcall # ERROR: virt not enabled
|
||||
dmfgc0 $3, $29 # ERROR: virt not enabled
|
||||
|
||||
.set mips32r2
|
||||
.set fp=64
|
||||
.set eva # OK
|
||||
lbue $4,16($5) # OK
|
||||
.set fp=32 # OK
|
||||
.set mips1 # OK (we assume r2 anyway)
|
||||
lbue $4,16($5) # OK
|
||||
.set noeva
|
||||
lbue $4,16($5) # ERROR: eva not enabled
|
||||
|
||||
# There should be no errors after this.
|
||||
.set fp=32
|
||||
.set mips1
|
||||
.set dsp
|
||||
.set dspr2
|
||||
.set mcu
|
||||
.set mdmx
|
||||
.set mips3d
|
||||
.set mt
|
||||
.set smartmips
|
||||
.set eva
|
||||
27
gas/testsuite/gas/mips/ase-errors-4.l
Normal file
27
gas/testsuite/gas/mips/ase-errors-4.l
Normal file
@ -0,0 +1,27 @@
|
||||
.*Assembler messages:
|
||||
.*:5: Error: Unrecognized opcode `ldx \$4,\$5\(\$6\)'
|
||||
.*:6: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
|
||||
.*:9: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
|
||||
.*:10: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:18: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
|
||||
.*:19: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:26: Error: Opcode not supported.* `aclr 4,100\(\$4\)'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:29: Warning: The 64-bit microMIPS architecture does not support the `mdmx' extension
|
||||
.*:30: Error: Unrecognized opcode `add.ob \$f4,\$f6,\$f8'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:34: Warning: The 64-bit microMIPS architecture does not support the `mips3d' extension
|
||||
.*:35: Error: Unrecognized opcode `addr.ps \$f4,\$f6,\$f8'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:39: Warning: The 64-bit microMIPS architecture does not support the `mt' extension
|
||||
.*:40: Error: Unrecognized opcode `dmt *'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:44: Warning: The 64-bit microMIPS architecture does not support the `smartmips' extension
|
||||
.*:45: Error: Unrecognized opcode `maddp \$4,\$5'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:54: Error: Opcode not supported.* `hypcall *'
|
||||
.*:55: Error: Opcode not supported.* `dmfgc0 \$3,\$29'
|
||||
# ----------------------------------------------------------------------------
|
||||
.*:63: Error: Opcode not supported.* `lbue \$4,16\(\$5\)'
|
||||
75
gas/testsuite/gas/mips/ase-errors-4.s
Normal file
75
gas/testsuite/gas/mips/ase-errors-4.s
Normal file
@ -0,0 +1,75 @@
|
||||
.set micromips
|
||||
.set mips64r2
|
||||
.set dsp # OK
|
||||
lbux $4,$5($6) # OK
|
||||
ldx $4,$5($6) # ERROR: micromips doesn't have 64-bit DSPr1
|
||||
absq_s.qb $3,$4 # ERROR: dspr2 not enabled
|
||||
.set mips3 # OK (we assume r2 anyway)
|
||||
.set nodsp
|
||||
lbux $4,$5($6) # ERROR: dsp not enabled
|
||||
absq_s.qb $3,$4 # ERROR: dspr2 not enabled
|
||||
|
||||
.set mips64r2
|
||||
.set dspr2 # OK
|
||||
lbux $4,$5($6) # OK
|
||||
absq_s.qb $3,$4 # OK
|
||||
.set mips3 # OK (we assume r2 anyway)
|
||||
.set nodspr2
|
||||
lbux $4,$5($6) # ERROR: dsp not enabled
|
||||
absq_s.qb $3,$4 # ERROR: dspr2 not enabled
|
||||
|
||||
.set mips64r2
|
||||
.set mcu # OK
|
||||
aclr 4,100($4) # OK
|
||||
.set mips3 # OK (we assume r2 anyway)
|
||||
.set nomcu
|
||||
aclr 4,100($4) # ERROR: mcu not enabled
|
||||
|
||||
.set mips64r2
|
||||
.set mdmx # ERROR: not supported at all
|
||||
add.ob $f4,$f6,$f8 # ERROR: not supported at all
|
||||
.set nomdmx
|
||||
|
||||
.set mips64r2
|
||||
.set mips3d # ERROR: not supported at all
|
||||
addr.ps $f4,$f6,$f8 # ERROR: not supported at all
|
||||
.set nomips3d
|
||||
|
||||
.set mips64r2
|
||||
.set mt # ERROR: not supported at all
|
||||
dmt # ERROR: not supported at all
|
||||
.set nomt
|
||||
|
||||
.set mips64
|
||||
.set smartmips # ERROR: not supported at all
|
||||
maddp $4,$5 # ERROR: not supported at all
|
||||
.set nosmartmips
|
||||
|
||||
.set mips64r2
|
||||
.set virt # OK
|
||||
hypcall # OK
|
||||
dmfgc0 $3, $29 # OK
|
||||
.set mips3 # OK (we assume r2 anyway)
|
||||
.set novirt
|
||||
hypcall # ERROR: virt not enabled
|
||||
dmfgc0 $3, $29 # ERROR: virt not enabled
|
||||
|
||||
.set mips64r2
|
||||
.set eva # OK
|
||||
lbue $4,16($5) # OK
|
||||
.set mips3 # OK (we assume r2 anyway)
|
||||
lbue $4,16($5) # OK
|
||||
.set noeva
|
||||
lbue $4,16($5) # ERROR: eva not enabled
|
||||
|
||||
# There should be no errors after this.
|
||||
.set fp=32
|
||||
.set mips4
|
||||
.set dsp
|
||||
.set dspr2
|
||||
.set mcu
|
||||
.set mdmx
|
||||
.set mips3d
|
||||
.set mt
|
||||
.set smartmips
|
||||
.set eva
|
||||
@ -1198,4 +1198,9 @@ if { [istarget mips*-*-vxworks*] } {
|
||||
run_dump_test "r5900-vu0"
|
||||
|
||||
run_list_test_arches "ext-ill" [mips_arch_list_matching mips64r2]
|
||||
|
||||
run_list_test "ase-errors-1" "-mabi=32 -march=mips1" "ASE errors (1)"
|
||||
run_list_test "ase-errors-2" "-mabi=o64 -march=mips3" "ASE errors (2)"
|
||||
run_list_test "ase-errors-3" "-mabi=32 -march=mips1" "ASE errors (3)"
|
||||
run_list_test "ase-errors-4" "-mabi=o64 -march=mips3" "ASE errors (4)"
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user