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Test extended shifts, mul64/mulu64 insns.

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This commit is contained in:
David Edelsohn 1995-04-09 00:22:54 +00:00
parent 3a5e9b6e86
commit c4ec94c9d6
4 changed files with 110 additions and 4 deletions
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2
gas/testsuite/gas/arc/.Sanitize
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@ -37,6 +37,8 @@ j.s
j.d
math.s
math.d
mul64.s
mul64.d
sshift.s
sshift.d
Things-to-lose:

14
gas/testsuite/gas/arc/arc.exp
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@ -111,12 +111,18 @@ if [istarget arc*-*-*] then {
# run_dump_test "sr"
# Host extension instructions
test_template_insn host math mul64 20
test_template_insn host math mulu64 21
run_dump_test "mul64"
test_template_insn host math asl 16
test_template_insn host math asr 18
test_template_insn host math lsr 17
test_template_insn host math ror 19
# Graphics extension instructions
test_template_insn graphics math mul64 20
test_template_insn graphics math mulu64 21
#run_dump_test "mul64" - .cpu field wrong
test_template_insn graphics math asl 16
test_template_insn graphics math asr 18
test_template_insn graphics math lsr 17
test_template_insn graphics math ror 19
test_template_insn graphics math padc 25
test_template_insn graphics math padd 24
test_template_insn graphics math pand 28

46
gas/testsuite/gas/arc/mul64.d Normal file
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@ -0,0 +1,46 @@
#objdump: -dr
#name: mul64
# Test the mul64/mulu64 insn.
.*: +file format elf32-.*arc
Disassembly of section .text:
00000000 a7e08400 mul64 r1,r2
00000004 afe18800 mulu64 r3,r4
00000008 a7e0fe00 mul64 r1,0
0000000c a7ff8400 mul64 0,r2
00000010 a7e0ffff mul64 r1,511
00000014 a7ff85ff mul64 511,r2
00000018 a7e0feff mul64 r1,255
0000001c a7ff84ff mul64 255,r2
00000020 a7e0ff00 mul64 r1,256
00000024 a7ff8500 mul64 256,r2
00000028 afe0fc00 mulu64 r1,256
00000030 afff0400 mulu64 511,r2
00000038 a7e0fc00 mul64 r1,256
00000040 a7ff0400 mul64 -257,r2
00000048 afe1fc00 mulu64 r3,512
00000050 afe27fff mulu64 r4,511
00000054 a7ff0a00 mul64 1111638594,r5
0000005c a7ff7c00 mul64 305419896,305419896
00000064 a7e07c00 mul64 r0,0
RELOC: 00000068 R_ARC_32 foo
0000006c aff07c00 mulu64 r32,0
RELOC: 00000070 R_ARC_32 foo
00000074 a7e00200 mul64 r0,r1
00000078 a7e30e01 mul64.eq r6,r7
0000007c afe61a02 mulu64.ne r12,r13
00000080 a7e00300 mul64.f r0,r1
00000084 a7e17a01 mul64.f r2,1
00000088 a7fe8601 mul64.f 1,r3
0000008c a7fe8800 mul64.f 0,r4
00000090 afe2fd00 mulu64.f r5,512
00000098 afe37d00 mulu64.f r6,512
000000a0 afe39100 mulu64.f r7,r8
000000a4 afe00301 mulu64.eq.f r0,r1
000000a8 afe17d02 mulu64.ne.f r2,0
000000b0 afff070b mulu64.lt.f 0,r3
000000b8 afe27d09 mulu64.gt.f r4,512
000000c0 afff0b0c mulu64.le.f 512,r5
000000c8 afff7d0a mulu64.ge.f 512,512

52
gas/testsuite/gas/arc/mul64.s Normal file
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@ -0,0 +1,52 @@
# mul64 test
.cpu host
# reg,reg
mul64 r1,r2
mulu64 r3,r4
# shimm values
mul64 r1,0
mul64 0,r2
mul64 r1,-1
mul64 -1,r2
mul64 r1,255
mul64 255,r2
mul64 r1,-256
mul64 -256,r2
mulu64 r1,256
mulu64 511,r2
# limm values
mul64 r1,256
mul64 -257,r2
mulu64 r3,512
mulu64 r4,-1
mul64 0x42424242,r5
mul64 0x12345678,0x12345678
# symbols
mul64 r0,foo
mulu64 r32,foo
# conditional execution
mul64.al r0,r1
mul64.eq r6,r7
mulu64.ne r12,r13
# flag setting
mul64.f r0,r1
mul64.f r2,1
mul64.f 1,r3
mul64.f 0,r4
mulu64.f r5,512
mulu64.f r6,512
mulu64.f r7,r8
# conditional execution + flag setting
mulu64.eq.f r0,r1
mulu64.ne.f r2,0
mulu64.lt.f 0,r3
mulu64.gt.f r4,512
mulu64.le.f 512,r5
mulu64.ge.f 512,512