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gas/testsuite/
2009-01-12 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sse-noavx.s: Add tests for lfence, mfence and movnti. * gas/i386/x86-64-sse-noavx.s: Likewise. * gas/i386/sse-noavx.d: Updated. * gas/i386/x86-64-sse-noavx.d: Likewise. opcodes/ 2009-01-12 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence. * i386-tbl.h: Regenerated.
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H.J. Lu
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c4e4c2df74
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c1ec187589
@ -1,3 +1,11 @@
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2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/sse-noavx.s: Add tests for lfence, mfence and movnti.
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* gas/i386/x86-64-sse-noavx.s: Likewise.
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* gas/i386/sse-noavx.d: Updated.
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* gas/i386/x86-64-sse-noavx.d: Likewise.
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2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/opts.s: Add tests for add, adc, and, cmp, or, sbb,
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@ -16,9 +16,12 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 0f 2c dc cvttps2pi %xmm4,%mm3
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[ ]*[a-f0-9]+: df 08 fisttp \(%eax\)
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[ ]*[a-f0-9]+: dd 08 fisttpll \(%eax\)
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[ ]*[a-f0-9]+: 0f ae e8 lfence
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[ ]*[a-f0-9]+: 0f f7 c7 maskmovq %mm7,%mm0
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[ ]*[a-f0-9]+: 0f ae f0 mfence
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[ ]*[a-f0-9]+: 0f 01 c8 monitor %eax,%ecx,%edx
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[ ]*[a-f0-9]+: f2 0f d6 c8 movdq2q %xmm0,%mm1
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[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%eax\)
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[ ]*[a-f0-9]+: 0f e7 10 movntq %mm2,\(%eax\)
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[ ]*[a-f0-9]+: f3 0f d6 c8 movq2dq %mm0,%xmm1
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[ ]*[a-f0-9]+: 0f 01 c9 mwait %eax,%ecx
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@ -11,9 +11,12 @@ _start:
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cvttps2pi %xmm4,%mm3
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fisttp (%eax)
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fisttpll (%eax)
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lfence
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maskmovq %mm7,%mm0
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mfence
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monitor
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movdq2q %xmm0, %mm1
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movnti %eax, (%eax)
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movntq %mm2,(%eax)
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movq2dq %mm0, %xmm1
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mwait
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@ -17,9 +17,12 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 0f 2c dc cvttps2pi %xmm4,%mm3
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[ ]*[a-f0-9]+: df 08 fisttp \(%rax\)
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[ ]*[a-f0-9]+: dd 08 fisttpll \(%rax\)
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[ ]*[a-f0-9]+: 0f ae e8 lfence
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[ ]*[a-f0-9]+: 0f f7 c7 maskmovq %mm7,%mm0
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[ ]*[a-f0-9]+: 0f ae f0 mfence
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[ ]*[a-f0-9]+: 0f 01 c8 monitor %rax,%rcx,%rdx
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[ ]*[a-f0-9]+: f2 0f d6 c8 movdq2q %xmm0,%mm1
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[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%rax\)
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[ ]*[a-f0-9]+: 0f e7 10 movntq %mm2,\(%rax\)
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[ ]*[a-f0-9]+: f3 0f d6 c8 movq2dq %mm0,%xmm1
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[ ]*[a-f0-9]+: 0f 01 c9 mwait %rax,%rcx
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@ -12,9 +12,12 @@ _start:
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cvttps2pi %xmm4,%mm3
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fisttp (%rax)
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fisttpll (%rax)
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lfence
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maskmovq %mm7,%mm0
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mfence
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monitor
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movdq2q %xmm0, %mm1
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movnti %eax, (%rax)
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movntq %mm2,(%rax)
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movq2dq %mm0, %xmm1
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mwait
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@ -1,3 +1,8 @@
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2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
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* i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
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* i386-tbl.h: Regenerated.
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2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
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@ -909,10 +909,10 @@ fucompi, 1, 0xdfe8, None, 2, Cpu686, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|N
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// Pentium4 extensions.
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movnti, 2, 0xfc3, None, 2, CpuSSE2, Modrm|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
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movnti, 2, 0xfc3, None, 2, CpuSSE2, Modrm|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|NoAVX, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
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clflush, 1, 0xfae, 0x7, 2, CpuClflush, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
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lfence, 0, 0xfae, 0xe8, 2, CpuSSE2, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 }
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mfence, 0, 0xfae, 0xf0, 2, CpuSSE2, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 }
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lfence, 0, 0xfae, 0xe8, 2, CpuSSE2, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoAVX, { 0 }
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mfence, 0, 0xfae, 0xf0, 2, CpuSSE2, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoAVX, { 0 }
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// Processors that do not support PAUSE treat this opcode as a NOP instruction.
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pause, 0, 0xf390, None, 2, Cpu186, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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@ -6910,7 +6910,7 @@ const template i386_optab[] =
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
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{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
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1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 },
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{ { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0 } },
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@ -6931,7 +6931,7 @@ const template i386_optab[] =
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,
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1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 },
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{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0 } } } },
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@ -6940,7 +6940,7 @@ const template i386_optab[] =
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,
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1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 },
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{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0 } } } },
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