mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-15 04:31:49 +08:00
Update AVX tests.
2011-08-19 Sergey A. Guriev <sergeya.a.guriev@intel.com> * gas/i386/avx-gather-intel.d: Added missing vpgather tests. * gas/i386/avx-gather.d: Likewise. * gas/i386/x86-64-avx-gather-intel.d: Likewise. * gas/i386/x86-64-avx-gather.d: Likewise. * gas/i386/avx-intel.d: Added missing vpinsrd and removed duplicated vpinsrb instructions. * gas/i386/avx.d: Likewise. * gas/i386/avx.s: Likewise. * gas/i386/ilp32/x86-64-avx-intel.d: Likewise. * gas/i386/ilp32/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx.s: Likewise.
This commit is contained in:
H.J. Lu
parent
860144e4f6
commit
be748880a3
@ -1,3 +1,20 @@
|
||||
2011-08-19 Sergey A. Guriev <sergeya.a.guriev@intel.com>
|
||||
|
||||
* gas/i386/avx-gather-intel.d: Added missing vpgather tests.
|
||||
* gas/i386/avx-gather.d: Likewise.
|
||||
* gas/i386/x86-64-avx-gather-intel.d: Likewise.
|
||||
* gas/i386/x86-64-avx-gather.d: Likewise.
|
||||
|
||||
* gas/i386/avx-intel.d: Added missing vpinsrd and removed
|
||||
duplicated vpinsrb instructions.
|
||||
* gas/i386/avx.d: Likewise.
|
||||
* gas/i386/avx.s: Likewise.
|
||||
* gas/i386/ilp32/x86-64-avx-intel.d: Likewise.
|
||||
* gas/i386/ilp32/x86-64-avx.d: Likewise.
|
||||
* gas/i386/x86-64-avx-intel.d: Likewise.
|
||||
* gas/i386/x86-64-avx.d: Likewise.
|
||||
* gas/i386/x86-64-avx.s: Likewise.
|
||||
|
||||
2011-08-10 Maciej W. Rozycki <macro@codesourcery.com>
|
||||
|
||||
* gas/mips/micromips@mips5.d: Rename to...
|
||||
|
||||
@ -57,4 +57,52 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm4\*8-0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x0\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x298\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 92 4c 7d 00 vgatherdpd xmm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 93 4c 7d 00 vgatherqpd xmm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 92 4c 7d 00 vgatherdpd ymm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 93 4c 7d 00 vgatherqpd ymm1,QWORD PTR \[ebp\+ymm7\*2\+0x0\],ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*1-0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x0\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x298\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*8-0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x0\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x298\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 69 92 4c 7d 00 vgatherdps xmm1,DWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 69 93 4c 7d 00 vgatherqps xmm1,DWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 92 4c 7d 00 vgatherdps ymm1,DWORD PTR \[ebp\+ymm7\*2\+0x0\],ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 93 4c 7d 00 vgatherqps xmm1,DWORD PTR \[ebp\+ymm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm4\*1-0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x0\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x298\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm4\*8-0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x0\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x298\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 69 90 4c 7d 00 vpgatherdd xmm1,DWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 69 91 4c 7d 00 vpgatherqd xmm1,DWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 90 4c 7d 00 vpgatherdd ymm1,DWORD PTR \[ebp\+ymm7\*2\+0x0\],ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 91 4c 7d 00 vpgatherqd xmm1,DWORD PTR \[ebp\+ymm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm4\*1-0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x0\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x298\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm4\*8-0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x0\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x298\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 90 4c 7d 00 vpgatherdq xmm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 91 4c 7d 00 vpgatherqq xmm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 90 4c 7d 00 vpgatherdq ymm1,QWORD PTR \[ebp\+xmm7\*2\+0x0\],ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 91 4c 7d 00 vpgatherqq ymm1,QWORD PTR \[ebp\+ymm7\*2\+0x0\],ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm4\*1-0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x0\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x298\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm4\*8-0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x0\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x298\],ymm5
|
||||
#pass
|
||||
|
||||
@ -56,4 +56,52 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 92 4c 7d 00 vgatherdpd %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 93 4c 7d 00 vgatherqpd %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 92 4c 7d 00 vgatherdpd %ymm2,0x0\(%ebp,%xmm7,2\),%ymm1
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 93 4c 7d 00 vgatherqpd %ymm2,0x0\(%ebp,%ymm7,2\),%ymm1
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 69 92 4c 7d 00 vgatherdps %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 69 93 4c 7d 00 vgatherqps %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 92 4c 7d 00 vgatherdps %ymm2,0x0\(%ebp,%ymm7,2\),%ymm1
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 93 4c 7d 00 vgatherqps %xmm2,0x0\(%ebp,%ymm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 69 90 4c 7d 00 vpgatherdd %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 69 91 4c 7d 00 vpgatherqd %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 90 4c 7d 00 vpgatherdd %ymm2,0x0\(%ebp,%ymm7,2\),%ymm1
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 91 4c 7d 00 vpgatherqd %xmm2,0x0\(%ebp,%ymm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 90 4c 7d 00 vpgatherdq %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 91 4c 7d 00 vpgatherqq %xmm2,0x0\(%ebp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 90 4c 7d 00 vpgatherdq %ymm2,0x0\(%ebp,%xmm7,2\),%ymm1
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 91 4c 7d 00 vpgatherqq %ymm2,0x0\(%ebp,%ymm7,2\),%ymm1
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm4,8\),%ymm6
|
||||
#pass
|
||||
|
||||
@ -1041,6 +1041,8 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 16 21 07 vpextrd DWORD PTR \[ecx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps ecx,xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[ecx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd xmm6,xmm4,ecx,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[ecx\],0x7
|
||||
[ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd xmm6,xmm4,ecx
|
||||
[ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sd xmm6,xmm4,DWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss xmm6,xmm4,ecx
|
||||
@ -1065,8 +1067,6 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb xmm6,xmm4,ecx,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[ecx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb xmm6,xmm4,ecx,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7
|
||||
[ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu xmm6,xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd ecx,xmm4
|
||||
@ -2891,6 +2891,9 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps ecx,xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[ecx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[ecx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd xmm6,xmm4,ecx,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[ecx\],0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[ecx\],0x7
|
||||
[ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd xmm6,xmm4,ecx
|
||||
[ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sd xmm6,xmm4,DWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sd xmm6,xmm4,DWORD PTR \[ecx\]
|
||||
@ -2928,9 +2931,6 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[ecx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[ecx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb xmm6,xmm4,ecx,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7
|
||||
[ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu xmm6,xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd ecx,xmm4
|
||||
|
||||
@ -1040,6 +1040,8 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 16 21 07 vpextrd \$0x7,%xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps \$0x7,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd \$0x7,%ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%ecx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd %ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sdl \(%ecx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss %ecx,%xmm4,%xmm6
|
||||
@ -1064,8 +1066,6 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb \$0x7,%ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb \$0x7,%ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd %xmm4,%ecx
|
||||
@ -2890,6 +2890,9 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps \$0x7,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd \$0x7,%ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%ecx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%ecx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd %ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sdl \(%ecx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sdl \(%ecx\),%xmm4,%xmm6
|
||||
@ -2927,9 +2930,6 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb \$0x7,%ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd %xmm4,%ecx
|
||||
|
||||
@ -1130,6 +1130,10 @@ _start:
|
||||
vextractps $7,%xmm4,%ecx
|
||||
vextractps $7,%xmm4,(%ecx)
|
||||
|
||||
# Tests for op imm8, regl/mem32, xmm, xmm
|
||||
vpinsrd $7,%ecx,%xmm4,%xmm6
|
||||
vpinsrd $7,(%ecx),%xmm4,%xmm6
|
||||
|
||||
# Tests for op regl/mem32, xmm, xmm
|
||||
vcvtsi2sd %ecx,%xmm4,%xmm6
|
||||
vcvtsi2sd (%ecx),%xmm4,%xmm6
|
||||
@ -1172,10 +1176,6 @@ _start:
|
||||
# Tests for op imm8, xmm, regq/mem8
|
||||
vpextrb $7,%xmm4,(%ecx)
|
||||
|
||||
# Tests for op imm8, regl/mem8, xmm, xmm
|
||||
vpinsrb $7,%ecx,%xmm4,%xmm6
|
||||
vpinsrb $7,(%ecx),%xmm4,%xmm6
|
||||
|
||||
# Tests for op xmm, xmm
|
||||
vmaskmovdqu %xmm4,%xmm6
|
||||
vmovq %xmm4,%xmm6
|
||||
@ -3110,6 +3110,11 @@ _start:
|
||||
vextractps DWORD PTR [ecx],xmm4,7
|
||||
vextractps [ecx],xmm4,7
|
||||
|
||||
# Tests for op imm8, regl/mem32, xmm, xmm
|
||||
vpinsrd xmm6,xmm4,ecx,7
|
||||
vpinsrd xmm6,xmm4,DWORD PTR [ecx],7
|
||||
vpinsrd xmm6,xmm4,[ecx],7
|
||||
|
||||
# Tests for op regl/mem32, xmm, xmm
|
||||
vcvtsi2sd xmm6,xmm4,ecx
|
||||
vcvtsi2sd xmm6,xmm4,DWORD PTR [ecx]
|
||||
@ -3165,11 +3170,6 @@ _start:
|
||||
vpextrb BYTE PTR [ecx],xmm4,7
|
||||
vpextrb [ecx],xmm4,7
|
||||
|
||||
# Tests for op imm8, regl/mem8, xmm, xmm
|
||||
vpinsrb xmm6,xmm4,ecx,7
|
||||
vpinsrb xmm6,xmm4,BYTE PTR [ecx],7
|
||||
vpinsrb xmm6,xmm4,[ecx],7
|
||||
|
||||
# Tests for op xmm, xmm
|
||||
vmaskmovdqu xmm6,xmm4
|
||||
vmovq xmm6,xmm4
|
||||
|
||||
@ -1065,6 +1065,8 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 16 21 07 vpextrd DWORD PTR \[rcx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps ecx,xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[rcx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd xmm6,xmm4,ecx,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[rcx\],0x7
|
||||
[ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd xmm6,xmm4,ecx
|
||||
[ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sd xmm6,xmm4,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss xmm6,xmm4,ecx
|
||||
@ -1094,8 +1096,6 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c5 f9 c5 cc 07 vpextrw ecx,xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb ecx,xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[rcx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb xmm6,xmm4,ecx,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7
|
||||
[ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu xmm6,xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd ecx,xmm4
|
||||
@ -3083,6 +3083,9 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps ecx,xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[rcx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[rcx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd xmm6,xmm4,ecx,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[rcx\],0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[rcx\],0x7
|
||||
[ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd xmm6,xmm4,ecx
|
||||
[ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sd xmm6,xmm4,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss xmm6,xmm4,ecx
|
||||
@ -3124,9 +3127,6 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb ecx,xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[rcx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[rcx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb xmm6,xmm4,ecx,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7
|
||||
[ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu xmm6,xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd ecx,xmm4
|
||||
|
||||
@ -1065,6 +1065,8 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 16 21 07 vpextrd \$0x7,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps \$0x7,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd \$0x7,%ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd %ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sdl \(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss %ecx,%xmm4,%xmm6
|
||||
@ -1094,8 +1096,6 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c5 f9 c5 cc 07 vpextrw \$0x7,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb \$0x7,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb \$0x7,%ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd %xmm4,%ecx
|
||||
@ -3083,6 +3083,9 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps \$0x7,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd \$0x7,%ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd %ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sdl \(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss %ecx,%xmm4,%xmm6
|
||||
@ -3124,9 +3127,6 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb \$0x7,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb \$0x7,%ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd %xmm4,%ecx
|
||||
|
||||
@ -105,4 +105,100 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm14\*8-0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*8\+0x0\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*8\+0x298\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 92 4c 7d 00 vgatherdpd xmm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 93 4c 7d 00 vgatherqpd xmm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 92 4c 7d 00 vgatherdpd ymm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 93 4c 7d 00 vgatherqpd ymm1,QWORD PTR \[rbp\+ymm7\*2\+0x0\],ymm2
|
||||
[ ]*[a-f0-9]+: c4 02 99 92 5c 75 00 vgatherdpd xmm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12
|
||||
[ ]*[a-f0-9]+: c4 02 99 93 5c 75 00 vgatherqpd xmm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12
|
||||
[ ]*[a-f0-9]+: c4 02 9d 92 5c 75 00 vgatherdpd ymm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],ymm12
|
||||
[ ]*[a-f0-9]+: c4 02 9d 93 5c 75 00 vgatherqpd ymm11,QWORD PTR \[r13\+ymm14\*2\+0x0\],ymm12
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*1-0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x0\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x298\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*8-0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x0\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x298\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*1\+0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm14\*1-0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*1\+0x0\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*1\+0x298\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*8\+0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm14\*8-0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*8\+0x0\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*8\+0x298\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 69 92 4c 7d 00 vgatherdps xmm1,DWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 69 93 4c 7d 00 vgatherqps xmm1,DWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 92 4c 7d 00 vgatherdps ymm1,DWORD PTR \[rbp\+ymm7\*2\+0x0\],ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 93 4c 7d 00 vgatherqps xmm1,DWORD PTR \[rbp\+ymm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 02 19 92 5c 75 00 vgatherdps xmm11,DWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12
|
||||
[ ]*[a-f0-9]+: c4 02 19 93 5c 75 00 vgatherqps xmm11,DWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12
|
||||
[ ]*[a-f0-9]+: c4 02 1d 92 5c 75 00 vgatherdps ymm11,DWORD PTR \[r13\+ymm14\*2\+0x0\],ymm12
|
||||
[ ]*[a-f0-9]+: c4 02 1d 93 5c 75 00 vgatherqps xmm11,DWORD PTR \[r13\+ymm14\*2\+0x0\],xmm12
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm4\*1-0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x0\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*1\+0x298\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm4\*8-0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x0\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm4\*8\+0x298\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 35 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*1\+0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 35 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm14\*1-0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 35 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*1\+0x0\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 35 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*1\+0x298\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 08 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*8\+0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 f8 ff ff ff vgatherdps xmm6,DWORD PTR \[xmm14\*8-0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 00 00 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*8\+0x0\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 98 02 00 00 vgatherdps xmm6,DWORD PTR \[xmm14\*8\+0x298\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 69 90 4c 7d 00 vpgatherdd xmm1,DWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 69 91 4c 7d 00 vpgatherqd xmm1,DWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 90 4c 7d 00 vpgatherdd ymm1,DWORD PTR \[rbp\+ymm7\*2\+0x0\],ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 91 4c 7d 00 vpgatherqd xmm1,DWORD PTR \[rbp\+ymm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 02 19 90 5c 75 00 vpgatherdd xmm11,DWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12
|
||||
[ ]*[a-f0-9]+: c4 02 19 91 5c 75 00 vpgatherqd xmm11,DWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12
|
||||
[ ]*[a-f0-9]+: c4 02 1d 90 5c 75 00 vpgatherdd ymm11,DWORD PTR \[r13\+ymm14\*2\+0x0\],ymm12
|
||||
[ ]*[a-f0-9]+: c4 02 1d 91 5c 75 00 vpgatherqd xmm11,DWORD PTR \[r13\+ymm14\*2\+0x0\],xmm12
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm4\*1-0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x0\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*1\+0x298\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm4\*8-0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x0\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm4\*8\+0x298\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 35 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*1\+0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 35 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm14\*1-0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 35 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*1\+0x0\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 35 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*1\+0x298\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 08 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*8\+0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 f8 ff ff ff vpgatherdd xmm6,DWORD PTR \[xmm14\*8-0x8\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 00 00 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*8\+0x0\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 98 02 00 00 vpgatherdd xmm6,DWORD PTR \[xmm14\*8\+0x298\],xmm5
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 90 4c 7d 00 vpgatherdq xmm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 91 4c 7d 00 vpgatherqq xmm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],xmm2
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 90 4c 7d 00 vpgatherdq ymm1,QWORD PTR \[rbp\+xmm7\*2\+0x0\],ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 91 4c 7d 00 vpgatherqq ymm1,QWORD PTR \[rbp\+ymm7\*2\+0x0\],ymm2
|
||||
[ ]*[a-f0-9]+: c4 02 99 90 5c 75 00 vpgatherdq xmm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12
|
||||
[ ]*[a-f0-9]+: c4 02 99 91 5c 75 00 vpgatherqq xmm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],xmm12
|
||||
[ ]*[a-f0-9]+: c4 02 9d 90 5c 75 00 vpgatherdq ymm11,QWORD PTR \[r13\+xmm14\*2\+0x0\],ymm12
|
||||
[ ]*[a-f0-9]+: c4 02 9d 91 5c 75 00 vpgatherqq ymm11,QWORD PTR \[r13\+ymm14\*2\+0x0\],ymm12
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm4\*1-0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x0\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x298\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm4\*8-0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x0\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*8\+0x298\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*1\+0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm14\*1-0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*1\+0x0\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*1\+0x298\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*8\+0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm14\*8-0x8\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 00 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*8\+0x0\],ymm5
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 98 02 00 00 vpgatherdq ymm6,QWORD PTR \[xmm14\*8\+0x298\],ymm5
|
||||
#pass
|
||||
|
||||
@ -104,4 +104,100 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm14,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm14,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm14,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 92 4c 7d 00 vgatherdpd %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 93 4c 7d 00 vgatherqpd %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 92 4c 7d 00 vgatherdpd %ymm2,0x0\(%rbp,%xmm7,2\),%ymm1
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 93 4c 7d 00 vgatherqpd %ymm2,0x0\(%rbp,%ymm7,2\),%ymm1
|
||||
[ ]*[a-f0-9]+: c4 02 99 92 5c 75 00 vgatherdpd %xmm12,0x0\(%r13,%xmm14,2\),%xmm11
|
||||
[ ]*[a-f0-9]+: c4 02 99 93 5c 75 00 vgatherqpd %xmm12,0x0\(%r13,%xmm14,2\),%xmm11
|
||||
[ ]*[a-f0-9]+: c4 02 9d 92 5c 75 00 vgatherdpd %ymm12,0x0\(%r13,%xmm14,2\),%ymm11
|
||||
[ ]*[a-f0-9]+: c4 02 9d 93 5c 75 00 vgatherqpd %ymm12,0x0\(%r13,%ymm14,2\),%ymm11
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm14,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm14,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm14,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 35 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm14,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm14,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm14,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm14,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 92 34 f5 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm14,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 69 92 4c 7d 00 vgatherdps %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 69 93 4c 7d 00 vgatherqps %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 92 4c 7d 00 vgatherdps %ymm2,0x0\(%rbp,%ymm7,2\),%ymm1
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 93 4c 7d 00 vgatherqps %xmm2,0x0\(%rbp,%ymm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 02 19 92 5c 75 00 vgatherdps %xmm12,0x0\(%r13,%xmm14,2\),%xmm11
|
||||
[ ]*[a-f0-9]+: c4 02 19 93 5c 75 00 vgatherqps %xmm12,0x0\(%r13,%xmm14,2\),%xmm11
|
||||
[ ]*[a-f0-9]+: c4 02 1d 92 5c 75 00 vgatherdps %ymm12,0x0\(%r13,%ymm14,2\),%ymm11
|
||||
[ ]*[a-f0-9]+: c4 02 1d 93 5c 75 00 vgatherqps %xmm12,0x0\(%r13,%ymm14,2\),%xmm11
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 25 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 92 34 e5 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 35 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm14,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 35 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm14,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 35 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm14,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 35 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm14,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 08 00 00 00 vgatherdps %xmm5,0x8\(,%xmm14,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 f8 ff ff ff vgatherdps %xmm5,-0x8\(,%xmm14,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 00 00 00 00 vgatherdps %xmm5,0x0\(,%xmm14,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 92 34 f5 98 02 00 00 vgatherdps %xmm5,0x298\(,%xmm14,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 69 90 4c 7d 00 vpgatherdd %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 69 91 4c 7d 00 vpgatherqd %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 90 4c 7d 00 vpgatherdd %ymm2,0x0\(%rbp,%ymm7,2\),%ymm1
|
||||
[ ]*[a-f0-9]+: c4 e2 6d 91 4c 7d 00 vpgatherqd %xmm2,0x0\(%rbp,%ymm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 02 19 90 5c 75 00 vpgatherdd %xmm12,0x0\(%r13,%xmm14,2\),%xmm11
|
||||
[ ]*[a-f0-9]+: c4 02 19 91 5c 75 00 vpgatherqd %xmm12,0x0\(%r13,%xmm14,2\),%xmm11
|
||||
[ ]*[a-f0-9]+: c4 02 1d 90 5c 75 00 vpgatherdd %ymm12,0x0\(%r13,%ymm14,2\),%ymm11
|
||||
[ ]*[a-f0-9]+: c4 02 1d 91 5c 75 00 vpgatherqd %xmm12,0x0\(%r13,%ymm14,2\),%xmm11
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 25 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm4,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 51 90 34 e5 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm4,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 35 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm14,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 35 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm14,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 35 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm14,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 35 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm14,1\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 08 00 00 00 vpgatherdd %xmm5,0x8\(,%xmm14,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 f8 ff ff ff vpgatherdd %xmm5,-0x8\(,%xmm14,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 00 00 00 00 vpgatherdd %xmm5,0x0\(,%xmm14,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 a2 51 90 34 f5 98 02 00 00 vpgatherdd %xmm5,0x298\(,%xmm14,8\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 90 4c 7d 00 vpgatherdq %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 e9 91 4c 7d 00 vpgatherqq %xmm2,0x0\(%rbp,%xmm7,2\),%xmm1
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 90 4c 7d 00 vpgatherdq %ymm2,0x0\(%rbp,%xmm7,2\),%ymm1
|
||||
[ ]*[a-f0-9]+: c4 e2 ed 91 4c 7d 00 vpgatherqq %ymm2,0x0\(%rbp,%ymm7,2\),%ymm1
|
||||
[ ]*[a-f0-9]+: c4 02 99 90 5c 75 00 vpgatherdq %xmm12,0x0\(%r13,%xmm14,2\),%xmm11
|
||||
[ ]*[a-f0-9]+: c4 02 99 91 5c 75 00 vpgatherqq %xmm12,0x0\(%r13,%xmm14,2\),%xmm11
|
||||
[ ]*[a-f0-9]+: c4 02 9d 90 5c 75 00 vpgatherdq %ymm12,0x0\(%r13,%xmm14,2\),%ymm11
|
||||
[ ]*[a-f0-9]+: c4 02 9d 91 5c 75 00 vpgatherqq %ymm12,0x0\(%r13,%ymm14,2\),%ymm11
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 25 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm4,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 e2 d5 90 34 e5 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm4,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm14,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm14,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm14,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 35 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm14,1\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm14,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm14,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 00 00 00 00 vpgatherdq %ymm5,0x0\(,%xmm14,8\),%ymm6
|
||||
[ ]*[a-f0-9]+: c4 a2 d5 90 34 f5 98 02 00 00 vpgatherdq %ymm5,0x298\(,%xmm14,8\),%ymm6
|
||||
#pass
|
||||
|
||||
@ -1065,6 +1065,8 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 16 21 07 vpextrd DWORD PTR \[rcx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps ecx,xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[rcx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd xmm6,xmm4,ecx,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[rcx\],0x7
|
||||
[ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd xmm6,xmm4,ecx
|
||||
[ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sd xmm6,xmm4,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss xmm6,xmm4,ecx
|
||||
@ -1094,8 +1096,6 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c5 f9 c5 cc 07 vpextrw ecx,xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb ecx,xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[rcx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb xmm6,xmm4,ecx,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7
|
||||
[ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu xmm6,xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd ecx,xmm4
|
||||
@ -3083,6 +3083,9 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps ecx,xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[rcx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps DWORD PTR \[rcx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd xmm6,xmm4,ecx,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[rcx\],0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd xmm6,xmm4,DWORD PTR \[rcx\],0x7
|
||||
[ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd xmm6,xmm4,ecx
|
||||
[ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sd xmm6,xmm4,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss xmm6,xmm4,ecx
|
||||
@ -3124,9 +3127,6 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb ecx,xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[rcx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb BYTE PTR \[rcx\],xmm4,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb xmm6,xmm4,ecx,0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7
|
||||
[ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu xmm6,xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd ecx,xmm4
|
||||
|
||||
@ -1064,6 +1064,8 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 16 21 07 vpextrd \$0x7,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps \$0x7,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd \$0x7,%ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd %ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sdl \(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss %ecx,%xmm4,%xmm6
|
||||
@ -1093,8 +1095,6 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c5 f9 c5 cc 07 vpextrw \$0x7,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb \$0x7,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb \$0x7,%ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd %xmm4,%ecx
|
||||
@ -3082,6 +3082,9 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 e1 07 vextractps \$0x7,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 07 vextractps \$0x7,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 f1 07 vpinsrd \$0x7,%ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 22 31 07 vpinsrd \$0x7,\(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 db 2a f1 vcvtsi2sd %ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 db 2a 31 vcvtsi2sdl \(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 da 2a f1 vcvtsi2ss %ecx,%xmm4,%xmm6
|
||||
@ -3123,9 +3126,6 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 e1 07 vpextrb \$0x7,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 07 vpextrb \$0x7,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 f1 07 vpinsrb \$0x7,%ecx,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 31 07 vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd %xmm4,%ecx
|
||||
|
||||
@ -1166,6 +1166,10 @@ _start:
|
||||
vextractps $7,%xmm4,%ecx
|
||||
vextractps $7,%xmm4,(%rcx)
|
||||
|
||||
# Tests for op imm8, regl/mem32, xmm, xmm
|
||||
vpinsrd $7,%ecx,%xmm4,%xmm6
|
||||
vpinsrd $7,(%rcx),%xmm4,%xmm6
|
||||
|
||||
# Tests for op regl/mem32, xmm, xmm
|
||||
vcvtsi2sd %ecx,%xmm4,%xmm6
|
||||
vcvtsi2sd (%rcx),%xmm4,%xmm6
|
||||
@ -1217,10 +1221,6 @@ _start:
|
||||
vpextrb $7,%xmm4,%rcx
|
||||
vpextrb $7,%xmm4,(%rcx)
|
||||
|
||||
# Tests for op imm8, regl/mem8, xmm, xmm
|
||||
vpinsrb $7,%ecx,%xmm4,%xmm6
|
||||
vpinsrb $7,(%rcx),%xmm4,%xmm6
|
||||
|
||||
# Tests for op xmm, xmm
|
||||
vmaskmovdqu %xmm4,%xmm6
|
||||
vmovq %xmm4,%xmm6
|
||||
@ -3333,6 +3333,11 @@ _start:
|
||||
vextractps DWORD PTR [rcx],xmm4,7
|
||||
vextractps [rcx],xmm4,7
|
||||
|
||||
# Tests for op imm8, regl/mem32, xmm, xmm
|
||||
vpinsrd xmm6,xmm4,ecx,7
|
||||
vpinsrd xmm6,xmm4,DWORD PTR [rcx],7
|
||||
vpinsrd xmm6,xmm4,[rcx],7
|
||||
|
||||
# Tests for op regl/mem32, xmm, xmm
|
||||
vcvtsi2sd xmm6,xmm4,ecx
|
||||
vcvtsi2sd xmm6,xmm4,DWORD PTR [rcx]
|
||||
@ -3396,11 +3401,6 @@ _start:
|
||||
vpextrb BYTE PTR [rcx],xmm4,7
|
||||
vpextrb [rcx],xmm4,7
|
||||
|
||||
# Tests for op imm8, regl/mem8, xmm, xmm
|
||||
vpinsrb xmm6,xmm4,ecx,7
|
||||
vpinsrb xmm6,xmm4,BYTE PTR [rcx],7
|
||||
vpinsrb xmm6,xmm4,[rcx],7
|
||||
|
||||
# Tests for op xmm, xmm
|
||||
vmaskmovdqu xmm6,xmm4
|
||||
vmovq xmm6,xmm4
|
||||
|
||||
Loading…
Reference in New Issue
Block a user