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Preliminary support for 68HC12
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@ -1,3 +1,14 @@
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2000-11-26 Stephane Carrez <Stephane.Carrez@worldnet.fr>
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* dv-m68hc11.c (m68hc11cpu_io_read_buffer): Use attach_size
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instead of a hard-coded value.
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(m68hc11cpu_io_write_buffer): Likewise.
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(dv_m68hc11_descriptor): Define a 68hc12 device.
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* dv-m68hc11eepr.c (dv_m68hc11eepr_descriptor): Likewise.
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* dv-m68hc11tim.c (dv_m68hc11tim_descriptor): Likewise.
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* dv-m68hc11spi.c (dv_m68hc11spi_descriptor): Likewise.
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* dv-m68hc11sio.c (dv_m68hc11sio_descriptor): Likewise.
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2000-11-22 Stephane Carrez <Stephane.Carrez@worldnet.fr>
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* dv-m68hc11.c (attach_m68hc11_regs): Register a delete handler.
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@ -1,4 +1,4 @@
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/* dv-m68hc11.c -- CPU 68HC11 as a device.
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/* dv-m68hc11.c -- CPU 68HC11&68HC12 as a device.
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Copyright (C) 1999, 2000 Free Software Foundation, Inc.
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Written by Stephane Carrez (stcarrez@worldnet.fr)
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(From a driver model Contributed by Cygnus Solutions.)
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@ -26,12 +26,12 @@
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/* DEVICE
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m68hc11cpu - m68hc11 cpu virtual device
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m68hc12cpu - m68hc12 cpu virtual device
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DESCRIPTION
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Implements the external m68hc11 functionality. This includes the
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delivery of of interrupts generated from other devices and the
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Implements the external m68hc11/68hc12 functionality. This includes
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the delivery of of interrupts generated from other devices and the
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handling of device specific registers.
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@ -39,7 +39,7 @@
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reg <base> <size>
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Register base (should be 0x1000 0x03f).
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Register base (should be 0x1000 0x03f for C11, 0x0000 0x3ff for HC12).
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clock <hz>
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@ -272,8 +272,6 @@ m68hc11cpu_finish (struct hw *me)
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attach_m68hc11_regs (me, controller);
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}
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/* An event arrives on an interrupt port. */
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static void
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@ -442,7 +440,7 @@ m68hc11cpu_io_read_buffer (struct hw *me,
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while (nr_bytes)
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{
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if (base >= 0x3F)
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if (base >= controller->attach_size)
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break;
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memcpy (dest, &cpu->ios[base], 1);
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@ -574,7 +572,7 @@ m68hc11cpu_io_write_buffer (struct hw *me,
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while (nr_bytes)
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{
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uint8 val;
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if (base >= 0x3F)
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if (base >= controller->attach_size)
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break;
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val = *((uint8*) source);
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@ -588,7 +586,8 @@ m68hc11cpu_io_write_buffer (struct hw *me,
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}
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const struct hw_descriptor dv_m68hc11_descriptor[] = {
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{ "m68hc11", m68hc11cpu_finish, },
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{ "m68hc11", m68hc11cpu_finish },
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{ "m68hc12", m68hc11cpu_finish },
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{ NULL },
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};
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@ -621,7 +621,8 @@ m68hc11eepr_io_write_buffer (struct hw *me,
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}
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const struct hw_descriptor dv_m68hc11eepr_descriptor[] = {
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{ "m68hc11eepr", m68hc11eepr_finish, },
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{ "m68hc11eepr", m68hc11eepr_finish },
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{ "m68hc12eepr", m68hc11eepr_finish },
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{ NULL },
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};
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@ -657,7 +657,8 @@ m68hc11sio_io_write_buffer (struct hw *me,
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const struct hw_descriptor dv_m68hc11sio_descriptor[] = {
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{ "m68hc11sio", m68hc11sio_finish, },
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{ "m68hc11sio", m68hc11sio_finish },
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{ "m68hc12sio", m68hc11sio_finish },
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{ NULL },
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};
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@ -527,7 +527,8 @@ m68hc11spi_io_write_buffer (struct hw *me,
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const struct hw_descriptor dv_m68hc11spi_descriptor[] = {
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{ "m68hc11spi", m68hc11spi_finish, },
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{ "m68hc11spi", m68hc11spi_finish },
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{ "m68hc12spi", m68hc11spi_finish },
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{ NULL },
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};
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@ -111,7 +111,6 @@ attach_m68hc11tim_regs (struct hw *me,
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me);
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}
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static void
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m68hc11tim_finish (struct hw *me)
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{
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@ -128,7 +127,7 @@ m68hc11tim_finish (struct hw *me)
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#else
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me->to_ioctl = m68hc11tim_ioctl;
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#endif
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/* Preset defaults. */
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controller->clock_prescaler = 1;
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controller->tcnt_adjust = 0;
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@ -688,7 +687,8 @@ m68hc11tim_io_write_buffer (struct hw *me,
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const struct hw_descriptor dv_m68hc11tim_descriptor[] = {
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{ "m68hc11tim", m68hc11tim_finish, },
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{ "m68hc11tim", m68hc11tim_finish },
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{ "m68hc12tim", m68hc11tim_finish },
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{ NULL },
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};
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