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ubsan: epiphany: left shift of negative value
Two places in epiphany_cgen_extract_operand, "value" is a long. value = ((((value) << (1))) + (pc)); cpu/ * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than shift left to avoid UB on left shift of negative values. opcodes/ * epiphany-ibld.c: Regenerate.
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@ -1,3 +1,8 @@
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2019-12-11 Alan Modra <amodra@gmail.com>
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* epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
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shift left to avoid UB on left shift of negative values.
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2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
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* bpf.cpu: Fix comment describing the 128-bit instruction format.
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@ -149,11 +149,11 @@
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(df f-simm8 "branch displacement" (PCREL-ADDR RELOC) 15 8 INT
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((value pc) (sra SI (sub SI value pc) 1))
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((value pc) (add SI (sll SI value 1) pc)))
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((value pc) (add SI (mul SI value 2) pc)))
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(df f-simm24 "branch displacement" (PCREL-ADDR RELOC) 31 24 INT
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((value pc) (sra SI (sub SI value pc) 1))
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((value pc) (add SI (sll SI value 1) pc)))
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((value pc) (add SI (mul SI value 2) pc)))
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(df f-sdisp3 "signed immediate 3 bit" () 9 3 INT #f #f)
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@ -1,3 +1,7 @@
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2019-12-11 Alan Modra <amodra@gmail.com>
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* epiphany-ibld.c: Regenerate.
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2019-12-10 Alan Modra <amodra@gmail.com>
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PR 24960
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@ -1100,7 +1100,7 @@ epiphany_cgen_extract_operand (CGEN_CPU_DESC cd,
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{
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long value;
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length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 31, 24, 32, total_length, pc, & value);
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value = ((((value) << (1))) + (pc));
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value = ((((value) * (2))) + (pc));
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fields->f_simm24 = value;
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}
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break;
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@ -1111,7 +1111,7 @@ epiphany_cgen_extract_operand (CGEN_CPU_DESC cd,
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{
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long value;
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length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, pc, & value);
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value = ((((value) << (1))) + (pc));
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value = ((((value) * (2))) + (pc));
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fields->f_simm8 = value;
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}
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break;
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