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x86: Process ImmExt without operands
To support Intel AMX instructions with 8-bit immediate opcode extension, but without operands: tilerelease, 0, 0x49, 0xc0, 1, CpuAMX_TILE|Cpu64, Vex|VexOpcode=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } process ImmExt without operands. * config/tc-i386.c (md_assemble): Process ImmExt without operands.
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@ -1,3 +1,8 @@
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2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (md_assemble): Process ImmExt without
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operands.
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2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (check_VecOperands): Replace vecsib with sib.
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@ -4873,8 +4873,12 @@ md_assemble (char *line)
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if (!process_operands ())
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return;
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}
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else if (!quiet_warnings && i.tm.opcode_modifier.ugh)
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else
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{
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if (i.tm.opcode_modifier.immext)
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process_immext ();
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if (!quiet_warnings && i.tm.opcode_modifier.ugh)
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/* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc. */
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as_warn (_("translating to `%sp'"), i.tm.name);
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}
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