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* config/tc-avr.c: New AVR_ISA_ defined.
(md_assemble): Handle opcodes with optional operands (lpm,elpm). (avr_operand): Handle 'a', 'v' and 'z' constraint letters needed for `fmul', `movw' and `lpm R,Z' instructions. (avr_operands): Warn if current opcode is a two-word instruction and previous opcode was cpse/sbic/sbis/sbrc/sbrs. (avr_opcodes): New commands added. (REGISTER_P): Check 'a' and 'v' constraint letters. (mcu_types): New MCU added.
This commit is contained in:
Denis Chertykov
parent
3c504221d4
commit
b170af938f
@ -1,3 +1,15 @@
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Sun Apr 23 16:45:45 2000 Denis Chertykov <denisc@overta.ru>
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* config/tc-avr.c: New AVR_ISA_ defined.
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(md_assemble): Handle opcodes with optional operands (lpm,elpm).
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(avr_operand): Handle 'a', 'v' and 'z' constraint letters needed
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for `fmul', `movw' and `lpm R,Z' instructions.
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(avr_operands): Warn if current opcode is a two-word instruction
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and previous opcode was cpse/sbic/sbis/sbrc/sbrs.
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(avr_opcodes): New commands added.
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(REGISTER_P): Check 'a' and 'v' constraint letters.
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(mcu_types): New MCU added.
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2000-05-01 Alan Modra <alan@linuxcare.com.au>
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* configure.in: Set bfd_gas=yes on i386-*-pe and i386-*-nt* to
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@ -29,11 +29,28 @@ const char comment_chars[] = ";";
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const char line_comment_chars[] = "#";
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const char line_separator_chars[] = "$";
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#define AVR_ISA_1200 1
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#define AVR_ISA_2xxx 3
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#define AVR_ISA_MEGA_x03 0x17
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#define AVR_ISA_MEGA 0x10
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#define AVR_ISA_MEGA_161 0x1b
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#define AVR_ISA_1200 0x0001 /* in the beginning there was ... */
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#define AVR_ISA_LPM 0x0002 /* device has LPM */
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#define AVR_ISA_LPMX 0x0004 /* device has LPM Rd,Z[+] */
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#define AVR_ISA_SRAM 0x0008 /* device has SRAM (LD, ST, PUSH, POP, ...) */
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#define AVR_ISA_WRAP 0x0010 /* device has exactly 8K program memory */
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#define AVR_ISA_MEGA 0x0020 /* device has >8K program memory (JMP, CALL) */
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#define AVR_ISA_MUL 0x0040 /* device has new core (MUL, MOVW, ...) */
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#define AVR_ISA_ELPM 0x0080 /* device has >64K program memory (ELPM) */
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#define AVR_ISA_ELPMX 0x0100 /* device has ELPM Rd,Z[+] (none yet) */
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#define AVR_ISA_SPM 0x0200 /* device can program itself (<=64K) */
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#define AVR_ISA_ESPM 0x0400 /* device can program itself (>64K, none yet) */
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#define AVR_ISA_EIND 0x0800 /* device has >128K program memory (none yet) */
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#define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
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#define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
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#define AVR_ISA_85xx (AVR_ISA_2xxx | AVR_ISA_WRAP)
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#define AVR_ISA_M603 (AVR_ISA_2xxx | AVR_ISA_MEGA)
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#define AVR_ISA_M103 (AVR_ISA_M603 | AVR_ISA_ELPM)
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#define AVR_ISA_M161 (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_LPMX | AVR_ISA_SPM)
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#define AVR_ISA_94K (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_LPMX)
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#define AVR_ISA_ALL 0xFFFF
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const char *md_shortopts = "m:";
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struct mcu_type_s
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@ -45,11 +62,16 @@ struct mcu_type_s
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static struct mcu_type_s mcu_types[] =
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{
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{"avr1", AVR_ISA_1200, bfd_mach_avr1},
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{"avr2", AVR_ISA_2xxx, bfd_mach_avr2},
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{"avr3", AVR_ISA_MEGA_x03, bfd_mach_avr3},
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{"avr4", AVR_ISA_MEGA_161, bfd_mach_avr4},
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{"avr1", AVR_ISA_TINY1, bfd_mach_avr1},
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{"avr2", AVR_ISA_85xx, bfd_mach_avr2},
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{"avr3", AVR_ISA_M103, bfd_mach_avr3},
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{"avr4", AVR_ISA_ALL, bfd_mach_avr4},
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{"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
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{"attiny10", AVR_ISA_TINY1, bfd_mach_avr1},
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{"attiny11", AVR_ISA_TINY1, bfd_mach_avr1},
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{"attiny12", AVR_ISA_TINY1, bfd_mach_avr1},
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{"attiny15", AVR_ISA_TINY1, bfd_mach_avr1},
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{"attiny28", AVR_ISA_TINY1, bfd_mach_avr1},
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{"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2},
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{"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2},
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{"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2},
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@ -58,11 +80,15 @@ static struct mcu_type_s mcu_types[] =
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{"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2},
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{"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2},
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{"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2},
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{"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2},
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{"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2},
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{"atmega603", AVR_ISA_MEGA_x03, bfd_mach_avr3},
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{"atmega103", AVR_ISA_MEGA_x03, bfd_mach_avr3},
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{"atmega161", AVR_ISA_MEGA_161, bfd_mach_avr4},
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{"at90s8515", AVR_ISA_85xx, bfd_mach_avr2},
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{"at90s8535", AVR_ISA_85xx, bfd_mach_avr2},
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{"at90c8534", AVR_ISA_85xx, bfd_mach_avr2},
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{"atmega603", AVR_ISA_M603, bfd_mach_avr3},
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{"atmega103", AVR_ISA_M103, bfd_mach_avr3},
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{"atmega161", AVR_ISA_M161, bfd_mach_avr4},
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{"at94k10", AVR_ISA_94K, bfd_mach_avr4},
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{"at94k20", AVR_ISA_94K, bfd_mach_avr4},
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{"at94k40", AVR_ISA_94K, bfd_mach_avr4},
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{NULL, 0, 0}
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};
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@ -83,7 +109,11 @@ const pseudo_typeS md_pseudo_table[] =
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};
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#define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
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#define REGISTER_P(x) ((x) == 'r' || (x) == 'd' || (x) == 'w')
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#define REGISTER_P(x) ((x) == 'r' \
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|| (x) == 'd' \
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|| (x) == 'w' \
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|| (x) == 'a' \
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|| (x) == 'v')
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struct avr_opcodes_s
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{
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@ -105,24 +135,29 @@ static char *parse_exp (char *s, expressionS * op);
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static bfd_reloc_code_real_type avr_ldi_expression (expressionS *exp);
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long md_pcrel_from_section PARAMS ((fixS *, segT));
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/* constraint letters
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r - any register
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d - `ldi' register (r16-r31)
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v - `movw' even register (r0, r2, ..., r28, r30)
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a - `fmul' register (r16-r23)
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w - `adiw' register (r24,r26,r28,r30)
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e - pointer registers (X,Y,Z)
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b - base pointer register and displacement ([YZ]+disp)
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z - Z pointer register (for [e]lpm Rd,Z[+])
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M - immediate value from 0 to 255
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n - immediate value from 0 to 255 ( n = ~M ). Relocation impossible
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w - `adiw' register (r24,r26,r28,r30)
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s - immediate value from 0 to 7
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P - Port address value from 0 to 64. (in, out)
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p - Port address value from 0 to 32. (cbi, sbi, sbic, sbis)
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K - immediate value from 0 to 64 (used in `adiw', `sbiw')
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e - pointer regegisters (X,Y,Z)
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b - base pointer register and displacement ([YZ]+disp)
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i - immediate value
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l - signed pc relative offset from -64 to 63
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L - signed pc relative offset from -2048 to 2047
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h - absolut code address (call, jmp)
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S - immediate value from 0 to 7 (S = s << 4)
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*/
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struct avr_opcodes_s avr_opcodes[] =
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{
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{"adc", "r,r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00},
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@ -133,7 +168,7 @@ struct avr_opcodes_s avr_opcodes[] =
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{"cpse", "r,r", "000100rdddddrrrr", 1, AVR_ISA_1200, 0x1000},
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{"eor", "r,r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400},
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{"mov", "r,r", "001011rdddddrrrr", 1, AVR_ISA_1200, 0x2c00},
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{"mul", "r,r", "100111rdddddrrrr", 1, AVR_ISA_MEGA_161, 0x9c00},
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{"mul", "r,r", "100111rdddddrrrr", 1, AVR_ISA_MUL, 0x9c00},
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{"or", "r,r", "001010rdddddrrrr", 1, AVR_ISA_1200, 0x2800},
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{"sbc", "r,r", "000010rdddddrrrr", 1, AVR_ISA_1200, 0x0800},
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{"sub", "r,r", "000110rdddddrrrr", 1, AVR_ISA_1200, 0x1800},
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@ -230,7 +265,7 @@ struct avr_opcodes_s avr_opcodes[] =
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{"clz", "", "1001010010011000", 1, AVR_ISA_1200, 0x9498},
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{"icall","", "1001010100001001", 1, AVR_ISA_2xxx, 0x9509},
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{"ijmp", "", "1001010000001001", 1, AVR_ISA_2xxx, 0x9409},
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{"lpm", "", "1001010111001000", 1, AVR_ISA_2xxx, 0x95c8},
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{"lpm", "", "1001010111001000", 1, AVR_ISA_TINY1,0x95c8},
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{"nop", "", "0000000000000000", 1, AVR_ISA_1200, 0x0000},
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{"ret", "", "1001010100001000", 1, AVR_ISA_1200, 0x9508},
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{"reti", "", "1001010100011000", 1, AVR_ISA_1200, 0x9518},
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@ -244,7 +279,22 @@ struct avr_opcodes_s avr_opcodes[] =
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{"sez", "", "1001010000011000", 1, AVR_ISA_1200, 0x9418},
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{"sleep","", "1001010110001000", 1, AVR_ISA_1200, 0x9588},
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{"wdr", "", "1001010110101000", 1, AVR_ISA_1200, 0x95a8},
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{"elpm", "", "1001010111011000", 1, AVR_ISA_MEGA_x03, 0x95d8},
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{"elpm", "", "1001010111011000", 1, AVR_ISA_ELPM, 0x95d8},
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{"spm", "", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8},
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{"movw", "v,v", "00000001ddddrrrr", 1, AVR_ISA_MUL, 0x0100},
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{"muls", "d,d", "00000010ddddrrrr", 1, AVR_ISA_MUL, 0x0200},
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{"mulsu","a,a", "000000110ddd0rrr", 1, AVR_ISA_MUL, 0x0300},
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{"fmul", "a,a", "000000110ddd1rrr", 1, AVR_ISA_MUL, 0x0308},
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{"fmuls","a,a", "000000111ddd0rrr", 1, AVR_ISA_MUL, 0x0380},
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{"fmulsu","a,a","000000111ddd1rrr", 1, AVR_ISA_MUL, 0x0388},
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{"lpmx", "r,z", "1001000ddddd010+", 1, AVR_ISA_LPMX, 0x9004},
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/* these are for devices that don't exists yet */
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/* >64K program memory, new core */
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{"elpmx","r,z", "1001000ddddd011+", 1, AVR_ISA_ELPMX,0x9006},
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{"espm", "", "1001010111111000", 1, AVR_ISA_ESPM, 0x95f8},
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/* >128K program memory (PC = EIND:Z) */
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{"eicall", "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519},
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{"eijmp", "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419},
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{NULL, NULL, NULL, 0, 0, 0}
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};
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@ -387,8 +437,8 @@ md_parse_option (c, arg)
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}
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symbolS *
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md_undefined_symbol (name)
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char *name;
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md_undefined_symbol(name)
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char *name;
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{
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return 0;
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}
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@ -464,9 +514,16 @@ md_begin ()
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for (i = 0; i < sizeof (exp_mod) / sizeof (exp_mod[0]); ++i)
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hash_insert (avr_mod_hash, EXP_MOD_NAME(i), (void*)(i+10));
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/* Construct symbols for each register */
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/* FIXME: register names are in the same namespace as labels.
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This means that C functions or global variables with the same
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name as a register will cause assembler errors, even though
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such names (r0-r31) are perfectly valid in C. I'd suggest to
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put '%' or "." in front of register names both here and in avr-gcc. */
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for (i = 0; i < 32; i++)
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{
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char buf[5];
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char buf[10];
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sprintf (buf, "r%d", i);
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symbol_table_insert (symbol_new (buf, reg_section, i,
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@ -475,7 +532,7 @@ md_begin ()
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symbol_table_insert (symbol_new (buf, reg_section, i,
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&zero_address_frag));
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}
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bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
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}
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@ -490,6 +547,7 @@ avr_operands (opcode, line)
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char *frag = frag_more (opcode->insn_size * 2);
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char *str = *line;
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int where = frag - frag_now->fr_literal;
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static unsigned int prev = 0; /* previous opcode */
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/* Opcode have operands. */
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if (*op)
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@ -537,14 +595,29 @@ avr_operands (opcode, line)
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reg1 <<= 4;
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bin |= reg1 | reg2;
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}
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/* detect undefined combinations (like lpm r31,Z+) */
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if (((bin & 0xFDEF) == 0x91AD) || ((bin & 0xFDEF) == 0x91AE) ||
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((bin & 0xFDEF) == 0x91C9) || ((bin & 0xFDEF) == 0x91CA) ||
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((bin & 0xFDEF) == 0x91E1) || ((bin & 0xFDEF) == 0x91E2) ||
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((bin & 0xFFED) == 0x91E5))
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as_warn( _("undefined combination of operands"));
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if (opcode->insn_size == 2)
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{
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/* warn if previous opcode was cpse/sbic/sbis/sbrc/sbrs
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(AVR core bug) */
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if ((prev & 0xFC00) == 0x1000
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|| (prev & 0xFD00) == 0x9900
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|| (prev & 0xFC08) == 0xFC00)
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as_warn (_("skipping two-word instruction"));
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bfd_putl32 ((bfd_vma)bin, frag);
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}
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else
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{
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bfd_putl16 ((bfd_vma)bin, frag);
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}
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bfd_putl16 ((bfd_vma)bin, frag);
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prev = bin;
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*line = str;
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return bin;
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}
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@ -585,30 +658,62 @@ avr_operand (opcode, where, op, line)
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case 'w':
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case 'd':
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case 'r':
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case 'a':
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case 'v':
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{
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char r_name[256];
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op_mask = -1;
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str = extract_word (str, r_name, sizeof (r_name));
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parse_exp (r_name, &op_expr);
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if (op_expr.X_op == O_register)
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if (r_name[0] == 'r' || r_name[0] == 'R')
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{
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op_mask = op_expr.X_add_number;
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if (op_mask <= 31)
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if (isdigit(r_name[1]))
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{
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if (*op == 'd')
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{
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if (op_mask < 16)
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as_bad (_ ("register number above 15 required"));
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op_mask -= 16;
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}
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if (*op == 'w')
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{
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op_mask -= 24;
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if (op_mask & 1 || op_mask > 6)
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as_bad (_ ("register r24,r26,r28 or r30 required"));
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op_mask >>= 1;
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}
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if (r_name[2] == '\0')
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op_mask = r_name[1] - '0';
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else if (r_name[1] != '0'
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&& isdigit(r_name[2])
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&& r_name[3] == '\0')
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op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
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}
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}
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else
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{
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parse_exp (r_name, &op_expr);
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if (op_expr.X_op == O_register)
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op_mask = op_expr.X_add_number;
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}
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if (op_mask <= 31 && op_mask >= 0)
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{
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switch (*op)
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{
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case 'a':
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if (op_mask < 16 || op_mask > 23)
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as_bad (_ ("register r16-r23 required"));
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op_mask -= 16;
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break;
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case 'd':
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if (op_mask < 16)
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as_bad (_ ("register number above 15 required"));
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op_mask -= 16;
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break;
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case 'v':
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if (op_mask & 1)
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as_bad (_ ("even register number required"));
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op_mask >>= 1;
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break;
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case 'w':
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op_mask -= 24;
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if (op_mask & 1 || op_mask > 6)
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as_bad (_ ("register r24,r26,r28 or r30 required"));
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op_mask >>= 1;
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break;
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}
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break;
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}
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as_bad (_ ("register required"));
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}
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@ -641,6 +746,23 @@ avr_operand (opcode, where, op, line)
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}
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break;
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case 'z':
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{
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if (*str == '-')
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as_bad (_ ("can't predecrement"));
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if (! (*str == 'z' || *str == 'Z'))
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as_bad (_ ("pointer register Z required"));
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|
||||
str = skip_space (str + 1);
|
||||
if (*str == '+')
|
||||
{
|
||||
++str;
|
||||
op_mask |= 1;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 'b':
|
||||
{
|
||||
char c = tolower (*str++);
|
||||
@ -877,11 +999,10 @@ md_apply_fix3 (fixp, valuep, seg)
|
||||
/* Instruction addresses are always right-shifted by 1. */
|
||||
value >>= 1;
|
||||
--value; /* Correct PC. */
|
||||
/* XXX AT90S8515 must have WRAP here. */
|
||||
|
||||
if (value < -2048 || value > 2047)
|
||||
{
|
||||
if (avr_mcu->mach == bfd_mach_avr2)
|
||||
if (avr_mcu->isa & AVR_ISA_WRAP)
|
||||
{
|
||||
if (value > 2047)
|
||||
value -= 4096;
|
||||
@ -1076,6 +1197,22 @@ md_assemble (str)
|
||||
return;
|
||||
}
|
||||
|
||||
/* Special case for opcodes with optional operands (lpm, elpm) -
|
||||
version with operands is listed in avr_opcodes[] with "x" suffix. */
|
||||
|
||||
if (*str && !(*opcode->constraints))
|
||||
{
|
||||
struct avr_opcodes_s *opc1;
|
||||
|
||||
/* known opcode, so strlen(op) <= 6 and strcat() should be safe */
|
||||
strcat(op, "x");
|
||||
opc1 = (struct avr_opcodes_s *) hash_find (avr_hash, op);
|
||||
|
||||
/* if unknown, just forget it and use the original opcode */
|
||||
if (opc1)
|
||||
opcode = opc1;
|
||||
}
|
||||
|
||||
if ((opcode->isa & avr_mcu->isa) != opcode->isa)
|
||||
as_bad (_ ("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
|
||||
|
||||
@ -1084,7 +1221,7 @@ md_assemble (str)
|
||||
{
|
||||
char *t = input_line_pointer;
|
||||
avr_operands (opcode, &str);
|
||||
if (*str)
|
||||
if (*skip_space (str))
|
||||
as_bad (_ ("garbage at end of line"));
|
||||
input_line_pointer = t;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user