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* s390-dis.c (init_disasm): Rename S390_OPCODE_ESAME to
S390_OPCODE_ZARCH. (print_insn_s390): Use new modes field of s390_opcodes. * s390-mkopc.c (ARCHBITS_ESAONLY, ARCHBITS_ESA, ARCHBITS_ESAME): Remove. (s390_opcode_mode_val, s390_opcode_cpu_val): New enums. (struct op_struct): Remove archbits. Add mode_bits and min_cpu. (insertOpcode): Replace archbits by min_cpu and mode_bits. (dumpTable): Write mode_bits and min_cpu instead of archbits. (main): Adapt to new format in s390-opcode.txt. * s390-opc.c (s390_opformats): Replace archbits by min_cpu and mode_bits. * s390-opc.txt: Replace archbits by min_cpu and mode_bits.
This commit is contained in:
Martin Schwidefsky
parent
1bd490c46b
commit
af169f2333
@ -1,3 +1,18 @@
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2003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
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* s390-dis.c (init_disasm): Rename S390_OPCODE_ESAME to
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S390_OPCODE_ZARCH.
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(print_insn_s390): Use new modes field of s390_opcodes.
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* s390-mkopc.c (ARCHBITS_ESAONLY, ARCHBITS_ESA, ARCHBITS_ESAME): Remove.
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(s390_opcode_mode_val, s390_opcode_cpu_val): New enums.
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(struct op_struct): Remove archbits. Add mode_bits and min_cpu.
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(insertOpcode): Replace archbits by min_cpu and mode_bits.
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(dumpTable): Write mode_bits and min_cpu instead of archbits.
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(main): Adapt to new format in s390-opcode.txt.
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* s390-opc.c (s390_opformats): Replace archbits by min_cpu and
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mode_bits.
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* s390-opc.txt: Replace archbits by min_cpu and mode_bits.
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2003-03-17 Nick Clifton <nickc@redhat.com>
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* ppc-opc.c: Fix formatting. Update copyright date.
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@ -57,7 +57,7 @@ init_disasm (info)
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current_arch_mask = 1 << S390_OPCODE_ESA;
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break;
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case bfd_mach_s390_64:
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current_arch_mask = 1 << S390_OPCODE_ESAME;
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current_arch_mask = 1 << S390_OPCODE_ZARCH;
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break;
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default:
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abort ();
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@ -161,7 +161,7 @@ print_insn_s390 (memaddr, info)
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const unsigned char *opindex;
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/* Check architecture. */
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if (!(opcode->architecture & current_arch_mask))
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if (!(opcode->modes & current_arch_mask))
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continue;
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/* Check signature of the opcode. */
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if ((buffer[1] & opcode->mask[1]) != opcode->opcode[1]
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@ -23,21 +23,28 @@
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#include <stdlib.h>
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#include <string.h>
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/* ARCHBITS_ESA and ARCH_ESAME correspond to the bit numbers defined
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by s390_opcode_arch_val in include/opcode/s390.h:
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ARCHBITS_ESAONLY = (1<<S390_OPCODE_ESA)
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ARCHBITS_ESA = (1<<S390_OPCODE_ESA) + (1<<S390_OPCODE_ESAME)
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ARCHBITS_ESA = (1<<S390_OPCODE_ESAME). */
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#define ARCHBITS_ESAONLY 1
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#define ARCHBITS_ESA 3
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#define ARCHBITS_ESAME 2
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/* Taken from opcodes/s390.h */
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enum s390_opcode_mode_val
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{
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S390_OPCODE_ESA = 0,
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S390_OPCODE_ZARCH
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};
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enum s390_opcode_cpu_val
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{
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S390_OPCODE_G5 = 0,
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S390_OPCODE_G6,
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S390_OPCODE_Z900
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};
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struct op_struct
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{
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char opcode[16];
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char mnemonic[16];
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char format[16];
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int archbits;
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int mode_bits;
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int min_cpu;
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unsigned long long sort_value;
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int no_nibbles;
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};
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@ -57,7 +64,8 @@ createTable (void)
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/* `insertOpcode': insert an op_struct into sorted opcode array. */
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static void
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insertOpcode (char *opcode, char *mnemonic, char *format, int archbits)
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insertOpcode (char *opcode, char *mnemonic, char *format,
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int min_cpu, int mode_bits)
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{
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char *str;
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unsigned long long sort_value;
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@ -87,6 +95,7 @@ insertOpcode (char *opcode, char *mnemonic, char *format, int archbits)
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str ++;
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}
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sort_value <<= 4*(16 - ix);
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sort_value += (min_cpu << 8) + mode_bits;
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no_nibbles = ix;
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for (ix = 0; ix < no_ops; ix++)
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if (sort_value > op_array[ix].sort_value)
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@ -98,7 +107,8 @@ insertOpcode (char *opcode, char *mnemonic, char *format, int archbits)
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strcpy(op_array[ix].format, format);
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op_array[ix].sort_value = sort_value;
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op_array[ix].no_nibbles = no_nibbles;
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op_array[ix].archbits = archbits;
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op_array[ix].min_cpu = min_cpu;
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op_array[ix].mode_bits = mode_bits;
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no_ops++;
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}
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@ -136,7 +146,8 @@ dumpTable (void)
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op_array[ix].no_nibbles*4, op_array[ix].opcode);
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printf ("MASK_%s, INSTR_%s, ",
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op_array[ix].format, op_array[ix].format);
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printf ("%i}", op_array[ix].archbits);
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printf ("%i, ", op_array[ix].mode_bits);
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printf ("%i}", op_array[ix].min_cpu);
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if (ix < no_ops-1)
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printf (",\n");
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else
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@ -162,24 +173,50 @@ main (void)
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char mnemonic[16];
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char format[16];
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char description[64];
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char archtag[16];
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int archbits;
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char cpu_string[16];
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char modes_string[16];
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int min_cpu;
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int mode_bits;
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char *str;
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if (currentLine[0] == '#')
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continue;
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memset (opcode, 0, 8);
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if (sscanf (currentLine, "%15s %15s %15s \"%[^\"]\" %15s",
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opcode, mnemonic, format, description, archtag) == 5)
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if (sscanf (currentLine, "%15s %15s %15s \"%[^\"]\" %15s %15s",
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opcode, mnemonic, format, description,
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cpu_string, modes_string) == 6)
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{
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if (strcmp (archtag, "esaonly") == 0)
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archbits = ARCHBITS_ESAONLY;
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else if (strcmp (archtag, "esa") == 0)
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archbits = ARCHBITS_ESA;
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else if (strcmp (archtag, "esame") == 0)
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archbits = ARCHBITS_ESAME;
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else
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archbits = 0;
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insertOpcode (opcode, mnemonic, format, archbits);
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if (strcmp (cpu_string, "g5") == 0)
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min_cpu = S390_OPCODE_G5;
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else if (strcmp (cpu_string, "g6") == 0)
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min_cpu = S390_OPCODE_G6;
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else if (strcmp (cpu_string, "z900") == 0)
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min_cpu = S390_OPCODE_Z900;
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else {
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fprintf (stderr, "Couldn't parse cpu string %s\n", cpu_string);
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exit (1);
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}
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str = modes_string;
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mode_bits = 0;
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do {
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if (strncmp (str, "esa", 3) == 0
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&& (str[3] == 0 || str[3] == ',')) {
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mode_bits |= 1 << S390_OPCODE_ESA;
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str += 3;
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} else if (strncmp (str, "zarch", 5) == 0
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&& (str[5] == 0 || str[5] == ',')) {
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mode_bits |= 1 << S390_OPCODE_ZARCH;
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str += 5;
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} else {
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fprintf (stderr, "Couldn't parse modes string %s\n",
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modes_string);
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exit (1);
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}
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if (*str == ',')
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str++;
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} while (*str != 0);
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insertOpcode (opcode, mnemonic, format, min_cpu, mode_bits);
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}
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else
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fprintf (stderr, "Couldn't scan line %s\n", currentLine);
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@ -293,23 +293,23 @@ const struct s390_operand s390_operands[] =
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const struct s390_opcode s390_opformats[] =
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{
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{ "e", OP8(0x00LL), MASK_E, INSTR_E, 3 },
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{ "ri", OP8(0x00LL), MASK_RI_RI, INSTR_RI_RI, 3 },
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{ "rie", OP8(0x00LL), MASK_RIE_RRP, INSTR_RIE_RRP, 3 },
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{ "ril", OP8(0x00LL), MASK_RIL_RP, INSTR_RIL_RP, 3 },
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{ "rr", OP8(0x00LL), MASK_RR_RR, INSTR_RR_RR, 3 },
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{ "rre", OP8(0x00LL), MASK_RRE_RR, INSTR_RRE_RR, 3 },
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{ "rrf", OP8(0x00LL), MASK_RRF_RURR, INSTR_RRF_RURR, 3 },
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{ "rs", OP8(0x00LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3 },
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{ "rse", OP8(0x00LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 3 },
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{ "rsi", OP8(0x00LL), MASK_RSI_RRP, INSTR_RSI_RRP, 3 },
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{ "rx", OP8(0x00LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3 },
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{ "rxe", OP8(0x00LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3 },
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{ "rxf", OP8(0x00LL), MASK_RXF_RRRDR, INSTR_RXF_RRRDR,3 },
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{ "s", OP8(0x00LL), MASK_S_RD, INSTR_S_RD, 3 },
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{ "si", OP8(0x00LL), MASK_SI_URD, INSTR_SI_URD, 3 },
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{ "ss", OP8(0x00LL), MASK_SS_RRRDRD, INSTR_SS_RRRDRD,3 },
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{ "sse", OP8(0x00LL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3 },
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{ "e", OP8(0x00LL), MASK_E, INSTR_E, 3, 0 },
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{ "ri", OP8(0x00LL), MASK_RI_RI, INSTR_RI_RI, 3, 0 },
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{ "rie", OP8(0x00LL), MASK_RIE_RRP, INSTR_RIE_RRP, 3, 0 },
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{ "ril", OP8(0x00LL), MASK_RIL_RP, INSTR_RIL_RP, 3, 0 },
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{ "rr", OP8(0x00LL), MASK_RR_RR, INSTR_RR_RR, 3, 0 },
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{ "rre", OP8(0x00LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0 },
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{ "rrf", OP8(0x00LL), MASK_RRF_RURR, INSTR_RRF_RURR, 3, 0 },
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{ "rs", OP8(0x00LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0 },
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{ "rse", OP8(0x00LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 3, 0 },
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{ "rsi", OP8(0x00LL), MASK_RSI_RRP, INSTR_RSI_RRP, 3, 0 },
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{ "rx", OP8(0x00LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0 },
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{ "rxe", OP8(0x00LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 0 },
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{ "rxf", OP8(0x00LL), MASK_RXF_RRRDR, INSTR_RXF_RRRDR,3, 0 },
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{ "s", OP8(0x00LL), MASK_S_RD, INSTR_S_RD, 3, 0 },
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{ "si", OP8(0x00LL), MASK_SI_URD, INSTR_SI_URD, 3, 0 },
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{ "ss", OP8(0x00LL), MASK_SS_RRRDRD, INSTR_SS_RRRDRD,3, 0 },
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{ "sse", OP8(0x00LL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3, 0 },
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};
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const int s390_num_opformats =
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1243
opcodes/s390-opc.txt
1243
opcodes/s390-opc.txt
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