* config/tc-mips.c (fix_24k_record_store_info): If the previous
	instruction was a store, and the next instructions are unknown,
	assume the worst.

gas/testsuite/
	* gas/mips/24k-branch-delay-1.d: Do not allow stores to be put
	into delay slots.
	* gas/mips/24k-triple-stores-1.d: Put the first nop after the
	second store, rather than the first.
	* gas/mips/24k-triple-stores-2.d: Likewise.
	* gas/mips/24k-triple-stores-4.d: Likewise.
	* gas/mips/24k-triple-stores-8.d: Likewise.
	* gas/mips/24k-triple-stores-3.d: Remove first nop.
	* gas/mips/24k-triple-stores-5.d: Likewise.
	* gas/mips/24k-triple-stores-6.d: Likewise.
	* gas/mips/24k-triple-stores-7.d: Likewise.
	* gas/mips/24k-triple-stores-9.d: Add a nop after the second store.
	Expect a nop at the end.
	* gas/mips/24k-triple-stores-10.d: Put the first nop after the
	second store, rather than the first.  Expect a nop at the end.
This commit is contained in:
Richard Sandiford 2011-06-26 08:32:50 +00:00
parent b91ffaa0ac
commit ab9794cf6a
14 changed files with 252 additions and 230 deletions

View File

@ -1,3 +1,9 @@
2011-06-26 Richard Sandiford <rdsandiford@googlemail.com>
* config/tc-mips.c (fix_24k_record_store_info): If the previous
instruction was a store, and the next instructions are unknown,
assume the worst.
2011-06-25 Richard Sandiford <rdsandiford@googlemail.com>
PR gas/12915

View File

@ -2740,7 +2740,7 @@ fix_24k_sort (const void *a, const void *b)
static bfd_boolean
fix_24k_record_store_info (struct fix_24k_store_info *stinfo,
const struct mips_cl_insn *insn)
const struct mips_cl_insn *insn)
{
/* The instruction must have a known offset. */
if (!insn->complete_p || !strstr (insn->insn_mo->args, "o("))
@ -2804,26 +2804,24 @@ nops_for_24k (int ignore, const struct mips_cl_insn *hist,
if (ignore >= 2)
return 0;
/* If INSN is definitely not a store, there's nothing to worry about. */
if (insn && (insn->insn_mo->pinfo & INSN_STORE_MEMORY) == 0)
return 0;
/* Likewise, the previous instruction wasn't a store. */
/* If the previous instruction wasn't a store, there's nothing to
worry about. */
if ((hist[0].insn_mo->pinfo & INSN_STORE_MEMORY) == 0)
return 0;
/* If we don't know what came before, assume the worst. */
if (hist[1].frag == NULL)
/* If the instructions after the previous one are unknown, we have
to assume the worst. */
if (!insn)
return 1;
/* If the instruction was not a store, there's nothing to worry about. */
if ((hist[1].insn_mo->pinfo & INSN_STORE_MEMORY) == 0)
/* Check whether we are dealing with three consecutive stores. */
if ((insn->insn_mo->pinfo & INSN_STORE_MEMORY) == 0
|| (hist[1].insn_mo->pinfo & INSN_STORE_MEMORY) == 0)
return 0;
/* If we don't know the relationship between the store addresses,
assume the worst. */
if (insn == NULL
|| !BASE_REG_EQ (insn->insn_opcode, hist[0].insn_opcode)
if (!BASE_REG_EQ (insn->insn_opcode, hist[0].insn_opcode)
|| !BASE_REG_EQ (insn->insn_opcode, hist[1].insn_opcode))
return 1;

View File

@ -1,3 +1,21 @@
2011-06-26 Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/24k-branch-delay-1.d: Do not allow stores to be put
into delay slots.
* gas/mips/24k-triple-stores-1.d: Put the first nop after the
second store, rather than the first.
* gas/mips/24k-triple-stores-2.d: Likewise.
* gas/mips/24k-triple-stores-4.d: Likewise.
* gas/mips/24k-triple-stores-8.d: Likewise.
* gas/mips/24k-triple-stores-3.d: Remove first nop.
* gas/mips/24k-triple-stores-5.d: Likewise.
* gas/mips/24k-triple-stores-6.d: Likewise.
* gas/mips/24k-triple-stores-7.d: Likewise.
* gas/mips/24k-triple-stores-9.d: Add a nop after the second store.
Expect a nop at the end.
* gas/mips/24k-triple-stores-10.d: Put the first nop after the
second store, rather than the first. Expect a nop at the end.
2011-06-25 Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/vr4130.s: Add some more ".set noreorder" tests.

View File

@ -11,8 +11,9 @@ Disassembly of section .text:
8: ac430000 sw v1,0\(v0\)
c: ac430008 sw v1,8\(v0\)
10: 00000000 nop
14: 10600002 beqz v1,20 <.*>
18: ac430010 sw v1,16\(v0\)
1c: 8c430008 lw v1,8\(v0\)
20: 8c450010 lw a1,16\(v0\)
14: ac430010 sw v1,16\(v0\)
18: 10600002 beqz v1,24 <.*>
1c: 00000000 nop
20: 8c430008 lw v1,8\(v0\)
24: 8c450010 lw a1,16\(v0\)
...

View File

@ -7,11 +7,11 @@
Disassembly of section .text:
0+ <.*>:
0: a3a20000 sb v0,0\(sp\)
4: 00000000 nop
8: a3a30008 sb v1,8\(sp\)
4: a3a30008 sb v1,8\(sp\)
8: 00000000 nop
c: a3a40010 sb a0,16\(sp\)
10: 00000000 nop
14: a3a50018 sb a1,24\(sp\)
10: a3a50018 sb a1,24\(sp\)
14: 00000000 nop
18: a3a60020 sb a2,32\(sp\)
1c: a7a20000 sh v0,0\(sp\)
20: a7a30008 sh v1,8\(sp\)

View File

@ -7,6 +7,7 @@
Disassembly of section .text:
0+ <.*>:
0: a1020000 sb v0,0\(t0\)
4: 00000000 nop
8: a1030008 sb v1,8\(t0\)
4: a1030008 sb v1,8\(t0\)
8: 00000000 nop
c: a1040010 sb a0,16\(t0\)
\.\.\.

View File

@ -7,8 +7,8 @@
Disassembly of section .text:
0+ <.*>:
0: a3a20000 sb v0,0\(sp\)
4: 00000000 nop
8: a3a3000a sb v1,10\(sp\)
4: a3a3000a sb v1,10\(sp\)
8: 00000000 nop
c: a3a4001f sb a0,31\(sp\)
10: 0000000d break
14: a7a20000 sh v0,0\(sp\)

View File

@ -8,80 +8,79 @@ Disassembly of section .text:
0+ <.*>:
0: a3a2000b sb v0,11\(sp\)
4: 00000000 nop
8: a3a3000b sb v1,11\(sp\)
c: a3a40004 sb a0,4\(sp\)
10: 0000000d break
14: a3a20000 sb v0,0\(sp\)
18: a3a3000b sb v1,11\(sp\)
1c: a3a40005 sb a0,5\(sp\)
20: 0000000d break
24: a3a20007 sb v0,7\(sp\)
28: a3a3000b sb v1,11\(sp\)
2c: 00000000 nop
30: a3a40010 sb a0,16\(sp\)
34: 0000000d break
38: a1020000 sb v0,0\(t0\)
3c: a1030008 sb v1,8\(t0\)
40: 00000000 nop
44: a1040009 sb a0,9\(t0\)
48: 0000000d break
4c: a7a20000 sh v0,0\(sp\)
50: a7a3ffe1 sh v1,-31\(sp\)
54: a7a4ffe2 sh a0,-30\(sp\)
58: 0000000d break
5c: a7a20006 sh v0,6\(sp\)
60: a7a30008 sh v1,8\(sp\)
64: 00000000 nop
68: a7a40010 sh a0,16\(sp\)
6c: 0000000d break
70: a5020001 sh v0,1\(t0\)
74: a5030003 sh v1,3\(t0\)
78: 00000000 nop
7c: a504000b sh a0,11\(t0\)
80: 0000000d break
84: afa20008 sw v0,8\(sp\)
88: afa3fff8 sw v1,-8\(sp\)
8c: afa40008 sw a0,8\(sp\)
90: 0000000d break
94: afa20004 sw v0,4\(sp\)
98: afa30008 sw v1,8\(sp\)
9c: 00000000 nop
a0: afa40010 sw a0,16\(sp\)
a4: 0000000d break
a8: ad020003 sw v0,3\(t0\)
ac: ad030007 sw v1,7\(t0\)
b0: 00000000 nop
b4: ad04000f sw a0,15\(t0\)
b8: 0000000d break
bc: aba20004 swl v0,4\(sp\)
c0: aba3000a swl v1,10\(sp\)
c4: 00000000 nop
c8: aba40011 swl a0,17\(sp\)
cc: 0000000d break
d0: aba20007 swl v0,7\(sp\)
d4: aba3000c swl v1,12\(sp\)
d8: 00000000 nop
dc: aba40010 swl a0,16\(sp\)
e0: 0000000d break
e4: aba20000 swl v0,0\(sp\)
e8: aba3000c swl v1,12\(sp\)
ec: 00000000 nop
f0: aba40017 swl a0,23\(sp\)
f4: 0000000d break
f8: a9020003 swl v0,3\(t0\)
fc: a9030008 swl v1,8\(t0\)
100: 00000000 nop
104: a904000c swl a0,12\(t0\)
108: 0000000d break
10c: aba20000 swl v0,0\(sp\)
110: aba3000c swl v1,12\(sp\)
114: 00000000 nop
118: bba40017 swr a0,23\(sp\)
11c: 0000000d break
120: a9020005 swl v0,5\(t0\)
124: a9030011 swl v1,17\(t0\)
128: 00000000 nop
12c: b904001c swr a0,28\(t0\)
130: 0000000d break
4: a3a3000b sb v1,11\(sp\)
8: a3a40004 sb a0,4\(sp\)
c: 0000000d break
10: a3a20000 sb v0,0\(sp\)
14: a3a3000b sb v1,11\(sp\)
18: a3a40005 sb a0,5\(sp\)
1c: 0000000d break
20: a3a20007 sb v0,7\(sp\)
24: a3a3000b sb v1,11\(sp\)
28: 00000000 nop
2c: a3a40010 sb a0,16\(sp\)
30: 0000000d break
34: a1020000 sb v0,0\(t0\)
38: a1030008 sb v1,8\(t0\)
3c: 00000000 nop
40: a1040009 sb a0,9\(t0\)
44: 0000000d break
48: a7a20000 sh v0,0\(sp\)
4c: a7a3ffe1 sh v1,-31\(sp\)
50: a7a4ffe2 sh a0,-30\(sp\)
54: 0000000d break
58: a7a20006 sh v0,6\(sp\)
5c: a7a30008 sh v1,8\(sp\)
60: 00000000 nop
64: a7a40010 sh a0,16\(sp\)
68: 0000000d break
6c: a5020001 sh v0,1\(t0\)
70: a5030003 sh v1,3\(t0\)
74: 00000000 nop
78: a504000b sh a0,11\(t0\)
7c: 0000000d break
80: afa20008 sw v0,8\(sp\)
84: afa3fff8 sw v1,-8\(sp\)
88: afa40008 sw a0,8\(sp\)
8c: 0000000d break
90: afa20004 sw v0,4\(sp\)
94: afa30008 sw v1,8\(sp\)
98: 00000000 nop
9c: afa40010 sw a0,16\(sp\)
a0: 0000000d break
a4: ad020003 sw v0,3\(t0\)
a8: ad030007 sw v1,7\(t0\)
ac: 00000000 nop
b0: ad04000f sw a0,15\(t0\)
b4: 0000000d break
b8: aba20004 swl v0,4\(sp\)
bc: aba3000a swl v1,10\(sp\)
c0: 00000000 nop
c4: aba40011 swl a0,17\(sp\)
c8: 0000000d break
cc: aba20007 swl v0,7\(sp\)
d0: aba3000c swl v1,12\(sp\)
d4: 00000000 nop
d8: aba40010 swl a0,16\(sp\)
dc: 0000000d break
e0: aba20000 swl v0,0\(sp\)
e4: aba3000c swl v1,12\(sp\)
e8: 00000000 nop
ec: aba40017 swl a0,23\(sp\)
f0: 0000000d break
f4: a9020003 swl v0,3\(t0\)
f8: a9030008 swl v1,8\(t0\)
fc: 00000000 nop
100: a904000c swl a0,12\(t0\)
104: 0000000d break
108: aba20000 swl v0,0\(sp\)
10c: aba3000c swl v1,12\(sp\)
110: 00000000 nop
114: bba40017 swr a0,23\(sp\)
118: 0000000d break
11c: a9020005 swl v0,5\(t0\)
120: a9030011 swl v1,17\(t0\)
124: 00000000 nop
128: b904001c swr a0,28\(t0\)
12c: 0000000d break
\.\.\.

View File

@ -7,8 +7,8 @@
Disassembly of section .text:
0+ <.*>:
0: a113000a sb s3,10\(t0\)
4: 00000000 nop
8: a5130001 sh s3,1\(t0\)
4: a5130001 sh s3,1\(t0\)
8: 00000000 nop
c: a1130020 sb s3,32\(t0\)
10: 0000000d break
14: a113000a sb s3,10\(t0\)

View File

@ -7,31 +7,30 @@
Disassembly of section .text:
0+ <.*>:
0: a5020007 sh v0,7\(t0\)
4: 00000000 nop
8: a1030000 sb v1,0\(t0\)
c: ad040001 sw a0,1\(t0\)
10: 0000000d break
14: a5020016 sh v0,22\(t0\)
18: a103000f sb v1,15\(t0\)
1c: 00000000 nop
20: ad040018 sw a0,24\(t0\)
24: 0000000d break
28: a5020000 sh v0,0\(t0\)
2c: a1030009 sb v1,9\(t0\)
30: ad040002 sw a0,2\(t0\)
34: 0000000d break
38: a5020006 sh v0,6\(t0\)
3c: a1030010 sb v1,16\(t0\)
40: 00000000 nop
44: ad04000c sw a0,12\(t0\)
48: 0000000d break
4c: a502000a sh v0,10\(t0\)
50: a103000f sb v1,15\(t0\)
54: ad040004 sw a0,4\(t0\)
58: 0000000d break
5c: a502000a sh v0,10\(t0\)
60: a1030010 sb v1,16\(t0\)
64: 00000000 nop
68: ad040004 sw a0,4\(t0\)
6c: 0000000d break
4: a1030000 sb v1,0\(t0\)
8: ad040001 sw a0,1\(t0\)
c: 0000000d break
10: a5020016 sh v0,22\(t0\)
14: a103000f sb v1,15\(t0\)
18: 00000000 nop
1c: ad040018 sw a0,24\(t0\)
20: 0000000d break
24: a5020000 sh v0,0\(t0\)
28: a1030009 sb v1,9\(t0\)
2c: ad040002 sw a0,2\(t0\)
30: 0000000d break
34: a5020006 sh v0,6\(t0\)
38: a1030010 sb v1,16\(t0\)
3c: 00000000 nop
40: ad04000c sw a0,12\(t0\)
44: 0000000d break
48: a502000a sh v0,10\(t0\)
4c: a103000f sb v1,15\(t0\)
50: ad040004 sw a0,4\(t0\)
54: 0000000d break
58: a502000a sh v0,10\(t0\)
5c: a1030010 sb v1,16\(t0\)
60: 00000000 nop
64: ad040004 sw a0,4\(t0\)
68: 0000000d break
\.\.\.

View File

@ -7,31 +7,30 @@
Disassembly of section .text:
0+ <.*>:
0: abbf0050 swl ra,80\(sp\)
4: 00000000 nop
8: bbbf0053 swr ra,83\(sp\)
c: abb30058 swl s3,88\(sp\)
10: bbb3005b swr s3,91\(sp\)
14: abbe0060 swl s8,96\(sp\)
18: bbbe0063 swr s8,99\(sp\)
1c: 0000000d break
20: a3bf0051 sb ra,81\(sp\)
24: 001f0a02 srl at,ra,0x8
28: a3a10050 sb at,80\(sp\)
2c: a3b30059 sb s3,89\(sp\)
30: 00130a02 srl at,s3,0x8
34: a3a10058 sb at,88\(sp\)
38: a3be0061 sb s8,97\(sp\)
3c: 001e0a02 srl at,s8,0x8
40: a3a10060 sb at,96\(sp\)
44: 0000000d break
48: e7a00050 swc1 \$f0,80\(sp\)
4c: e7a20058 swc1 \$f2,88\(sp\)
50: 00000000 nop
54: e7a40060 swc1 \$f4,96\(sp\)
58: 0000000d break
5c: f7a00050 sdc1 \$f0,80\(sp\)
60: f7a20058 sdc1 \$f2,88\(sp\)
64: 00000000 nop
68: f7a40060 sdc1 \$f4,96\(sp\)
6c: 0000000d break
4: bbbf0053 swr ra,83\(sp\)
8: abb30058 swl s3,88\(sp\)
c: bbb3005b swr s3,91\(sp\)
10: abbe0060 swl s8,96\(sp\)
14: bbbe0063 swr s8,99\(sp\)
18: 0000000d break
1c: a3bf0051 sb ra,81\(sp\)
20: 001f0a02 srl at,ra,0x8
24: a3a10050 sb at,80\(sp\)
28: a3b30059 sb s3,89\(sp\)
2c: 00130a02 srl at,s3,0x8
30: a3a10058 sb at,88\(sp\)
34: a3be0061 sb s8,97\(sp\)
38: 001e0a02 srl at,s8,0x8
3c: a3a10060 sb at,96\(sp\)
40: 0000000d break
44: e7a00050 swc1 \$f0,80\(sp\)
48: e7a20058 swc1 \$f2,88\(sp\)
4c: 00000000 nop
50: e7a40060 swc1 \$f4,96\(sp\)
54: 0000000d break
58: f7a00050 sdc1 \$f0,80\(sp\)
5c: f7a20058 sdc1 \$f2,88\(sp\)
60: 00000000 nop
64: f7a40060 sdc1 \$f4,96\(sp\)
68: 0000000d break
\.\.\.

View File

@ -7,75 +7,74 @@
Disassembly of section .text:
0+ <.*>:
0: a1130004 sb s3,4\(t0\)
4: 00000000 nop
8: ad130008 sw s3,8\(t0\)
c: a113000f sb s3,15\(t0\)
10: 0000000d break
14: a1130003 sb s3,3\(t0\)
18: ad130008 sw s3,8\(t0\)
1c: 00000000 nop
20: a113000f sb s3,15\(t0\)
24: 0000000d break
28: ad13001c sw s3,28\(t0\)
2c: ad130008 sw s3,8\(t0\)
30: a113001f sb s3,31\(t0\)
34: 0000000d break
38: a1130005 sb s3,5\(t0\)
3c: ad130009 sw s3,9\(t0\)
40: a1130010 sb s3,16\(t0\)
44: 0000000d break
48: a1130004 sb s3,4\(t0\)
4c: ad130009 sw s3,9\(t0\)
50: 00000000 nop
54: a1130010 sb s3,16\(t0\)
58: 0000000d break
5c: a1130006 sb s3,6\(t0\)
60: a5130008 sh s3,8\(t0\)
64: a113000f sb s3,15\(t0\)
68: 0000000d break
6c: a1130005 sb s3,5\(t0\)
70: a5130008 sh s3,8\(t0\)
74: 00000000 nop
78: a113000f sb s3,15\(t0\)
7c: 0000000d break
80: a513001e sh s3,30\(t0\)
84: a5130008 sh s3,8\(t0\)
88: a113001f sb s3,31\(t0\)
8c: 0000000d break
90: a1130007 sb s3,7\(t0\)
94: a5130009 sh s3,9\(t0\)
98: a1130010 sb s3,16\(t0\)
9c: 0000000d break
a0: a1130006 sb s3,6\(t0\)
a4: a5130009 sh s3,9\(t0\)
a8: 00000000 nop
ac: a1130010 sb s3,16\(t0\)
b0: 0000000d break
b4: a1130007 sb s3,7\(t0\)
b8: f5000008 sdc1 \$f0,8\(t0\)
bc: a113000f sb s3,15\(t0\)
c0: 0000000d break
c4: a1130007 sb s3,7\(t0\)
c8: f5000008 sdc1 \$f0,8\(t0\)
cc: 00000000 nop
d0: a1130010 sb s3,16\(t0\)
d4: 0000000d break
d8: a1130010 sb s3,16\(t0\)
dc: f5000008 sdc1 \$f0,8\(t0\)
e0: a1130017 sb s3,23\(t0\)
e4: 0000000d break
e8: a1130010 sb s3,16\(t0\)
ec: f5000008 sdc1 \$f0,8\(t0\)
f0: 00000000 nop
f4: a1130018 sb s3,24\(t0\)
f8: 0000000d break
fc: a1130008 sb s3,8\(t0\)
100: f5000009 sdc1 \$f0,9\(t0\)
104: a1130010 sb s3,16\(t0\)
108: 0000000d break
10c: a113fffd sb s3,-3\(t0\)
110: f500fffe sdc1 \$f0,-2\(t0\)
114: 00000000 nop
118: a1130006 sb s3,6\(t0\)
11c: 0000000d break
4: ad130008 sw s3,8\(t0\)
8: a113000f sb s3,15\(t0\)
c: 0000000d break
10: a1130003 sb s3,3\(t0\)
14: ad130008 sw s3,8\(t0\)
18: 00000000 nop
1c: a113000f sb s3,15\(t0\)
20: 0000000d break
24: ad13001c sw s3,28\(t0\)
28: ad130008 sw s3,8\(t0\)
2c: a113001f sb s3,31\(t0\)
30: 0000000d break
34: a1130005 sb s3,5\(t0\)
38: ad130009 sw s3,9\(t0\)
3c: a1130010 sb s3,16\(t0\)
40: 0000000d break
44: a1130004 sb s3,4\(t0\)
48: ad130009 sw s3,9\(t0\)
4c: 00000000 nop
50: a1130010 sb s3,16\(t0\)
54: 0000000d break
58: a1130006 sb s3,6\(t0\)
5c: a5130008 sh s3,8\(t0\)
60: a113000f sb s3,15\(t0\)
64: 0000000d break
68: a1130005 sb s3,5\(t0\)
6c: a5130008 sh s3,8\(t0\)
70: 00000000 nop
74: a113000f sb s3,15\(t0\)
78: 0000000d break
7c: a513001e sh s3,30\(t0\)
80: a5130008 sh s3,8\(t0\)
84: a113001f sb s3,31\(t0\)
88: 0000000d break
8c: a1130007 sb s3,7\(t0\)
90: a5130009 sh s3,9\(t0\)
94: a1130010 sb s3,16\(t0\)
98: 0000000d break
9c: a1130006 sb s3,6\(t0\)
a0: a5130009 sh s3,9\(t0\)
a4: 00000000 nop
a8: a1130010 sb s3,16\(t0\)
ac: 0000000d break
b0: a1130007 sb s3,7\(t0\)
b4: f5000008 sdc1 \$f0,8\(t0\)
b8: a113000f sb s3,15\(t0\)
bc: 0000000d break
c0: a1130007 sb s3,7\(t0\)
c4: f5000008 sdc1 \$f0,8\(t0\)
c8: 00000000 nop
cc: a1130010 sb s3,16\(t0\)
d0: 0000000d break
d4: a1130010 sb s3,16\(t0\)
d8: f5000008 sdc1 \$f0,8\(t0\)
dc: a1130017 sb s3,23\(t0\)
e0: 0000000d break
e4: a1130010 sb s3,16\(t0\)
e8: f5000008 sdc1 \$f0,8\(t0\)
ec: 00000000 nop
f0: a1130018 sb s3,24\(t0\)
f4: 0000000d break
f8: a1130008 sb s3,8\(t0\)
fc: f5000009 sdc1 \$f0,9\(t0\)
100: a1130010 sb s3,16\(t0\)
104: 0000000d break
108: a113fffd sb s3,-3\(t0\)
10c: f500fffe sdc1 \$f0,-2\(t0\)
110: 00000000 nop
114: a1130006 sb s3,6\(t0\)
118: 0000000d break
...

View File

@ -7,8 +7,8 @@
Disassembly of section .text:
0+ <.*>:
0: a1130000 sb s3,0\(t0\)
4: 00000000 nop
8: a1130001 sb s3,1\(t0\)
4: a1130001 sb s3,1\(t0\)
8: 00000000 nop
c: a1130018 sb s3,24\(t0\)
10: 0000000d break
14: a1130000 sb s3,0\(t0\)

View File

@ -10,4 +10,6 @@ Disassembly of section .text:
0: a1020000 sb v0,0\(t0\)
4: 00000000 nop
8: a1030008 sb v1,8\(t0\)
c: a1040010 sb a0,16\(t0\)
c: 00000000 nop
10: a1040010 sb a0,16\(t0\)
\.\.\.