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2005-08-30 Paul Brook <paul@codesourcery.com>

Browse Source 
opcodes/
	* arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
gas/testsuite/
	* gas/arm/thumb.d: Change "sub rn, rn, rn" to "subs rn, rn, rn".
	* gas/arm/thumb32.d: Ditto.
This commit is contained in:
Paul Brook 2005-08-30 11:21:59 +00:00
parent 8ec6eebb00
commit a2dfd01fa7
5 changed files with 17 additions and 8 deletions
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5
gas/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2005-08-30 Paul Brook <paul@codesourcery.com>
* gas/arm/thumb.d: Change "sub rn, rn, rn" to "subs rn, rn, rn".
* gas/arm/thumb32.d: Ditto.
2005-08-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.s: Adjust.

4
gas/testsuite/gas/arm/thumb.d
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@ -17,8 +17,8 @@ Disassembly of section \.text:
0+00e <[^>]+> 1008 asrs r0, r1, #32
0+010 <[^>]+> 18d1 adds r1, r2, r3
0+012 <[^>]+> 1ca2 adds r2, r4, #2
0+014 <[^>]+> 1beb sub r3, r5, r7
0+016 <[^>]+> 1fe2 sub r2, r4, #7
0+014 <[^>]+> 1beb subs r3, r5, r7
0+016 <[^>]+> 1fe2 subs r2, r4, #7
0+018 <[^>]+> 24ff movs r4, #255
0+01a <[^>]+> 2bfa cmp r3, #250
0+01c <[^>]+> 367b adds r6, #123

8
gas/testsuite/gas/arm/thumb32.d
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@ -95,10 +95,10 @@ Disassembly of section .text:
0+13e <[^>]+> f1b0 0005 subs\.w r0, r0, #5 ; 0x5
0+142 <[^>]+> f1b0 0081 subs\.w r0, r0, #129 ; 0x81
0+146 <[^>]+> f1b0 0508 subs\.w r5, r0, #8 ; 0x8
0+14a <[^>]+> 1a00 sub r0, r0, r0
0+14c <[^>]+> 1a05 sub r5, r0, r0
0+14e <[^>]+> 1a28 sub r0, r5, r0
0+150 <[^>]+> 1b40 sub r0, r0, r5
0+14a <[^>]+> 1a00 subs r0, r0, r0
0+14c <[^>]+> 1a05 subs r5, r0, r0
0+14e <[^>]+> 1a28 subs r0, r5, r0
0+150 <[^>]+> 1b40 subs r0, r0, r5
0+152 <[^>]+> f5a0 7d82 sub\.w sp, r0, #260 ; 0x104
0+156 <[^>]+> f5ad 7d82 sub\.w sp, sp, #260 ; 0x104
0+15a <[^>]+> ebb8 0800 subs\.w r8, r8, r0

4
opcodes/ChangeLog
View File

@ -1,3 +1,7 @@
2005-08-30 Paul Brook <paul@codesourcery.com>
* arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
2005-08-26 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (intel_operand_size): New, broken out from OP_E for

4
opcodes/arm-dis.c
View File

@ -724,9 +724,9 @@ static const struct opcode16 thumb_opcodes[] =
{ARM_EXT_V4T, 0xBC00, 0xFE00, "pop\t%O"},
/* format 2 */
{ARM_EXT_V4T, 0x1800, 0xFE00, "adds\t%0-2r, %3-5r, %6-8r"},
{ARM_EXT_V4T, 0x1A00, 0xFE00, "sub\t%0-2r, %3-5r, %6-8r"},
{ARM_EXT_V4T, 0x1A00, 0xFE00, "subs\t%0-2r, %3-5r, %6-8r"},
{ARM_EXT_V4T, 0x1C00, 0xFE00, "adds\t%0-2r, %3-5r, #%6-8d"},
{ARM_EXT_V4T, 0x1E00, 0xFE00, "sub\t%0-2r, %3-5r, #%6-8d"},
{ARM_EXT_V4T, 0x1E00, 0xFE00, "subs\t%0-2r, %3-5r, #%6-8d"},
/* format 8 */
{ARM_EXT_V4T, 0x5200, 0xFE00, "strh\t%0-2r, [%3-5r, %6-8r]"},
{ARM_EXT_V4T, 0x5A00, 0xFE00, "ldrh\t%0-2r, [%3-5r, %6-8r]"},