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* sparc-tdep.c (NUM_SPARC_FPREGS): Define.
(SPARC_INTREG_SIZE): Define. (*): Use SPARC_INTREG_SIZE instead of REGISTER_RAW_SIZE (intreg) where appropriate. (enum branch_type): New value `done_retry'. (isbranch): Renamed from isannulled. All callers changed. Support new sparc64 branch insns. (single_step): Handle done_retry. (sparc_extract_struct_value_address): Don't assume 4 byte regs. (get_saved_register): Likewise. (sparc_push_dummy_frame): Likewise. (sparc_frame_find_saved_regs): Likewise. (sparc_pop_frame): Likewise. Don't refer to FPS_REGNUM, CPS_REGNUM, or PS_REGNUM if not sparc64. sparc64 has 64 fp regs. (sparc64_extract_struct_value_address): New function. (dump_ccreg, sparc_print_register_hook): Likewise. * sp64-tdep.c: Deleted. * sparc/tm-sp64.h (GDB_TARGET_IS_SPARC64): Define. (NUM_REGS): Reduce by 2, cle/tle are in the pstate reg. (CC_HAS_LONG_LONG): Define. (REGISTER_NAMES): Delete cle/tle and reorganize. (PS_REGNUM, FPS_REGNUM, CPS_REGNUM): Delete, they're ifdef'd out of sparc-tdep.c now. (REGISTER_BYTES): Update. (REGISTER_CONVERT_TO_VIRTUAL, REGISTER_CONVERT_TO_RAW): Delete. (EXTRACT_RETURN_VALUE): Delete. Use definition in tm-sparc.h. (NO_SINGLE_STEP): Likewise. * sparc/tm-sparc.h (EXTRACT_VALUE_RETURN): Don't assume 4 byte regs. * sparc/sp64.mt: Move simulator support ... * sparc/sp64sim.mt: ... to here.
This commit is contained in:
David Edelsohn
parent
3598343227
commit
9e3501580c
@ -1,17 +1,9 @@
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# Target: SPARC64 (with simulator)
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# FIXME: May not always want the simulator.
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# Target: SPARC64
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# solib.o and procfs.o taken out for now. We don't have shared libraries yet,
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# and the elf version requires procfs.o but the a.out version doesn't.
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# Then again, having procfs.o in a target makefile fragment seems wrong.
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TDEPFILES = sparc-tdep.o sp64-tdep.o $(SIMFILES)
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TDEPFILES = sparc-tdep.o
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TM_FILE= tm-sp64.h
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# Need gcc for long long support.
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CC = gcc
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# Regular "have long long" detection is disabled for now.
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MH_CFLAGS = -DFORCE_LONG_LONG -I${srcdir}/../sim/sp64
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SIMFILES = remote-sim.o ../sim/sp64/libsim.a
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# The simulator uses the sqrt() function.
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TM_CLIBS = -lm
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@ -1,10 +1,15 @@
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# Target: SPARC simulator
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# Which simulator has deliberately been avoided. There are two and I'm
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# currently playing with both. /dje
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# Target: SPARC64 (with simulator)
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# solib.o and procfs.o taken out for now. We don't have shared libraries yet,
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# and the elf version requires procfs.o but the a.out version doesn't.
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# Then again, having procfs.o in a target makefile fragment seems wrong.
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TDEPFILES = sparc-tdep.o $(SIMFILES)
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TM_FILE= tm-sp64.h
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# Need gcc for long long support.
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CC = gcc
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# Regular "have long long" detection is disabled for now.
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MH_CFLAGS = -DFORCE_LONG_LONG -I${srcdir}/../sim/sp64
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TDEPFILES= solib.o sparc-tdep.o sp64-tdep.o remote-sim.o ../sim/sp64/libsim.a
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TM_FILE= tm-sp64sim.h
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MH_CFLAGS = -I${srcdir}/../sim/sp64
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SIMFILES = remote-sim.o ../sim/sp64/libsim.a
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# The simulator uses the sqrt() function.
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TM_CLIBS = -lm
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@ -1,6 +1,6 @@
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/* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger.
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This is included by other tm-*.h files to define SPARC cpu-related info.
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Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
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This is included by other tm-*.h files to define SPARC64 cpu-related info.
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Copyright 1994, 1995 Free Software Foundation, Inc.
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This is (obviously) based on the SPARC Vn (n<9) port.
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Contributed by Doug Evans (dje@cygnus.com).
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@ -20,51 +20,25 @@ You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#define GDB_TARGET_IS_SPARC64
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/* Need to define this so gdb will know what to do with long long's.
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Defining FORCE_LONG_LONG is incorrect (as of 940731) because that
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doesn't work for BFD64 targets. */
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#define CC_HAS_LONG_LONG
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#include "sparc/tm-sparc.h"
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/* We have long longs. */
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#define LONG_LONG
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/* When passing a structure to a function, Sun cc passes the address
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in a register, not the structure itself. It (under SunOS4) creates
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two symbols, so we get a LOC_ARG saying the address is on the stack
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(a lie, and a serious one since we don't know which register to
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use), and a LOC_REGISTER saying that the struct is in a register
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(sort of a lie, but fixable with REG_STRUCT_HAS_ADDR). Gcc version
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two (as of 1.92) behaves like sun cc. REG_STRUCT_HAS_ADDR is smart
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enough to distinguish between Sun cc, gcc version 1 and gcc version 2.
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This still doesn't work if the argument is not one passed in a
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register (i.e. it's the 7th or later argument). */
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#undef REG_STRUCT_HAS_ADDR
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#define REG_STRUCT_HAS_ADDR(gcc_p) (gcc_p != 1)
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#undef STRUCT_ARG_SYM_GARBAGE
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#define STRUCT_ARG_SYM_GARBAGE(gcc_p) (gcc_p != 1)
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/* Stack has strict alignment. */
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#undef STACK_ALIGN
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#define STACK_ALIGN(ADDR) (((ADDR)+15)&-16)
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/* Nonzero if instruction at PC is a return instruction. */
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/* For SPARC, this is either a "jmpl %o7+8,%g0" or "jmpl %i7+8,%g0".
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Note: this does not work for functions returning structures under SunOS.
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This should work for v9, however. */
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#undef ABOUT_TO_RETURN
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#define ABOUT_TO_RETURN(pc) \
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((read_memory_integer (pc, 4)|0x00040000) == 0x81c7e008)
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/* Say how long (ordinary) registers are. */
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#undef REGISTER_TYPE
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#define REGISTER_TYPE long long
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/* Number of machine registers */
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/* Number of machine registers. */
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#undef NUM_REGS
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#define NUM_REGS 127
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#define NUM_REGS 125
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/* Initializer for an array of names of registers.
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There should be NUM_REGS strings in this initializer. */
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@ -76,9 +50,8 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* FIXME: fcc0-3 are currently separate, even though they are also part of
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fsr. May have to remove them but let's postpone this as long as
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possible. */
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/* FIXME: cle and tle are new registers that haven't entered the docs yet.
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They stand for "current little endian format" and "trap little endian
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format". */
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/* FIXME: Whether to include f33, f35, etc. here is not clear.
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There are advantages and disadvantages. */
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#undef REGISTER_NAMES
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#define REGISTER_NAMES \
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@ -94,9 +67,9 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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"f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46", \
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"f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62", \
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\
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"ccr", "y", "pc", "npc", "asi", "cle", "tle", \
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"fsr", "fprs", "ver", "tick", "pil", "pstate", "wstate", \
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"tba", "tl", "tt", "tpc", "tnpc", "tstate", \
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"pc", "npc, "ccr", "fsr", fprs", "y", "asi", \
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"ver", "tick", "pil", "pstate", \
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"tstate", "tba", "tl", "tt", "tpc", "tnpc", "wstate", \
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"cwp", "cansave", "canrestore", "cleanwin", "otherwin", \
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"asr16", "asr17", "asr18", "asr19", "asr20", "asr21", \
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"asr22", "asr23", "asr24", "asr25", "asr26", "asr27", \
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@ -144,58 +117,45 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* v9 misc. and priv. regs */
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#define C0_REGNUM 80 /* Start of control registers */
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#define CCR_REGNUM (C0_REGNUM + 0) /* Condition Code Register (%xcc,%icc) */
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#define Y_REGNUM (C0_REGNUM + 1) /* Temp register for multiplication, etc. */
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#define PC_REGNUM (C0_REGNUM + 2) /* floating point condition code reg 2 */
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#define NPC_REGNUM (C0_REGNUM + 3) /* floating point condition code reg 2 */
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#define ASI_REGNUM (C0_REGNUM + 4) /* Alternate Space Identifier */
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#define CLE_REGNUM (C0_REGNUM + 5) /* Current Little Endian format */
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#define TLE_REGNUM (C0_REGNUM + 6) /* Trap Little Endian format */
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#define FSR_REGNUM (C0_REGNUM + 7) /* Floating Point State */
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#define FPRS_REGNUM (C0_REGNUM + 8) /* Floating Point Registers State */
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#define VER_REGNUM (C0_REGNUM + 9) /* Version register */
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#define TICK_REGNUM (C0_REGNUM + 10) /* Tick register */
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#define PIL_REGNUM (C0_REGNUM + 11) /* Processor Interrupt Level */
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#define PSTATE_REGNUM (C0_REGNUM + 12) /* Processor State */
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#define WSTATE_REGNUM (C0_REGNUM + 13) /* Window State */
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#define TBA_REGNUM (C0_REGNUM + 14) /* floating point condition code reg 3 */
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#define TL_REGNUM (C0_REGNUM + 15) /* Trap Level */
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#define TT_REGNUM (C0_REGNUM + 16) /* Trap Type */
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#define TPC_REGNUM (C0_REGNUM + 17) /* Trap pc */
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#define TNPC_REGNUM (C0_REGNUM + 18) /* Trap npc */
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#define TSTATE_REGNUM (C0_REGNUM + 19) /* Trap State */
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#define CWP_REGNUM (C0_REGNUM + 20) /* Current Window Pointer */
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#define CANSAVE_REGNUM (C0_REGNUM + 21) /* Savable Windows */
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#define CANRESTORE_REGNUM (C0_REGNUM + 22) /* Restorable Windows */
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#define CLEANWIN_REGNUM (C0_REGNUM + 23) /* Clean Windows */
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#define OTHERWIN_REGNUM (C0_REGNUM + 24) /* Other Windows */
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#define ASR_REGNUM(n) (C0_REGNUM+(25-16)+(n)) /* Ancillary State Register
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#define C0_REGNUM FP_MAX_REGNUM /* Start of control registers */
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#define PC_REGNUM (C0_REGNUM + 0) /* Current PC */
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#define NPC_REGNUM (C0_REGNUM + 1) /* Next PC */
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#define CCR_REGNUM (C0_REGNUM + 2) /* Condition Code Register (%xcc,%icc) */
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#define FSR_REGNUM (C0_REGNUM + 3) /* Floating Point State */
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#define FPRS_REGNUM (C0_REGNUM + 4) /* Floating Point Registers State */
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#define Y_REGNUM (C0_REGNUM + 5) /* Temp register for multiplication, etc. */
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#define ASI_REGNUM (C0_REGNUM + 6) /* Alternate Space Identifier */
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#define VER_REGNUM (C0_REGNUM + 7) /* Version register */
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#define TICK_REGNUM (C0_REGNUM + 8) /* Tick register */
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#define PIL_REGNUM (C0_REGNUM + 9) /* Processor Interrupt Level */
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#define PSTATE_REGNUM (C0_REGNUM + 10) /* Processor State */
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#define TSTATE_REGNUM (C0_REGNUM + 11) /* Trap State */
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#define TBA_REGNUM (C0_REGNUM + 12) /* Trap Base Address */
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#define TL_REGNUM (C0_REGNUM + 13) /* Trap Level */
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#define TT_REGNUM (C0_REGNUM + 14) /* Trap Type */
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#define TPC_REGNUM (C0_REGNUM + 15) /* Trap pc */
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#define TNPC_REGNUM (C0_REGNUM + 16) /* Trap npc */
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#define WSTATE_REGNUM (C0_REGNUM + 17) /* Window State */
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#define CWP_REGNUM (C0_REGNUM + 18) /* Current Window Pointer */
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#define CANSAVE_REGNUM (C0_REGNUM + 19) /* Savable Windows */
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#define CANRESTORE_REGNUM (C0_REGNUM + 20) /* Restorable Windows */
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#define CLEANWIN_REGNUM (C0_REGNUM + 21) /* Clean Windows */
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#define OTHERWIN_REGNUM (C0_REGNUM + 22) /* Other Windows */
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#define ASR_REGNUM(n) (C0_REGNUM+(23-16)+(n)) /* Ancillary State Register
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(n = 16...31) */
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#define ICC_REGNUM (C0_REGNUM + 41) /* 32 bit condition codes */
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#define XCC_REGNUM (C0_REGNUM + 42) /* 64 bit condition codes */
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#define FCC0_REGNUM (C0_REGNUM + 43) /* floatpoint condition code reg 0 */
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#define FCC1_REGNUM (C0_REGNUM + 44) /* floating point condition code reg 0 */
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#define FCC2_REGNUM (C0_REGNUM + 45) /* floating point condition code reg 1 */
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#define FCC3_REGNUM (C0_REGNUM + 46) /* floating point condition code reg 2 */
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/* FIXME: PS_REGNUM, FPS_REGNUM, CPS_REGNUM are for priviledged v8 registers
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which don't exist in v9 (in the same form). We use bits of sparc-tdep.c
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which requires these, so define them here to be unused ASR regs so
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sparc-tdep.c will compile. What we really want to do is put some
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conditionals in sparc-tdep.c (run time or compile time) or separate the v8
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stuff out of sparc-tdep.c. */
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#define PS_REGNUM (ASR_REGNUM (29))
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#define FPS_REGNUM (ASR_REGNUM (30))
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#define CPS_REGNUM (ASR_REGNUM (31))
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#define ICC_REGNUM (C0_REGNUM + 39) /* 32 bit condition codes */
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#define XCC_REGNUM (C0_REGNUM + 40) /* 64 bit condition codes */
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#define FCC0_REGNUM (C0_REGNUM + 41) /* fp cc reg 0 */
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#define FCC1_REGNUM (C0_REGNUM + 42) /* fp cc reg 1 */
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#define FCC2_REGNUM (C0_REGNUM + 43) /* fp cc reg 2 */
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#define FCC3_REGNUM (C0_REGNUM + 44) /* fp cc reg 3 */
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/* Total amount of space needed to store our copies of the machine's
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register state, the array `registers'.
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Some of the registers aren't 64 bits, but it's a lot simpler just to assume
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they all are (since most of them are). */
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#undef REGISTER_BYTES
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#define REGISTER_BYTES (32*8+32*8+47*8)
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#define REGISTER_BYTES (32*8+32*8+45*8)
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/* Index within `registers' of the first byte of the space for
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register N. */
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@ -206,45 +166,37 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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: (N) < C0_REGNUM ? 32*8 + 32*4 + ((N)-64)*8 \
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: 64*8 + ((N)-C0_REGNUM)*8)
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/* Say how long (ordinary) registers are. This is a piece of bogosity
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used in push_word and a few other places; REGISTER_RAW_SIZE is the
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real way to know how big a register is. */
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#undef REGISTER_SIZE
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#define REGISTER_SIZE 8
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/* Number of bytes of storage in the actual machine representation
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for register N. */
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/* ??? It's not clear whether we want to return 4 or 8 for fp regs. */
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#undef REGISTER_RAW_SIZE
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#define REGISTER_RAW_SIZE(N) (8)
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#define REGISTER_RAW_SIZE(N) 8
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/* Number of bytes of storage in the program's representation
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for register N. */
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#undef REGISTER_VIRTUAL_SIZE
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#define REGISTER_VIRTUAL_SIZE(N) (8)
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#define REGISTER_VIRTUAL_SIZE(N) 8
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/* Largest value REGISTER_RAW_SIZE can have. */
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/* tm-sparc.h defines this as 8, but play it safe. */
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#undef MAX_REGISTER_RAW_SIZE
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#define MAX_REGISTER_RAW_SIZE (8)
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#define MAX_REGISTER_RAW_SIZE 8
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/* Largest value REGISTER_VIRTUAL_SIZE can have. */
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/* tm-sparc.h defines this as 8, but play it safe. */
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#undef MAX_REGISTER_VIRTUAL_SIZE
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#define MAX_REGISTER_VIRTUAL_SIZE (8)
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/* Convert data from raw format for register REGNUM
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to virtual format for register REGNUM. */
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/* ??? Remove when tm-sparc.h is fixed. */
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#undef REGISTER_CONVERT_TO_VIRTUAL
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#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,FROM,TO) \
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{ memcpy ((TO), (FROM), REGISTER_RAW_SIZE (0)); }
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/* Convert data from virtual format for register REGNUM
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to raw format for register REGNUM. */
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/* ??? Remove when tm-sparc.h is fixed. */
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#undef REGISTER_CONVERT_TO_RAW
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#define REGISTER_CONVERT_TO_RAW(REGNUM,FROM,TO) \
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{ memcpy ((TO), (FROM), REGISTER_RAW_SIZE (0)); }
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#define MAX_REGISTER_VIRTUAL_SIZE 8
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/* Return the GDB type object for the "standard" data type
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of data in register N. */
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@ -267,24 +219,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#define STORE_STRUCT_RETURN(ADDR, SP) \
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{ target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); }
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/* Extract from an array REGBUF containing the (raw) register state
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a function return value of type TYPE, and copy that, in virtual format,
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into VALBUF. */ /* FIXME */
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#undef EXTRACT_RETURN_VALUE
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#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
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{ \
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if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \
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{ \
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memcpy ((VALBUF), ((int *)(REGBUF))+FP0_REGNUM, TYPE_LENGTH(TYPE));\
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} \
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else \
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memcpy ((VALBUF), \
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(char *)(REGBUF) + 8 * 8 + \
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(TYPE_LENGTH(TYPE) >= 8 ? 0 : 8 - TYPE_LENGTH(TYPE)), \
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TYPE_LENGTH(TYPE)); \
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}
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/* Extract from an array REGBUF containing the (raw) register state
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the address in which a function should return its structure value,
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as a CORE_ADDR (or an expression that can be used as one). */
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@ -301,12 +235,6 @@ sparc64_extract_struct_value_address PARAMS ((char [REGISTER_BYTES]));
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#undef FRAME_ARGS_SKIP
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#define FRAME_ARGS_SKIP 136
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/* Sparc has no reliable single step ptrace call */
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#undef NO_SINGLE_STEP
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#define NO_SINGLE_STEP 1
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extern void single_step ();
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/* We need two arguments (in general) to the "info frame" command.
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Note that the definition of this macro implies that there exists a
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function "setup_arbitrary_frame" in sparc-tdep.c */
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@ -123,7 +123,8 @@ extern CORE_ADDR sparc_pc_adjust PARAMS ((CORE_ADDR));
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/* Nonzero if instruction at PC is a return instruction. */
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/* For SPARC, this is either a "jmpl %o7+8,%g0" or "jmpl %i7+8,%g0".
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Note: this does not work for functions returning structures under SunOS. */
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Note: this does not work for functions returning structures under SunOS.
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v9 does not have such critters though. */
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#define ABOUT_TO_RETURN(pc) \
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((read_memory_integer (pc, 4)|0x00040000) == 0x81c7e008)
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@ -259,8 +260,9 @@ extern CORE_ADDR sparc_pc_adjust PARAMS ((CORE_ADDR));
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} \
|
||||
else \
|
||||
memcpy ((VALBUF), \
|
||||
(char *)(REGBUF) + 4 * 8 + \
|
||||
(TYPE_LENGTH(TYPE) >= 4 ? 0 : 4 - TYPE_LENGTH(TYPE)), \
|
||||
(char *)(REGBUF) + REGISTER_RAW_SIZE (O0_REGNUM) * 8 + \
|
||||
(TYPE_LENGTH(TYPE) >= REGISTER_RAW_SIZE (O0_REGNUM) \
|
||||
? 0 : REGISTER_RAW_SIZE (O0_REGNUM) - TYPE_LENGTH(TYPE)), \
|
||||
TYPE_LENGTH(TYPE)); \
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user