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Add gdbarch_in_function_epilogue_p hook for sparc64.
watchpoint_update and watchpoint_cond avoid checking for watchpoints when we are located at a function epilogue in the current frame. This is done in order to avoid using corrupted local registers and unwinding a corrupted/destroyed stack. The code determining whether we are in a function epilogue is provided by the backends via the gdbarch_in_function_epilogue_p hook. This commit adds such a hook for sparc64 targets. 2014-02-10 Jose E. Marchesi <jose.marchesi@oracle.com> * sparc-tdep.c (sparc_in_function_epilogue_p): New function. (X_RETTURN): New macro. * sparc-tdep.h: sparc_in_function_epilogue_p prototype. * sparc64-tdep.c (sparc64_init_abi): Hook sparc_in_function_epilogue_p.
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@ -1,3 +1,12 @@
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2014-02-10 Jose E. Marchesi <jose.marchesi@oracle.com>
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* sparc-tdep.c (sparc_in_function_epilogue_p): New function.
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(X_RETTURN): New macro.
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* sparc-tdep.h: sparc_in_function_epilogue_p prototype.
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* sparc64-tdep.c (sparc64_init_abi): Hook
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sparc_in_function_epilogue_p.
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2014-02-10 Gary Benson <gbenson@redhat.com>
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* symfile-debug.c (debug_qf_expand_symtabs_matching):
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@ -88,6 +88,9 @@ struct regset;
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#define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
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#define X_DISP10(i) ((((((i) >> 11) && 0x300) | (((i) >> 5) & 0xff)) ^ 0x200) - 0x200)
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#define X_SIMM13(i) ((((i) & 0x1fff) ^ 0x1000) - 0x1000)
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/* Macros to identify some instructions. */
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/* RETURN (RETT in V8) */
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#define X_RETTURN(i) ((X_OP (i) == 0x2) && (X_OP3 (i) == 0x39))
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/* Fetch the instruction at PC. Instructions are always big-endian
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even if the processor operates in little-endian mode. */
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@ -452,6 +455,29 @@ sparc32_pseudo_register_write (struct gdbarch *gdbarch,
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regcache_raw_write (regcache, regnum + 1, buf + 4);
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}
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/* Implement "in_function_epilogue_p". */
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int
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sparc_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
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{
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/* This function must return true if we are one instruction after an
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instruction that destroyed the stack frame of the current
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function. The SPARC instructions used to restore the callers
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stack frame are RESTORE and RETURN/RETT.
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Of these RETURN/RETT is a branch instruction and thus we return
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true if we are in its delay slot.
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RESTORE is almost always found in the delay slot of a branch
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instruction that transfers control to the caller, such as JMPL.
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Thus the next instruction is in the caller frame and we don't
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need to do anything about it. */
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unsigned int insn = sparc_fetch_instruction (pc - 4);
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return X_RETTURN (insn);
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}
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static CORE_ADDR
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sparc32_frame_align (struct gdbarch *gdbarch, CORE_ADDR address)
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@ -193,6 +193,9 @@ extern struct sparc_frame_cache *
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extern struct sparc_frame_cache *
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sparc32_frame_cache (struct frame_info *this_frame, void **this_cache);
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extern int
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sparc_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc);
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extern int sparc_software_single_step (struct frame_info *frame);
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@ -1196,6 +1196,7 @@ sparc64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
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(gdbarch, default_stabs_argument_has_addr);
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set_gdbarch_skip_prologue (gdbarch, sparc64_skip_prologue);
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set_gdbarch_in_function_epilogue_p (gdbarch, sparc_in_function_epilogue_p);
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/* Hook in the DWARF CFI frame unwinder. */
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dwarf2_frame_set_init_reg (gdbarch, sparc64_dwarf2_frame_init_reg);
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