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Index: bfd/ChangeLog

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2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>
	    Corinna Vinschen  <vinschen@redhat.com>

	* Makefile.am: Add support for xstormy16.
	* archures.c: Add support for xstormy16.
	* config.bfd: Add support for xstormy16.
	* configure.in: Add support for xstormy16.
	* reloc.c: Add support for xstormy16.
	* targets.c: Add support for xstormy16.
	* cpu-xstormy16.c: New file.
	* elf32-xstormy16.c: New file.
	* Makefile.in: Regenerated.
	* bfd-in2.h: Regenerated.
	* configure: Regenerated.
	* libbfd.h: Regenerated.

Index: binutils/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>

	* readelf.c (guess_is_rela): Add support for stormy16.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.

Index: gas/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>

	* configure.in: Add support for xstormy16.
	* configure: Regenerated.
	* Makefile.am: Add support for xstormy16.
	* Makefile.in: Regenerated.
	* config/tc-xstormy16.c: New file.
	* config/tc-xstormy16.h: New file.

Index: gas/testsuite/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    matthew green  <mrg@redhat.com>

	* gas/xstormy16/allinsn.d: New file.
	* gas/xstormy16/allinsn.exp: New file.
	* gas/xstormy16/allinsn.s: New file.
	* gas/xstormy16/allinsn.sh: New file.
	* gas/xstormy16/gcc.d: New file.
	* gas/xstormy16/gcc.s: New file.
	* gas/xstormy16/gcc.sh: New file.
	* gas/xstormy16/reloc-1.d: New file.
	* gas/xstormy16/reloc-1.s: New file.
	* gas/xstormy16/reloc-2.d: New file.
	* gas/xstormy16/reloc-2.s: New file.

Index: ld/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>

	* Makefile.am: Add support for xstormy16.
	* configure.tgt: Add support for xstormy16.
	* Makefile.in: Regenerate.
	* emulparams/elf32xstormy16.sh: New file.
	* scripttempl/xstormy16.sc: New file.

Index: opcodes/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>

	* Makefile.am: Add support for xstormy16.
	* Makefile.in: Regenerate.
	* configure.in: Add support for xstormy16.
	* configure: Regenerate.
	* disassemble.c: Add support for xstormy16.
	* xstormy16-asm.c: New generated file.
	* xstormy16-desc.c: New generated file.
	* xstormy16-desc.h: New generated file.
	* xstormy16-dis.c: New generated file.
	* xstormy16-ibld.c: New generated file.
	* xstormy16-opc.c: New generated file.
	* xstormy16-opc.h: New generated file.

Index: include/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>

	* dis-asm.h (print_insn_xstormy16): Declare.

Index: include/elf/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>

	* common.h (EM_XSTORMY16): Define.
	* xstormy16.h: New file.
This commit is contained in:
Geoffrey Keating 2001-12-08 03:46:03 +00:00
parent 4b2c32f8e9
commit 93fbbb04b8
60 changed files with 12729 additions and 723 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
bfd/ChangeLog
View File

@ -1,3 +1,20 @@
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
Corinna Vinschen <vinschen@redhat.com>
* Makefile.am: Add support for xstormy16.
* archures.c: Add support for xstormy16.
* config.bfd: Add support for xstormy16.
* configure.in: Add support for xstormy16.
* reloc.c: Add support for xstormy16.
* targets.c: Add support for xstormy16.
* cpu-xstormy16.c: New file.
* elf32-xstormy16.c: New file.
* Makefile.in: Regenerated.
* bfd-in2.h: Regenerated.
* configure: Regenerated.
* libbfd.h: Regenerated.
2001-12-07 Nick Clifton <nickc@cambridge.redhat.com>
* elf.c (assign_file_positions_for_segments): Combine sentance

9
bfd/Makefile.am
View File

@ -89,6 +89,7 @@ ALL_MACHINES = \
cpu-vax.lo \
cpu-we32k.lo \
cpu-w65.lo \
cpu-xstormy16.lo \
cpu-z8k.lo
ALL_MACHINES_CFILES = \
@ -135,6 +136,7 @@ ALL_MACHINES_CFILES = \
cpu-vax.c \
cpu-we32k.c \
cpu-w65.c \
cpu-xstormy16.c \
cpu-z8k.c
# The .o files needed by all of the 32 bit vectors that are configured into
@ -217,6 +219,7 @@ BFD32_BACKENDS = \
elf32-sh-lin.lo \
elf32-sparc.lo \
elf32-v850.lo \
elf32-xstormy16.lo \
elf32.lo \
elflink.lo \
elf-strtab.lo \
@ -358,6 +361,7 @@ BFD32_BACKENDS_CFILES = \
elf32-sh-lin.c \
elf32-sparc.c \
elf32-v850.c \
elf32-xstormy16.c \
elf32.c \
elflink.c \
elf-strtab.c \
@ -857,6 +861,7 @@ cpu-v850.lo: cpu-v850.c $(INCDIR)/filenames.h $(INCDIR)/safe-ctype.h
cpu-vax.lo: cpu-vax.c $(INCDIR)/filenames.h
cpu-we32k.lo: cpu-we32k.c $(INCDIR)/filenames.h
cpu-w65.lo: cpu-w65.c $(INCDIR)/filenames.h
cpu-xstormy16.lo: cpu-xstormy16.c $(INCDIR)/filenames.h
cpu-z8k.lo: cpu-z8k.c $(INCDIR)/filenames.h
aout-adobe.lo: aout-adobe.c $(INCDIR)/filenames.h $(INCDIR)/aout/adobe.h \
$(INCDIR)/aout/stab_gnu.h $(INCDIR)/aout/stab.def libaout.h \
@ -1132,6 +1137,10 @@ elf32-v850.lo: elf32-v850.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h \
$(INCDIR)/libiberty.h elf32-target.h
elf32-xstormy16.lo: elf32-xstormy16.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/elf/xstormy16.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
elf32.lo: elf32.c elfcode.h $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
$(INCDIR)/bfdlink.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h \

9
bfd/Makefile.in
View File

@ -215,6 +215,7 @@ ALL_MACHINES = \
cpu-vax.lo \
cpu-we32k.lo \
cpu-w65.lo \
cpu-xstormy16.lo \
cpu-z8k.lo
@ -262,6 +263,7 @@ ALL_MACHINES_CFILES = \
cpu-vax.c \
cpu-we32k.c \
cpu-w65.c \
cpu-xstormy16.c \
cpu-z8k.c
@ -345,6 +347,7 @@ BFD32_BACKENDS = \
elf32-sh-lin.lo \
elf32-sparc.lo \
elf32-v850.lo \
elf32-xstormy16.lo \
elf32.lo \
elflink.lo \
elf-strtab.lo \
@ -487,6 +490,7 @@ BFD32_BACKENDS_CFILES = \
elf32-sh-lin.c \
elf32-sparc.c \
elf32-v850.c \
elf32-xstormy16.c \
elf32.c \
elflink.c \
elf-strtab.c \
@ -1401,6 +1405,7 @@ cpu-v850.lo: cpu-v850.c $(INCDIR)/filenames.h $(INCDIR)/safe-ctype.h
cpu-vax.lo: cpu-vax.c $(INCDIR)/filenames.h
cpu-we32k.lo: cpu-we32k.c $(INCDIR)/filenames.h
cpu-w65.lo: cpu-w65.c $(INCDIR)/filenames.h
cpu-xstormy16.lo: cpu-xstormy16.c $(INCDIR)/filenames.h
cpu-z8k.lo: cpu-z8k.c $(INCDIR)/filenames.h
aout-adobe.lo: aout-adobe.c $(INCDIR)/filenames.h $(INCDIR)/aout/adobe.h \
$(INCDIR)/aout/stab_gnu.h $(INCDIR)/aout/stab.def libaout.h \
@ -1676,6 +1681,10 @@ elf32-v850.lo: elf32-v850.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h \
$(INCDIR)/libiberty.h elf32-target.h
elf32-xstormy16.lo: elf32-xstormy16.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/elf/xstormy16.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
elf32.lo: elf32.c elfcode.h $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
$(INCDIR)/bfdlink.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h \

4
bfd/archures.c
View File

@ -259,6 +259,8 @@ DESCRIPTION
.#define bfd_mach_s390_esame 1
. bfd_arch_openrisc, {* OpenRISC *}
. bfd_arch_mmix, {* Donald Knuth's educational processor *}
. bfd_arch_xstormy16,
.#define bfd_mach_xstormy16 0
. bfd_arch_last
. };
*/
@ -338,6 +340,7 @@ extern const bfd_arch_info_type bfd_ia64_arch;
extern const bfd_arch_info_type bfd_s390_arch;
extern const bfd_arch_info_type bfd_openrisc_arch;
extern const bfd_arch_info_type bfd_mmix_arch;
extern const bfd_arch_info_type bfd_xstormy16_arch;
static const bfd_arch_info_type * const bfd_archures_list[] = {
#ifdef SELECT_ARCHITECTURES
@ -386,6 +389,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] = {
&bfd_s390_arch,
&bfd_openrisc_arch,
&bfd_mmix_arch,
&bfd_xstormy16_arch,
#endif
0
};

7
bfd/bfd-in2.h
View File

@ -1612,6 +1612,8 @@ enum bfd_architecture
#define bfd_mach_s390_esame 1
bfd_arch_openrisc, /* OpenRISC */
bfd_arch_mmix, /* Donald Knuth's educational processor */
bfd_arch_xstormy16,
#define bfd_mach_xstormy16 0
bfd_arch_last
};
@ -2919,6 +2921,11 @@ This is the 3 bits of a value. */
BFD_RELOC_H8_DIR24A8,
BFD_RELOC_H8_DIR24R8,
BFD_RELOC_H8_DIR32A16,
/* Sony Xstormy16 Relocations. */
BFD_RELOC_XSTORMY16_REL_12,
BFD_RELOC_XSTORMY16_24,
BFD_RELOC_XSTORMY16_FPTR16,
BFD_RELOC_UNUSED };
typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
reloc_howto_type *

4
bfd/config.bfd
View File

@ -972,6 +972,10 @@ case "${targ}" in
targ_defvec=w65_vec
;;
xstormy16-*-elf)
targ_defvec=bfd_elf32_xstormy16_vec
;;
z8k*-*-*)
targ_defvec=z8kcoff_vec
targ_underscore=yes

540
bfd/configure vendored
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File diff suppressed because it is too large Load Diff

1
bfd/configure.in
View File

@ -583,6 +583,7 @@ do
bfd_elf32_tradlittlemips_vec) tb="$tb elf32-mips.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_us_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
bfd_elf32_v850_vec) tb="$tb elf32-v850.lo elf32.lo $elf" ;;
bfd_elf32_xstormy16_vec) tb="$tb elf32-xstormy16.lo elf32.lo $elf" ;;
bfd_elf64_alpha_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_big_generic_vec) tb="$tb elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_bigmips_vec) tb="$tb elf64-mips.lo elf64.lo elf32-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;

38
bfd/cpu-xstormy16.c Normal file
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@ -0,0 +1,38 @@
/* BFD support for the XSTORMY16 processor.
Copyright (C) 2001 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
const bfd_arch_info_type bfd_xstormy16_arch =
{
16, /* bits per word */
32, /* bits per address */
8, /* bits per byte */
bfd_arch_xstormy16, /* architecture */
bfd_mach_xstormy16, /* machine */
"xstormy16", /* architecture name */
"xstormy16", /* printable name */
2, /* section align power */
true, /* the default ? */
bfd_default_compatible, /* architecture comparison fn */
bfd_default_scan, /* string to architecture convert fn */
NULL /* next in list */
};

6
bfd/doc/Makefile.in
View File

@ -1,6 +1,6 @@
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
@ -327,7 +327,7 @@ uninstall-info:
else ii=; fi; \
list='$(INFO_DEPS)'; \
for file in $$list; do \
test -z "$$ii" \
test -z "$ii" \
|| install-info --info-dir=$(DESTDIR)$(infodir) --remove $$file; \
done
@$(NORMAL_UNINSTALL)

1074
bfd/elf32-xstormy16.c Normal file
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File diff suppressed because it is too large Load Diff

3
bfd/libbfd.h
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@ -1141,6 +1141,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_H8_DIR24A8",
"BFD_RELOC_H8_DIR24R8",
"BFD_RELOC_H8_DIR32A16",
"BFD_RELOC_XSTORMY16_REL_12",
"BFD_RELOC_XSTORMY16_24",
"BFD_RELOC_XSTORMY16_FPTR16",
"@@overflow: BFD_RELOC_UNUSED@@",
};
#endif

9
bfd/reloc.c
View File

@ -3253,6 +3253,15 @@ ENUMX
ENUMDOC
H8 elf Relocations.
ENUM
BFD_RELOC_XSTORMY16_REL_12
ENUMX
BFD_RELOC_XSTORMY16_24
ENUMX
BFD_RELOC_XSTORMY16_FPTR16
ENUMDOC
Sony Xstormy16 Relocations.
ENDSENUM
BFD_RELOC_UNUSED
CODE_FRAGMENT

2
bfd/targets.c
View File

@ -554,6 +554,7 @@ extern const bfd_target bfd_elf32_tradbigmips_vec;
extern const bfd_target bfd_elf32_tradlittlemips_vec;
extern const bfd_target bfd_elf32_us_cris_vec;
extern const bfd_target bfd_elf32_v850_vec;
extern const bfd_target bfd_elf32_xstormy16_vec;
extern const bfd_target bfd_elf64_alpha_vec;
extern const bfd_target bfd_elf64_big_generic_vec;
extern const bfd_target bfd_elf64_bigmips_vec;
@ -793,6 +794,7 @@ static const bfd_target * const _bfd_target_vector[] = {
&bfd_elf32_tradlittlemips_vec,
&bfd_elf32_us_cris_vec,
&bfd_elf32_v850_vec,
&bfd_elf32_xstormy16_vec,
#ifdef BFD64
&bfd_elf64_alpha_vec,
&bfd_elf64_big_generic_vec,

6
binutils/ChangeLog
View File

@ -1,3 +1,9 @@
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
* readelf.c (guess_is_rela): Add support for stormy16.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
2001-12-05 Nick Clifton <nickc@cambridge.redhat.com>
* dllwrap.c (main) Replace multiple strings describing a

7
binutils/readelf.c
View File

@ -77,6 +77,7 @@
#include "elf/i860.h"
#include "elf/x86-64.h"
#include "elf/s390.h"
#include "elf/xstormy16.h"
#include "bucomm.h"
#include "getopt.h"
@ -595,6 +596,7 @@ guess_is_rela (e_machine)
case EM_S390:
case EM_S390_OLD:
case EM_MMIX:
case EM_XSTORMY16:
return TRUE;
case EM_MMA:
@ -1009,6 +1011,10 @@ dump_relocations (file, rel_offset, rel_size, symtab, nsyms, strtab, is_rela)
case EM_S390:
rtype = elf_s390_reloc_type (type);
break;
case EM_XSTORMY16:
rtype = elf_xstormy16_reloc_type (type);
break;
}
if (rtype == NULL)
@ -1396,6 +1402,7 @@ get_machine_name (e_machine)
case EM_X86_64: return "Advanced Micro Devices X86-64";
case EM_S390_OLD:
case EM_S390: return "IBM S/390";
case EM_XSTORMY16: return "Sanyo Xstormy16 CPU core";
default:
sprintf (buff, _("<unknown>: %x"), e_machine);
return buff;

10
gas/ChangeLog
View File

@ -1,3 +1,13 @@
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
* configure.in: Add support for xstormy16.
* configure: Regenerated.
* Makefile.am: Add support for xstormy16.
* Makefile.in: Regenerated.
* config/tc-xstormy16.c: New file.
* config/tc-xstormy16.h: New file.
2001-12-06 Richard Earnshaw (rearnsha@arm.com)
* tc-arm.c (do_arit, do_cmp, do_mov, do_ldst, do_ldstt, do_ldmstm)

3
gas/Makefile.am
View File

@ -78,6 +78,7 @@ CPU_TYPES = \
vax \
w65 \
v850 \
xstormy16 \
z8k
# Object format types. This is only used for dependency information.
@ -263,6 +264,7 @@ TARGET_CPU_CFILES = \
config/tc-vax.c \
config/tc-w65.c \
config/tc-v850.c \
config/tc-xstormy16.c \
config/tc-z8k.c
TARGET_CPU_HFILES = \
@ -307,6 +309,7 @@ TARGET_CPU_HFILES = \
config/tc-vax.h \
config/tc-w65.h \
config/tc-v850.h \
config/tc-xstormy16.h \
config/tc-z8k.h
# OBJ files in config

9
gas/Makefile.in
View File

@ -1,6 +1,6 @@
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
@ -189,6 +189,7 @@ CPU_TYPES = \
vax \
w65 \
v850 \
xstormy16 \
z8k
@ -380,6 +381,7 @@ TARGET_CPU_CFILES = \
config/tc-vax.c \
config/tc-w65.c \
config/tc-v850.c \
config/tc-xstormy16.c \
config/tc-z8k.c
@ -425,6 +427,7 @@ TARGET_CPU_HFILES = \
config/tc-vax.h \
config/tc-w65.h \
config/tc-v850.h \
config/tc-xstormy16.h \
config/tc-z8k.h
@ -2354,7 +2357,7 @@ maintainer-clean-recursive:
dot_seen=no; \
rev=''; list='$(SUBDIRS)'; for subdir in $$list; do \
rev="$$subdir $$rev"; \
test "$$subdir" != "." || dot_seen=yes; \
test "$$subdir" = "." && dot_seen=yes; \
done; \
test "$$dot_seen" = "no" && rev=". $$rev"; \
target=`echo $@ | sed s/-recursive//`; \

650
gas/config/tc-xstormy16.c Normal file
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@ -0,0 +1,650 @@
/* tc-xstormy16.c -- Assembler for the Sanyo XSTORMY16.
Copyright (C) 2000, 2001 Free Software Foundation.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include <stdio.h>
#include "as.h"
#include "subsegs.h"
#include "symcat.h"
#include "opcodes/xstormy16-desc.h"
#include "opcodes/xstormy16-opc.h"
#include "cgen.h"
/* Structure to hold all of the different components describing
an individual instruction. */
typedef struct
{
const CGEN_INSN * insn;
const CGEN_INSN * orig_insn;
CGEN_FIELDS fields;
#if CGEN_INT_INSN_P
CGEN_INSN_INT buffer [1];
#define INSN_VALUE(buf) (*(buf))
#else
unsigned char buffer [CGEN_MAX_INSN_SIZE];
#define INSN_VALUE(buf) (buf)
#endif
char * addr;
fragS * frag;
int num_fixups;
fixS * fixups [GAS_CGEN_MAX_FIXUPS];
int indices [MAX_OPERAND_INSTANCES];
}
xstormy16_insn;
const char comment_chars[] = ";";
const char line_comment_chars[] = "#";
const char line_separator_chars[] = "|";
const char EXP_CHARS[] = "eE";
const char FLT_CHARS[] = "dD";
#define O_fptr_symbol (O_max + 1)
#define XSTORMY16_SHORTOPTS ""
const char * md_shortopts = XSTORMY16_SHORTOPTS;
struct option md_longopts[] =
{
{NULL, no_argument, NULL, 0}
};
size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (c, arg)
int c ATTRIBUTE_UNUSED;
char * arg ATTRIBUTE_UNUSED;
{
return 0;
}
void
md_show_usage (stream)
FILE * stream;
{
fprintf (stream, _(" XSTORMY16 specific command line options:\n"));
}
/* The target specific pseudo-ops which we support. */
const pseudo_typeS md_pseudo_table[] =
{
{ "word", cons, 4 },
{ NULL, NULL, 0 }
};
void
md_begin ()
{
/* Initialize the `cgen' interface. */
/* Set the machine number and endian. */
gas_cgen_cpu_desc = xstormy16_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
CGEN_CPU_OPEN_ENDIAN,
CGEN_ENDIAN_LITTLE,
CGEN_CPU_OPEN_END);
xstormy16_cgen_init_asm (gas_cgen_cpu_desc);
/* This is a callback from cgen to gas to parse operands. */
cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
}
void
md_assemble (str)
char * str;
{
xstormy16_insn insn;
char * errmsg;
/* Initialize GAS's cgen interface for a new instruction. */
gas_cgen_init_parse ();
insn.insn = xstormy16_cgen_assemble_insn
(gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
if (!insn.insn)
{
as_bad (errmsg);
return;
}
/* Doesn't really matter what we pass for RELAX_P here. */
gas_cgen_finish_insn (insn.insn, insn.buffer,
CGEN_FIELDS_BITSIZE (& insn.fields), 0, NULL);
}
void
md_operand (e)
expressionS * e;
{
if (*input_line_pointer != '@')
return;
if (strncmp (input_line_pointer+1, "fptr", 4) == 0)
{
input_line_pointer += 5;
SKIP_WHITESPACE ();
if (*input_line_pointer != '(')
{
as_bad ("Expected '('");
goto err;
}
input_line_pointer++;
expression (e);
if (*input_line_pointer != ')')
{
as_bad ("Missing ')'");
goto err;
}
input_line_pointer++;
if (e->X_op != O_symbol)
as_bad ("Not a symbolic expression");
else
e->X_op = O_fptr_symbol;
}
return;
err:
ignore_rest_of_line ();
}
/* Called while parsing data to create a fixup.
Create BFD_RELOC_XSTORMY16_FPTR16 relocations. */
void
xstormy16_cons_fix_new (f, where, nbytes, exp)
fragS *f;
int where;
int nbytes;
expressionS *exp;
{
bfd_reloc_code_real_type code;
fixS *fix;
if (exp->X_op == O_fptr_symbol)
{
if (nbytes != 2)
{
as_bad ("unsupported fptr fixup size %d", nbytes);
return;
}
exp->X_op = O_symbol;
code = BFD_RELOC_XSTORMY16_FPTR16;
}
else if (nbytes == 1)
code = BFD_RELOC_8;
else if (nbytes == 2)
code = BFD_RELOC_16;
else if (nbytes == 4)
code = BFD_RELOC_32;
else
{
as_bad ("unsupported fixup size %d", nbytes);
return;
}
fix = fix_new_exp (f, where, nbytes, exp, 0, code);
}
/* Called while parsing an instruction to create a fixup.
Create BFD_RELOC_XSTORMY16_FPTR16 relocations. */
fixS *
xstormy16_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp)
fragS * frag;
int where;
const CGEN_INSN * insn;
int length;
const CGEN_OPERAND * operand;
int opinfo;
expressionS * exp;
{
fixS *fixP;
operatorT op = exp->X_op;
if (op == O_fptr_symbol)
exp->X_op = O_symbol;
fixP = gas_cgen_record_fixup_exp (frag, where, insn, length,
operand, opinfo, exp);
if (op == O_fptr_symbol)
{
if (operand->type != XSTORMY16_OPERAND_IMM16)
as_bad ("unsupported fptr fixup");
else
{
fixP->fx_r_type = BFD_RELOC_XSTORMY16_FPTR16;
fixP->fx_where += 2;
}
}
return fixP;
}
valueT
md_section_align (segment, size)
segT segment;
valueT size;
{
int align = bfd_get_section_alignment (stdoutput, segment);
return ((size + (1 << align) - 1) & (-1 << align));
}
symbolS *
md_undefined_symbol (name)
char * name ATTRIBUTE_UNUSED;
{
return 0;
}
/* Return an initial guess of the length by which a fragment must grow to
hold a branch to reach its destination.
Also updates fr_type/fr_subtype as necessary.
Called just before doing relaxation.
Any symbol that is now undefined will not become defined.
The guess for fr_var is ACTUALLY the growth beyond fr_fix.
Whatever we do to grow fr_fix or fr_var contributes to our returned value.
Although it may not be explicit in the frag, pretend fr_var starts with a
0 value. */
int
md_estimate_size_before_relax (fragP, segment)
fragS * fragP ATTRIBUTE_UNUSED;
segT segment ATTRIBUTE_UNUSED;
{
/* No assembler relaxation is defined (or necessary) for this port. */
abort ();
}
/* *fragP has been relaxed to its final size, and now needs to have
the bytes inside it modified to conform to the new size.
Called after relaxation is finished.
fragP->fr_type == rs_machine_dependent.
fragP->fr_subtype is the subtype of what the address relaxed to. */
void
md_convert_frag (abfd, sec, fragP)
bfd * abfd ATTRIBUTE_UNUSED;
segT sec ATTRIBUTE_UNUSED;
fragS * fragP ATTRIBUTE_UNUSED;
{
/* No assembler relaxation is defined (or necessary) for this port. */
abort ();
}
/* Functions concerning relocs. */
/* The location from which a PC relative jump should be calculated,
given a PC relative reloc. */
long
md_pcrel_from_section (fixP, sec)
fixS * fixP;
segT sec;
{
if (fixP->fx_addsy != (symbolS *) NULL
&& (! S_IS_DEFINED (fixP->fx_addsy)
|| S_GET_SEGMENT (fixP->fx_addsy) != sec))
{
/* The symbol is undefined (or is defined but not in this section).
Let the linker figure it out. */
return 0;
}
return fixP->fx_frag->fr_address + fixP->fx_where;
}
/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
Returns BFD_RELOC_NONE if no reloc type can be found.
*FIXP may be modified if desired. */
bfd_reloc_code_real_type
md_cgen_lookup_reloc (insn, operand, fixP)
const CGEN_INSN * insn ATTRIBUTE_UNUSED;
const CGEN_OPERAND * operand;
fixS * fixP;
{
switch (operand->type)
{
case XSTORMY16_OPERAND_IMM2:
case XSTORMY16_OPERAND_IMM3:
case XSTORMY16_OPERAND_IMM3B:
case XSTORMY16_OPERAND_IMM4:
case XSTORMY16_OPERAND_IMM12:
case XSTORMY16_OPERAND_HMEM8:
return BFD_RELOC_NONE;
case XSTORMY16_OPERAND_IMM8:
case XSTORMY16_OPERAND_LMEM8:
return fixP->fx_pcrel ? BFD_RELOC_8_PCREL : BFD_RELOC_8;
case XSTORMY16_OPERAND_IMM16:
fixP->fx_where += 2;
return fixP->fx_pcrel ? BFD_RELOC_16_PCREL : BFD_RELOC_16;
case XSTORMY16_OPERAND_ABS24:
return BFD_RELOC_XSTORMY16_24;
case XSTORMY16_OPERAND_REL8_2:
case XSTORMY16_OPERAND_REL8_4:
fixP->fx_pcrel = 1;
return BFD_RELOC_8_PCREL;
case XSTORMY16_OPERAND_REL12:
fixP->fx_where += 2;
/* Fall through... */
case XSTORMY16_OPERAND_REL12A:
fixP->fx_pcrel = 1;
return BFD_RELOC_XSTORMY16_REL_12;
default : /* avoid -Wall warning */
abort ();
}
}
/* See whether we need to force a relocation into the output file.
This is used to force out switch and PC relative relocations when
relaxing. */
int
xstormy16_force_relocation (fix)
fixS * fix;
{
switch (fix->fx_r_type)
{
case BFD_RELOC_XSTORMY16_FPTR16:
case BFD_RELOC_VTABLE_INHERIT:
case BFD_RELOC_VTABLE_ENTRY:
return 1;
default:
return 0;
}
}
/* Return true if a relocation against a symbol may be replaced with
a relocation against section+offset. */
boolean
xstormy16_fix_adjustable (fixP)
fixS * fixP;
{
if (fixP->fx_addsy == NULL)
return 1;
/* Prevent all adjustments to global symbols. */
if (S_IS_EXTERN (fixP->fx_addsy))
return 0;
if (S_IS_WEAK (fixP->fx_addsy))
return 0;
return ! xstormy16_force_relocation (fixP);
}
/* This is a copy of gas_cgen_md_apply_fix3, with some enhancements to
do various things that would not be valid for all ports. */
void
xstormy16_md_apply_fix3 (fixP, valueP, seg)
fixS * fixP;
valueT * valueP;
segT seg ATTRIBUTE_UNUSED;
{
char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
valueT value;
/* Canonical name, since used a lot. */
CGEN_CPU_DESC cd = gas_cgen_cpu_desc;
/* This port has pc-relative relocs and DIFF_EXPR_OK defined, so
it must deal with turning a BFD_RELOC_{8,16,32,64} into a
BFD_RELOC_*_PCREL for the case of
.word something-.
*/
if (fixP->fx_pcrel)
switch (fixP->fx_r_type)
{
case BFD_RELOC_8:
fixP->fx_r_type = BFD_RELOC_8_PCREL;
break;
case BFD_RELOC_16:
fixP->fx_r_type = BFD_RELOC_16_PCREL;
break;
case BFD_RELOC_32:
fixP->fx_r_type = BFD_RELOC_32_PCREL;
break;
case BFD_RELOC_64:
fixP->fx_r_type = BFD_RELOC_64_PCREL;
break;
default:
break;
}
/* FIXME FIXME FIXME: The value we are passed in *valuep includes
the symbol values. Since we are using BFD_ASSEMBLER, if we are
doing this relocation the code in write.c is going to call
bfd_install_relocation, which is also going to use the symbol
value. That means that if the reloc is fully resolved we want to
use *valuep since bfd_install_relocation is not being used.
However, if the reloc is not fully resolved we do not want to use
*valuep, and must use fx_offset instead. However, if the reloc
is PC relative, we do want to use *valuep since it includes the
result of md_pcrel_from. This is confusing. */
if (fixP->fx_addsy == (symbolS *) NULL)
{
value = *valueP;
fixP->fx_done = 1;
}
else if (fixP->fx_pcrel)
value = *valueP;
else
{
value = fixP->fx_offset;
if (fixP->fx_subsy != (symbolS *) NULL)
{
if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
value -= S_GET_VALUE (fixP->fx_subsy);
else
{
/* We don't actually support subtracting a symbol. */
as_bad_where (fixP->fx_file, fixP->fx_line,
_("expression too complex"));
}
}
}
if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
{
int opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
const CGEN_OPERAND *operand = cgen_operand_lookup_by_num (cd, opindex);
const char *errmsg;
bfd_reloc_code_real_type reloc_type;
CGEN_FIELDS *fields = alloca (CGEN_CPU_SIZEOF_FIELDS (cd));
const CGEN_INSN *insn = fixP->fx_cgen.insn;
/* If the reloc has been fully resolved finish the operand here. */
/* FIXME: This duplicates the capabilities of code in BFD. */
if (fixP->fx_done)
{
CGEN_CPU_SET_FIELDS_BITSIZE (cd) (fields, CGEN_INSN_BITSIZE (insn));
CGEN_CPU_SET_VMA_OPERAND (cd) (cd, opindex, fields, (bfd_vma) value);
#if CGEN_INT_INSN_P
{
CGEN_INSN_INT insn_value =
cgen_get_insn_value (cd, where, CGEN_INSN_BITSIZE (insn));
/* ??? 0 is passed for `pc'. */
errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields,
&insn_value, (bfd_vma) 0);
cgen_put_insn_value (cd, where, CGEN_INSN_BITSIZE (insn),
insn_value);
}
#else
/* ??? 0 is passed for `pc'. */
errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields, where,
(bfd_vma) 0);
#endif
if (errmsg)
as_bad_where (fixP->fx_file, fixP->fx_line, "%s", errmsg);
}
if (fixP->fx_done)
return 1;
/* The operand isn't fully resolved. Determine a BFD reloc value
based on the operand information and leave it to
bfd_install_relocation. Note that this doesn't work when
partial_inplace == false. */
reloc_type = md_cgen_lookup_reloc (insn, operand, fixP);
if (reloc_type != BFD_RELOC_NONE)
{
fixP->fx_r_type = reloc_type;
}
else
{
as_bad_where (fixP->fx_file, fixP->fx_line,
_("unresolved expression that must be resolved"));
fixP->fx_done = 1;
return 1;
}
}
else if (fixP->fx_done)
{
/* We're finished with this fixup. Install it because
bfd_install_relocation won't be called to do it. */
switch (fixP->fx_r_type)
{
case BFD_RELOC_8:
md_number_to_chars (where, value, 1);
break;
case BFD_RELOC_16:
md_number_to_chars (where, value, 2);
break;
case BFD_RELOC_32:
md_number_to_chars (where, value, 4);
break;
case BFD_RELOC_64:
md_number_to_chars (where, value, 8);
break;
default:
as_bad_where (fixP->fx_file, fixP->fx_line,
_("internal error: can't install fix for reloc type %d (`%s')"),
fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type));
break;
}
}
else
{
/* bfd_install_relocation will be called to finish things up. */
}
/* This is a RELA port. Thus, it does not need to store a
value if it is going to make a reloc. What's more, when
assembling a line like
.byte global-0x7f00
we'll get a spurious error message if we try to stuff 0x7f00 into
the byte. */
if (! fixP->fx_done)
*valueP = 0;
/* Tuck `value' away for use by tc_gen_reloc.
See the comment describing fx_addnumber in write.h.
This field is misnamed (or misused :-). */
fixP->fx_addnumber = value;
return 1;
}
/* Write a value out to the object file, using the appropriate endianness. */
void
md_number_to_chars (buf, val, n)
char * buf;
valueT val;
int n;
{
number_to_chars_littleendian (buf, val, n);
}
/* Turn a string in input_line_pointer into a floating point constant of type
type, and store the appropriate bytes in *litP. The number of LITTLENUMS
emitted is stored in *sizeP . An error message is returned, or NULL on OK.
*/
/* Equal to MAX_PRECISION in atof-ieee.c */
#define MAX_LITTLENUMS 6
char *
md_atof (type, litP, sizeP)
char type;
char * litP;
int * sizeP;
{
int prec;
LITTLENUM_TYPE words [MAX_LITTLENUMS];
LITTLENUM_TYPE *wordP;
char * t;
switch (type)
{
case 'f':
case 'F':
prec = 2;
break;
case 'd':
case 'D':
prec = 4;
break;
/* FIXME: Some targets allow other format chars for bigger sizes here. */
default:
* sizeP = 0;
return _("Bad call to md_atof()");
}
t = atof_ieee (input_line_pointer, type, words);
if (t)
input_line_pointer = t;
* sizeP = prec * sizeof (LITTLENUM_TYPE);
*sizeP = prec * sizeof (LITTLENUM_TYPE);
/* This loops outputs the LITTLENUMs in REVERSE order; in accord with
the littleendianness of the processor. */
for (wordP = words + prec - 1; prec--;)
{
md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
litP += sizeof (LITTLENUM_TYPE);
}
return 0;
}

69
gas/config/tc-xstormy16.h Normal file
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@ -0,0 +1,69 @@
/* tc-xstormy16.h -- Header file for tc-xstormy16.c.
Copyright (C) 2000, 2001 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#define TC_XSTORMY16
#ifndef BFD_ASSEMBLER
/* leading space so will compile with cc */
#error XSTORMY16 support requires BFD_ASSEMBLER
#endif
#define LISTING_HEADER "XSTORMY16 GAS "
/* The target BFD architecture. */
#define TARGET_ARCH bfd_arch_xstormy16
#define TARGET_FORMAT "elf32-xstormy16"
#define TARGET_BYTES_BIG_ENDIAN 0
/* call md_pcrel_from_section, not md_pcrel_from */
long md_pcrel_from_section PARAMS ((struct fix *, segT));
#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section (FIXP, SEC)
/* Permit temporary numeric labels. */
#define LOCAL_LABELS_FB 1
#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
/* We don't need to handle .word strangely. */
#define WORKING_DOT_WORD
#define MD_APPLY_FIX3
#define md_apply_fix3 xstormy16_md_apply_fix3
#define obj_fix_adjustable(fixP) xstormy16_fix_adjustable (fixP)
extern boolean xstormy16_fix_adjustable PARAMS ((struct fix *));
#define TC_FORCE_RELOCATION(fix) xstormy16_force_relocation (fix)
extern int xstormy16_force_relocation PARAMS ((struct fix *));
#define TC_HANDLES_FX_DONE
#define tc_gen_reloc gas_cgen_tc_gen_reloc
/* Call md_pcrel_from_section(), not md_pcrel_from(). */
#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section (FIXP, SEC)
extern long md_pcrel_from_section PARAMS ((struct fix *, segT));
#define TC_CONS_FIX_NEW xstormy16_cons_fix_new
extern void xstormy16_cons_fix_new PARAMS ((fragS *f, int, int, expressionS *));
#define md_cgen_record_fixup_exp xstormy16_cgen_record_fixup_exp

520
gas/configure vendored
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10
gas/configure.in
View File

@ -449,12 +449,13 @@ changequote([,])dnl
fmt=aout ;;
vax-*-vms) fmt=vms ;;
w65-*-*) fmt=coff ;;
xstormy16-*-*) fmt=elf bfd_gas=yes ;;
z8k-*-coff | z8k-*-sim)
fmt=coff ;;
w65-*-*) fmt=coff ;;
*-*-aout | *-*-scout)
fmt=aout ;;
*-*-freebsd*) fmt=elf em=freebsd bfd_gas=yes ;;
@ -570,6 +571,11 @@ changequote([,])dnl
AC_DEFINE_UNQUOTED(DEFAULT_ARCH, "${arch}", [Default architecture.])
fi
;;
xstormy16)
using_cgen=yes
;;
*)
;;
esac

7
gas/doc/Makefile.in
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@ -1,6 +1,6 @@
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
@ -129,6 +129,7 @@ TEXI2POD = perl $(top_srcdir)/../etc/texi2pod.pl
POD2MAN = pod2man --center="GNU Development Tools" \
--release="binutils-$(VERSION)" --section=1
man_MANS = as.1
info_TEXINFOS = as.texinfo gasp.texi
@ -277,7 +278,7 @@ uninstall-info:
else ii=; fi; \
list='$(INFO_DEPS)'; \
for file in $$list; do \
test -z "$$ii" \
test -z "$ii" \
|| install-info --info-dir=$(DESTDIR)$(infodir) --remove $$file; \
done
@$(NORMAL_UNINSTALL)

18
gas/testsuite/ChangeLog
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@ -1,8 +1,26 @@
<<<<<<< ChangeLog
2001-11-26 Geoffrey Keating <geoffk@redhat.com>
matthew green <mrg@redhat.com>
* gas/xstormy16/allinsn.d: New file.
* gas/xstormy16/allinsn.exp: New file.
* gas/xstormy16/allinsn.s: New file.
* gas/xstormy16/allinsn.sh: New file.
* gas/xstormy16/gcc.d: New file.
* gas/xstormy16/gcc.s: New file.
* gas/xstormy16/gcc.sh: New file.
* gas/xstormy16/reloc-1.d: New file.
* gas/xstormy16/reloc-1.s: New file.
* gas/xstormy16/reloc-2.d: New file.
* gas/xstormy16/reloc-2.s: New file.
=======
2001-12-08 Alan Modra <amodra@bigpond.net.au>
* gas/all/incbin.s: Add spaces before directives.
* gas/all/incbin.d: Update.
>>>>>>> 1.255
Fri Dec 7 09:16:07 2001 Jeffrey A Law (law@cygnus.com)
* gas/hppa/parse/linesepbug.s: Restore to its original form,

1222
gas/testsuite/gas/xstormy16/allinsn.d Normal file
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8
gas/testsuite/gas/xstormy16/allinsn.exp Normal file
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@ -0,0 +1,8 @@
# XSTORMY16 assembler testsuite. -*- Tcl -*-
if [istarget xstormy16*-*-*] {
run_dump_test "allinsn"
run_dump_test "reloc-1"
run_dump_test "reloc-2"
run_dump_test "gcc"
}

1346
gas/testsuite/gas/xstormy16/allinsn.s Normal file
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1389
gas/testsuite/gas/xstormy16/allinsn.sh Normal file
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15
gas/testsuite/gas/xstormy16/gcc.d Normal file
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@ -0,0 +1,15 @@
#as:
#objdump: -dr
#name: gcc
.*: +file format .*
Disassembly of section \.text:
00000000 <\.text>:
0: 30 31 ff ff mov r0,#0xffff
4: 30 31 ff ff mov r0,#0xffff
8: 40 31 00 00 add r0,#0x0
a: R_XSTORMY16_16 some_external_symbol
c: 30 31 00 00 mov r0,#0x0
e: R_XSTORMY16_16 some_external_symbol

4
gas/testsuite/gas/xstormy16/gcc.s Normal file
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@ -0,0 +1,4 @@
mov.w r0,#-1
mov.w r0,#0xFFFF
add r0,#some_external_symbol
mov.w r0,#some_external_symbol

45
gas/testsuite/gas/xstormy16/gcc.sh Normal file
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@ -0,0 +1,45 @@
#/bin/sh
# Generate test result data for xstormy16 GAS testing.
# It is intended to be run in the testsuite source directory.
#
# Syntax: build.sh /path/to/build/gas
if [ $# = 0 ] ; then
if [ ! -x ../gas/as-new ] ; then
echo "Usage: $0 [/path/to/gas/build]"
else
BUILD=`pwd`/../gas
fi
else
BUILD=$1
fi
if [ ! -x $BUILD/as-new ] ; then
echo "$BUILD is not a gas build directory"
exit 1
fi
# Put results here, so we preserve the existing set for comparison.
rm -rf tmpdir
mkdir tmpdir
cd tmpdir
function gentest {
rm -f a.out
$BUILD/as-new ${1}.s -o a.out
echo "#as:" >${1}.d
echo "#objdump: -dr" >>${1}.d
echo "#name: $1" >>${1}.d
$BUILD/../binutils/objdump -dr a.out | sed -e 's/(/\\(/g' -e 's/)/\\)/g' -e 's/\$/\\$/g' -e 's/\[/\\\[/g' -e 's/\]/\\\]/g' -e 's/[+]/\\+/g' -e 's/[.]/\\./g' -e 's/[*]/\\*/g' | sed -e 's/^.*file format.*$/.*: +file format .*/' >>${1}.d
rm -f a.out
}
# Now come all the testcases.
cat > gcc.s <<EOF
mov.w r0,#-1
mov.w r0,#0xFFFF
add r0,#some_external_symbol
EOF
# Finally, generate the .d file.
gentest gcc

26
gas/testsuite/gas/xstormy16/reloc-1.d Normal file
View File

@ -0,0 +1,26 @@
#as:
#objdump: -rs
#name: reloc-1
.*: +file format .*
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0*000 R_XSTORMY16_16 global
0*002 R_XSTORMY16_16 global\+0x00000003
0*004 R_XSTORMY16_PC16 global\+0xfffffffc
0*006 R_XSTORMY16_32 global
0*00a R_XSTORMY16_32 global\+0x00000003
0*00e R_XSTORMY16_PC32 global\+0xfffffff2
0*012 R_XSTORMY16_8 global
0*013 R_XSTORMY16_8 global\+0xffff8100
0*014 R_XSTORMY16_8 global\+0x00000003
0*015 R_XSTORMY16_PC8 global\+0xffffffeb
0*016 R_XSTORMY16_16 dglobal
0*018 R_XSTORMY16_16 dwglobal
Contents of section \.text:
0000 00000000 00000000 00000000 00000000 \................
0010 00000000 00000000 0000 \..........
Contents of section \.data:

20
gas/testsuite/gas/xstormy16/reloc-1.s Normal file
View File

@ -0,0 +1,20 @@
.text
.hword global
.hword global+3
.hword global-.
.word global
.word global+3
.word global-.
.byte global
.byte global-0x7F00
.byte global+3
.byte global-.
dglobal:
dwglobal:
.globl dglobal
.globl dwglobal
.weak dwglobal
.hword dglobal
.hword dwglobal

56
gas/testsuite/gas/xstormy16/reloc-2.d Normal file
View File

@ -0,0 +1,56 @@
#as:
#objdump: -dr
#name: reloc-2
.*: +file format .*
Disassembly of section \.text:
00000000 <\.text>:
0: 10 30 inc r0,#0x1
2: 00 e3 set1 0x0,#0x1
4: 00 7c fc 1f bn 0x0,#0x1,0x4
8: 40 31 01 00 add r0,#0x1
c: 08 71 01 00 mov\.w r0,\(r0,1\)
10: 01 79 00 00 mov\.w 0x1,#0x0
14: 01 47 mov Rx,#0x1
16: 00 79 01 00 mov\.w 0x0,#0x1
1a: 01 02 00 00 jmpf 0x1
1e: ff d0 bge 0x1f
20: fd c0 00 00 bge Rx,#0x0,0x21
24: 00 0d fd 0f bge r0,r0,0x25
28: fe 1f br 0x28
2a: 00 79 00 00 mov\.w 0x0,#0x0
2a: R_XSTORMY16_8 global
2e: 00 47 mov Rx,#0x0
2e: R_XSTORMY16_8 global
30: 00 79 00 00 mov\.w 0x0,#0x0
32: R_XSTORMY16_16 global
34: fe d0 bge 0x34
34: R_XSTORMY16_PC8 global
36: fc c0 00 00 bge Rx,#0x0,0x36
36: R_XSTORMY16_PC8 global
3a: 00 0d fc 0f bge r0,r0,0x3a
3c: R_XSTORMY16_REL_12 global
3e: fe 1f br 0x3e
3e: R_XSTORMY16_REL_12 global
40: 0a d0 bge 0x4c
42: 06 c0 00 00 bge Rx,#0x0,0x4c
46: 00 0d 02 00 bge r0,r0,0x4c
4a: 00 10 br 0x4c
4c: fe d0 bge 0x4c
4e: fa c0 00 00 bge Rx,#0x0,0x4c
52: 00 0d f6 0f bge r0,r0,0x4c
56: f4 1f br 0x4c
58: 00 79 00 00 mov\.w 0x0,#0x0
5a: R_XSTORMY16_16 global\+0x4
5c: 00 79 00 00 mov\.w 0x0,#0x0
5e: R_XSTORMY16_16 \.text\+0x4c
60: 00 79 00 00 mov\.w 0x0,#0x0
62: R_XSTORMY16_16 \.text\+0x50
64: 00 79 00 00 mov\.w 0x0,#0x0
66: R_XSTORMY16_PC16 global\+0xffffff9c
68: 00 79 00 00 mov\.w 0x0,#0x0
6a: R_XSTORMY16_PC16 global\+0xffffffb4
6c: 00 02 00 00 jmpf 0x0
6c: R_XSTORMY16_24 global

48
gas/testsuite/gas/xstormy16/reloc-2.s Normal file
View File

@ -0,0 +1,48 @@
.text
; check that forward references work for all operands.
inc r0,#fwd1
set1 0,#fwd1
bn 0,#fwd1,.
add r0,#fwd1
mov r0,(r0,fwd1)
mov fwd1,#0
mov rx,#fwd1
mov 0,#fwd1
jmpf fwd1
bge fwd1+.
bge Rx,#0,fwd1+.
bge r0,r0,fwd1+.
br fwd1+.
fwd1 = 1
; check that global references work for those operands that support them
.globl global
mov global,#0
mov rx,#global
mov 0,#global
; jmpf global
bge global
bge Rx,#0,global
bge r0,r0,global
br global
; check branch operations to local labels
bge .L1
bge Rx,#0,.L1
bge r0,r0,.L1
br .L1
.L1:
bge .L1
bge Rx,#0,.L1
bge r0,r0,.L1
br .L1
; check immediate operands thoroughly
mov 0,#global+4
mov 0,#.L1
mov 0,#.L1+4
mov 0,#global-.
mov 0,#global-.L1
jmpf global

4
include/ChangeLog
View File

@ -1,3 +1,7 @@
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
* dis-asm.h (print_insn_xstormy16): Declare.
2001-12-06 Richard Henderson <rth@redhat.com>
* demangle.h (no_demangling): New.

1
include/dis-asm.h
View File

@ -226,6 +226,7 @@ extern int print_insn_tic80 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_v850 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_vax PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_w65 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_xstormy16 PARAMS ((bfd_vma, disassemble_info*));
extern disassembler_ftype arc_get_disassembler PARAMS ((void *));
extern disassembler_ftype cris_get_disassembler PARAMS ((bfd *));

6
include/elf/ChangeLog
View File

@ -1,3 +1,9 @@
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
* common.h (EM_XSTORMY16): Define.
* xstormy16.h: New file.
2001-11-15 Alan Modra <amodra@bigpond.net.au>
* common.h (NT_ARCH): Define. Remove incorrect comment.

2
include/elf/common.h
View File

@ -233,6 +233,8 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
Written in the absense of an ABI. */
#define EM_OPENRISC_OLD 0x3426
#define EM_XSTORMY16 0xad45
/* See the above comment before you add a new EM_* value here. */
/* Values for e_version. */

53
include/elf/xstormy16.h Normal file
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@ -0,0 +1,53 @@
/* XSTORMY16 ELF support for BFD.
Copyright (C) 2001 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef _ELF_XSTORMY16_H
#define _ELF_XSTORMY16_H
#include "elf/reloc-macros.h"
/* Relocations. */
START_RELOC_NUMBERS (elf_xstormy16_reloc_type)
RELOC_NUMBER (R_XSTORMY16_NONE, 0)
RELOC_NUMBER (R_XSTORMY16_32, 1)
RELOC_NUMBER (R_XSTORMY16_16, 2)
RELOC_NUMBER (R_XSTORMY16_8, 3)
RELOC_NUMBER (R_XSTORMY16_PC32, 4)
RELOC_NUMBER (R_XSTORMY16_PC16, 5)
RELOC_NUMBER (R_XSTORMY16_PC8, 6)
RELOC_NUMBER (R_XSTORMY16_REL_12, 7)
RELOC_NUMBER (R_XSTORMY16_24, 8)
RELOC_NUMBER (R_XSTORMY16_FPTR16, 9)
RELOC_NUMBER (R_XSTORMY16_GNU_VTINHERIT, 128)
RELOC_NUMBER (R_XSTORMY16_GNU_VTENTRY, 129)
END_RELOC_NUMBERS (R_XSTORMY16_max)
/* Define the data & instruction memory discriminator. In a linked
executable, an symbol should be deemed to point to an instruction
if ((address & XSTORMY16_INSN_MASK) == XSTORMY16_INSN_VALUE), and similarly
for the data space. See also `ld/emulparams/elf32xstormy16.sh'. */
#define XSTORMY16_DATA_MASK 0xffc00000
#define XSTORMY16_DATA_VALUE 0x00000000
#define XSTORMY16_INSN_MASK 0xffc00000
#define XSTORMY16_INSN_VALUE 0x00400000
#endif /* _ELF_XSTORMY16_H */

9
ld/ChangeLog
View File

@ -1,3 +1,12 @@
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
* Makefile.am: Add support for xstormy16.
* configure.tgt: Add support for xstormy16.
* Makefile.in: Regenerate.
* emulparams/elf32xstormy16.sh: New file.
* scripttempl/xstormy16.sc: New file.
2001-12-07 Nick Clifton <nickc@cambridge.redhat.com>
* lexsup.c (ld_options): Insert 'PROGRAM' into the text string

5
ld/Makefile.am
View File

@ -160,6 +160,7 @@ ALL_EMULATIONS = \
eelf32ppc.o \
eelf32ppclinux.o \
eelf32ppcsim.o \
eelf32xstormy16.o \
eelf_i386.o \
eelf_i386_be.o \
eelf_i386_chaos.o \
@ -436,6 +437,10 @@ edelta68.c: $(srcdir)/emulparams/delta68.sh \
eebmon29k.c: $(srcdir)/emulparams/ebmon29k.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/ebmon29k.sc ${GEN_DEPENDS}
${GENSCRIPTS} ebmon29k "$(tdir_ebmon29k)"
eelf32xstormy16.c: $(srcdir)/emulparams/elf32xstormy16.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32xstormy16 "$(tdir_xstormy16)"
eelf32fr30.c: $(srcdir)/emulparams/elf32fr30.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32fr30 "$(tdir_fr30)"

5
ld/Makefile.in
View File

@ -269,6 +269,7 @@ ALL_EMULATIONS = \
eelf32ppc.o \
eelf32ppclinux.o \
eelf32ppcsim.o \
eelf32xstormy16.o \
eelf_i386.o \
eelf_i386_be.o \
eelf_i386_chaos.o \
@ -1157,6 +1158,10 @@ edelta68.c: $(srcdir)/emulparams/delta68.sh \
eebmon29k.c: $(srcdir)/emulparams/ebmon29k.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/ebmon29k.sc ${GEN_DEPENDS}
${GENSCRIPTS} ebmon29k "$(tdir_ebmon29k)"
eelf32xstormy16.c: $(srcdir)/emulparams/elf32xstormy16.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32xstormy16 "$(tdir_xstormy16)"
eelf32fr30.c: $(srcdir)/emulparams/elf32fr30.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32fr30 "$(tdir_fr30)"

1
ld/configure.tgt
View File

@ -388,6 +388,7 @@ v850-*-*) targ_emul=v850 ;;
v850e-*-*) targ_emul=v850 ;;
v850ea-*-*) targ_emul=v850 ;;
w65-*-*) targ_emul=w65 ;;
xstormy16-*-*) targ_emul=elf32xstormy16 ;;
fr30-*-*) targ_emul=elf32fr30 ;;
mcore-*-pe) targ_emul=mcorepe ;
targ_extra_ofiles="deffilep.o pe-dll.o" ;;

13
ld/emulparams/elf32xstormy16.sh Normal file
View File

@ -0,0 +1,13 @@
MACHINE=
SCRIPT_NAME=xstormy16
TEMPLATE_NAME=elf32
EXTRA_EM_FILE=needrelax
OUTPUT_FORMAT="elf32-xstormy16"
# See also `include/elf/xstormy16.h'
ARCH=xstormy16
ALIGNMENT=2
ENTRY=_start
EMBEDDED=yes
NOP=0

238
ld/scripttempl/xstormy16.sc Normal file
View File

@ -0,0 +1,238 @@
#
# Unusual variables checked by this code:
# NOP - two byte opcode for no-op (defaults to 0)
# INITIAL_READONLY_SECTIONS - at start of text segment
# OTHER_READONLY_SECTIONS - other than .text .init .rodata ...
# (e.g., .PARISC.milli)
# OTHER_TEXT_SECTIONS - these get put in .text when relocating
# OTHER_READWRITE_SECTIONS - other than .data .bss .ctors .sdata ...
# (e.g., .PARISC.global)
# OTHER_BSS_SECTIONS - other than .bss .sbss ...
# OTHER_SECTIONS - at the end
# EXECUTABLE_SYMBOLS - symbols that must be defined for an
# executable (e.g., _DYNAMIC_LINK)
# TEXT_START_SYMBOLS - symbols that appear at the start of the
# .text section.
# DATA_START_SYMBOLS - symbols that appear at the start of the
# .data section.
# OTHER_GOT_SYMBOLS - symbols defined just before .got.
# OTHER_GOT_SECTIONS - sections just after .got and .sdata.
# OTHER_BSS_SYMBOLS - symbols that appear at the start of the
# .bss section besides __bss_start.
# INPUT_FILES - INPUT command of files to always include
# INIT_START, INIT_END - statements just before and just after
# combination of .init sections.
# FINI_START, FINI_END - statements just before and just after
# combination of .fini sections.
#
# When adding sections, do note that the names of some sections are used
# when specifying the start address of the next.
#
# Many sections come in three flavours. There is the 'real' section,
# like ".data". Then there are the per-procedure or per-variable
# sections, generated by -ffunction-sections and -fdata-sections in GCC,
# and useful for --gc-sections, which for a variable "foo" might be
# ".data.foo". Then there are the linkonce sections, for which the linker
# eliminates duplicates, which are named like ".gnu.linkonce.d.foo".
# The exact correspondences are:
#
# Section Linkonce section
# .text .gnu.linkonce.t.foo
# .rodata .gnu.linkonce.r.foo
# .data .gnu.linkonce.d.foo
# .bss .gnu.linkonce.b.foo
# .sdata .gnu.linkonce.s.foo
# .sbss .gnu.linkonce.sb.foo
# .sdata2 .gnu.linkonce.s2.foo
# .sbss2 .gnu.linkonce.sb2.foo
#
# Each of these can also have corresponding .rel.* and .rela.* sections.
test -z "$ENTRY" && ENTRY=_start
test -z "${BIG_OUTPUT_FORMAT}" && BIG_OUTPUT_FORMAT=${OUTPUT_FORMAT}
test -z "${LITTLE_OUTPUT_FORMAT}" && LITTLE_OUTPUT_FORMAT=${OUTPUT_FORMAT}
if [ -z "$MACHINE" ]; then OUTPUT_ARCH=${ARCH}; else OUTPUT_ARCH=${ARCH}:${MACHINE}; fi
test -z "${ELFSIZE}" && ELFSIZE=32
test -z "${ALIGNMENT}" && ALIGNMENT="${ELFSIZE} / 8"
CTOR=".ctors ${CONSTRUCTING-0} :
{
${CONSTRUCTING+${CTOR_START}}
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend.o $OTHER_EXCLUDE_FILES) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
${CONSTRUCTING+${CTOR_END}}
} > ROM"
DTOR=" .dtors ${CONSTRUCTING-0} :
{
${CONSTRUCTING+${DTOR_START}}
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o $OTHER_EXCLUDE_FILES) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
${CONSTRUCTING+${DTOR_END}}
} > ROM"
cat <<EOF
OUTPUT_FORMAT("${OUTPUT_FORMAT}", "${BIG_OUTPUT_FORMAT}",
"${LITTLE_OUTPUT_FORMAT}")
OUTPUT_ARCH(${OUTPUT_ARCH})
ENTRY(${ENTRY})
${RELOCATING+${LIB_SEARCH_DIRS}}
${RELOCATING+${EXECUTABLE_SYMBOLS}}
${RELOCATING+${INPUT_FILES}}
${RELOCATING- /* For some reason, the Solaris linker makes bad executables
if gld -r is used and the intermediate file has sections starting
at non-zero addresses. Could be a Solaris ld bug, could be a GNU ld
bug. But for now assigning the zero vmas works. */}
/* There are two memory regions we care about, one from 0 through 0x7F00
that is RAM and one from 0x8000 up which is ROM. */
MEMORY
{
RAM (w) : ORIGIN = 0, LENGTH = 0x7F00
ROM (!w) : ORIGIN = 0x8000, LENGTH = 0xFF8000
}
SECTIONS
{
.data ${RELOCATING-0} :
{
${RELOCATING+${DATA_START_SYMBOLS}}
*(.data)
${RELOCATING+*(.data.*)}
${RELOCATING+*(.gnu.linkonce.d.*)}
${CONSTRUCTING+SORT(CONSTRUCTORS)}
} > RAM
${RELOCATING+${OTHER_READWRITE_SECTIONS}}
${RELOCATING+${OTHER_GOT_SYMBOLS}}
${RELOCATING+${OTHER_GOT_SECTIONS}}
${RELOCATING+_edata = .;}
${RELOCATING+PROVIDE (edata = .);}
${RELOCATING+__bss_start = .;}
${RELOCATING+${OTHER_BSS_SYMBOLS}}
.bss ${RELOCATING-0} :
{
*(.dynbss)
*(.bss)
${RELOCATING+*(.bss.*)}
${RELOCATING+*(.gnu.linkonce.b.*)}
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
${RELOCATING+. = ALIGN(${ALIGNMENT});}
} > RAM
${RELOCATING+${OTHER_BSS_SECTIONS}}
${RELOCATING+. = ALIGN(${ALIGNMENT});}
${RELOCATING+__stack = .;}
${RELOCATING+. = . + 4096;}
${RELOCATING+_end = .;}
${RELOCATING+${OTHER_BSS_END_SYMBOLS}}
${RELOCATING+PROVIDE (end = .);}
/* Read-only sections in ROM. */
.int_vec ${RELOCATING-0} : { *(.int_vec) } > ROM
.rodata ${RELOCATING-0} : { *(.rodata) ${RELOCATING+*(.rodata.*)} ${RELOCATING+*(.gnu.linkonce.r.*)} } > ROM
${RELOCATING+${CTOR}}
${RELOCATING+${DTOR}}
.eh_frame : { KEEP (*(.eh_frame)) } > ROM
.gcc_except_table : { *(.gcc_except_table) } > ROM
.plt : { *(.plt) } > ROM
.text ${RELOCATING-0} :
{
${RELOCATING+${TEXT_START_SYMBOLS}}
*(.text)
${RELOCATING+*(.text.*)}
*(.stub)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
${RELOCATING+*(.gnu.linkonce.t.*)}
${RELOCATING+${OTHER_TEXT_SECTIONS}}
} > ROM =${NOP-0}
.init ${RELOCATING-0} :
{
${RELOCATING+${INIT_START}}
KEEP (*(.init))
${RELOCATING+${INIT_END}}
} > ROM =${NOP-0}
.fini ${RELOCATING-0} :
{
${RELOCATING+${FINI_START}}
KEEP (*(.fini))
${RELOCATING+${FINI_END}}
} > ROM =${NOP-0}
${RELOCATING+PROVIDE (__etext = .);}
${RELOCATING+PROVIDE (_etext = .);}
${RELOCATING+PROVIDE (etext = .);}
${RELOCATING+${OTHER_READONLY_SECTIONS}}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
${RELOCATING+${OTHER_RELOCATING_SECTIONS}}
/* These must appear regardless of ${RELOCATING}. */
${OTHER_SECTIONS}
}
EOF

15
opcodes/ChangeLog
View File

@ -1,3 +1,18 @@
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
* Makefile.am: Add support for xstormy16.
* Makefile.in: Regenerate.
* configure.in: Add support for xstormy16.
* configure: Regenerate.
* disassemble.c: Add support for xstormy16.
* xstormy16-asm.c: New generated file.
* xstormy16-desc.c: New generated file.
* xstormy16-desc.h: New generated file.
* xstormy16-dis.c: New generated file.
* xstormy16-ibld.c: New generated file.
* xstormy16-opc.c: New generated file.
* xstormy16-opc.h: New generated file.
2001-12-06 Richard Henderson <rth@redhat.com>
* alpha-opc.c (alpha_opcodes): Add wh64en.

19
opcodes/Makefile.am
View File

@ -32,6 +32,7 @@ HFILES = \
ia64-asmtab.h \
ia64-opc.h \
w65-opc.h \
xstormy16-desc.h xstormy16-opc.h \
z8k-opc.h
# C source files that correspond to .o's.
@ -126,6 +127,11 @@ CFILES = \
v850-opc.c \
vax-dis.c \
w65-dis.c \
xstormy16-asm.c \
xstormy16-desc.c \
xstormy16-dis.c \
xstormy16-ibld.c \
xstormy16-opc.c \
z8k-dis.c \
z8kgen.c
@ -209,6 +215,11 @@ ALL_MACHINES = \
v850-opc.lo \
vax-dis.lo \
w65-dis.lo \
xstormy16-asm.lo \
xstormy16-desc.lo \
xstormy16-dis.lo \
xstormy16-ibld.lo \
xstormy16-opc.lo \
z8k-dis.lo
OFILES = @BFD_MACHINES@
@ -253,6 +264,7 @@ config.status: $(srcdir)/configure $(srcdir)/../bfd/configure.in
CLEANFILES = \
stamp-m32r stamp-fr30 stamp-openrisc \
stamp-xstormy16 \
libopcodes.a stamp-lib dep.sed DEP DEPA DEP1 DEP2
@ -272,10 +284,12 @@ if CGEN_MAINT
M32R_DEPS = stamp-m32r
FR30_DEPS = stamp-fr30
OPENRISC_DEPS = stamp-openrisc
XSTORMY16_DEPS = stamp-xstormy16
else
M32R_DEPS =
FR30_DEPS =
OPENRISC_DEPS =
XSTORMY16_DEPS =
endif
run-cgen:
@ -301,6 +315,11 @@ $(srcdir)/openrisc-desc.h $(srcdir)/openrisc-desc.c $(srcdir)/openrisc-opc.h $(s
stamp-openrisc: $(CGENDEPS) $(CPUDIR)/openrisc.cpu $(CPUDIR)/openrisc.opc
$(MAKE) run-cgen arch=openrisc prefix=openrisc options= extrafiles=
$(srcdir)/xstormy16-desc.h $(srcdir)/xstormy16-desc.c $(srcdir)/xstormy16-opc.h $(srcdir)/xstormy16-opc.c $(srcdir)/xstormy16-ibld.c $(srcdir)/xstormy16-asm.c $(srcdir)/xstormy16-dis.c: $(XSTORMY16_DEPS)
@true
stamp-xstormy16: $(CGENDEPS) $(CPUDIR)/xstormy16.cpu $(CPUDIR)/xstormy16.opc
$(MAKE) run-cgen arch=xstormy16 prefix=xstormy16 options= extrafiles=
ia64-gen: ia64-gen.o
$(LINK) ia64-gen.o $(LIBIBERTY)

25
opcodes/Makefile.in
View File

@ -1,6 +1,6 @@
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
@ -142,6 +142,7 @@ HFILES = \
ia64-asmtab.h \
ia64-opc.h \
w65-opc.h \
xstormy16-desc.h xstormy16-opc.h \
z8k-opc.h
@ -237,6 +238,11 @@ CFILES = \
v850-opc.c \
vax-dis.c \
w65-dis.c \
xstormy16-asm.c \
xstormy16-desc.c \
xstormy16-dis.c \
xstormy16-ibld.c \
xstormy16-opc.c \
z8k-dis.c \
z8kgen.c
@ -321,6 +327,11 @@ ALL_MACHINES = \
v850-opc.lo \
vax-dis.lo \
w65-dis.lo \
xstormy16-asm.lo \
xstormy16-desc.lo \
xstormy16-dis.lo \
xstormy16-ibld.lo \
xstormy16-opc.lo \
z8k-dis.lo
@ -344,6 +355,7 @@ POTFILES = $(HFILES) $(CFILES)
CLEANFILES = \
stamp-m32r stamp-fr30 stamp-openrisc \
stamp-xstormy16 \
libopcodes.a stamp-lib dep.sed DEP DEPA DEP1 DEP2
@ -365,6 +377,8 @@ CGENDEPS = ../cgen/stamp-cgen \
@CGEN_MAINT_FALSE@FR30_DEPS =
@CGEN_MAINT_TRUE@OPENRISC_DEPS = @CGEN_MAINT_TRUE@stamp-openrisc
@CGEN_MAINT_FALSE@OPENRISC_DEPS =
@CGEN_MAINT_TRUE@XSTORMY16_DEPS = @CGEN_MAINT_TRUE@stamp-xstormy16
@CGEN_MAINT_FALSE@XSTORMY16_DEPS =
ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs
CONFIG_HEADER = config.h
@ -558,7 +572,7 @@ maintainer-clean-recursive:
dot_seen=no; \
rev=''; list='$(SUBDIRS)'; for subdir in $$list; do \
rev="$$subdir $$rev"; \
test "$$subdir" != "." || dot_seen=yes; \
test "$$subdir" = "." && dot_seen=yes; \
done; \
test "$$dot_seen" = "no" && rev=". $$rev"; \
target=`echo $@ | sed s/-recursive//`; \
@ -812,6 +826,11 @@ $(srcdir)/openrisc-desc.h $(srcdir)/openrisc-desc.c $(srcdir)/openrisc-opc.h $(s
stamp-openrisc: $(CGENDEPS) $(CPUDIR)/openrisc.cpu $(CPUDIR)/openrisc.opc
$(MAKE) run-cgen arch=openrisc prefix=openrisc options= extrafiles=
$(srcdir)/xstormy16-desc.h $(srcdir)/xstormy16-desc.c $(srcdir)/xstormy16-opc.h $(srcdir)/xstormy16-opc.c $(srcdir)/xstormy16-ibld.c $(srcdir)/xstormy16-asm.c $(srcdir)/xstormy16-dis.c: $(XSTORMY16_DEPS)
@true
stamp-xstormy16: $(CGENDEPS) $(CPUDIR)/xstormy16.cpu $(CPUDIR)/xstormy16.opc
$(MAKE) run-cgen arch=xstormy16 prefix=xstormy16 options= extrafiles=
ia64-gen: ia64-gen.o
$(LINK) ia64-gen.o $(LIBIBERTY)

373
opcodes/configure vendored
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File diff suppressed because it is too large Load Diff

1
opcodes/configure.in
View File

@ -220,6 +220,7 @@ if test x${all_targets} = xfalse ; then
bfd_vax_arch) ta="$ta vax-dis.lo" ;;
bfd_w65_arch) ta="$ta w65-dis.lo" ;;
bfd_we32k_arch) ;;
bfd_xstormy16_arch) ta="$ta xstormy16-asm.lo xstormy16-desc.lo xstormy16-dis.lo xstormy16-ibld.lo xstormy16-opc.lo" using_cgen=yes ;;
bfd_z8k_arch) ta="$ta z8k-dis.lo" ;;
"") ;;

6
opcodes/disassemble.c
View File

@ -62,6 +62,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#define ARCH_v850
#define ARCH_vax
#define ARCH_w65
#define ARCH_xstormy16
#define ARCH_z8k
#endif
@ -303,6 +304,11 @@ disassembler (abfd)
disassemble = print_insn_w65;
break;
#endif
#ifdef ARCH_xstormy16
case bfd_arch_xstormy16:
disassemble = print_insn_xstormy16;
break;
#endif
#ifdef ARCH_z8k
case bfd_arch_z8k:
if (bfd_get_mach(abfd) == bfd_mach_z8001)

659
opcodes/xstormy16-asm.c Normal file
View File

@ -0,0 +1,659 @@
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
THIS FILE IS MACHINE GENERATED WITH CGEN.
- the resultant file is machine generated, cgen-asm.in isn't
Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
Keep that in mind. */
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
#include "bfd.h"
#include "symcat.h"
#include "xstormy16-desc.h"
#include "xstormy16-opc.h"
#include "opintl.h"
#include "xregex.h"
#include "libiberty.h"
#include "safe-ctype.h"
#undef min
#define min(a,b) ((a) < (b) ? (a) : (b))
#undef max
#define max(a,b) ((a) > (b) ? (a) : (b))
static const char * parse_insn_normal
PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *));
/* -- assembler routines inserted here. */
/* -- asm.c */
static const char * parse_mem8
PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
static const char * parse_small_immediate
PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
/* The machine-independent code doesn't know how to disambiguate
mov (foo),r3
and
mov (r2),r3
where 'foo' is a label. This helps it out. */
static const char *
parse_mem8 (cd, strp, opindex, valuep)
CGEN_CPU_DESC cd;
const char **strp;
int opindex;
unsigned long *valuep;
{
if (**strp == '(')
{
const char *s = *strp;
if (s[1] == '-' && s[2] == '-')
return _("Bad register in preincrement");
while (isalnum (*++s))
;
if (s[0] == '+' && s[1] == '+' && (s[2] == ')' || s[2] == ','))
return _("Bad register in postincrement");
if (s[0] == ',' || s[0] == ')')
return _("Bad register name");
}
else if (cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_gr_names,
valuep) == NULL)
return _("Label conflicts with register name");
else if (strncasecmp (*strp, "rx,", 3) == 0
|| strncasecmp (*strp, "rxl,", 3) == 0
|| strncasecmp (*strp, "rxh,", 3) == 0)
return _("Label conflicts with `Rx'");
else if (**strp == '#')
return _("Bad immediate expression");
return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
}
/* For the add and subtract instructions, there are two immediate forms,
one for small operands and one for large ones. We want to use
the small one when possible, but we do not want to generate relocs
of the small size. This is somewhat tricky. */
static const char *
parse_small_immediate (cd, strp, opindex, valuep)
CGEN_CPU_DESC cd;
const char **strp;
int opindex;
unsigned long *valuep;
{
bfd_vma value;
enum cgen_parse_operand_result result;
const char *errmsg;
errmsg = (* cd->parse_operand_fn)
(cd, CGEN_PARSE_OPERAND_INTEGER, strp, opindex, BFD_RELOC_NONE,
&result, &value);
if (errmsg)
return errmsg;
if (result != CGEN_PARSE_OPERAND_RESULT_NUMBER)
return _("Small operand was not an immediate number");
*valuep = value;
return NULL;
}
/* -- */
const char * xstormy16_cgen_parse_operand
PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *));
/* Main entry point for operand parsing.
This function is basically just a big switch statement. Earlier versions
used tables to look up the function to use, but
- if the table contains both assembler and disassembler functions then
the disassembler contains much of the assembler and vice-versa,
- there's a lot of inlining possibilities as things grow,
- using a switch statement avoids the function call overhead.
This function could be moved into `parse_insn_normal', but keeping it
separate makes clear the interface between `parse_insn_normal' and each of
the handlers. */
const char *
xstormy16_cgen_parse_operand (cd, opindex, strp, fields)
CGEN_CPU_DESC cd;
int opindex;
const char ** strp;
CGEN_FIELDS * fields;
{
const char * errmsg = NULL;
/* Used by scalar operands that still need to be parsed. */
long junk ATTRIBUTE_UNUSED;
switch (opindex)
{
case XSTORMY16_OPERAND_RB :
errmsg = cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_gr_names, & fields->f_Rb);
break;
case XSTORMY16_OPERAND_RBJ :
errmsg = cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_gr_Rbj_names, & fields->f_Rbj);
break;
case XSTORMY16_OPERAND_RD :
errmsg = cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_gr_names, & fields->f_Rd);
break;
case XSTORMY16_OPERAND_RDM :
errmsg = cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_gr_names, & fields->f_Rdm);
break;
case XSTORMY16_OPERAND_RM :
errmsg = cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_gr_names, & fields->f_Rm);
break;
case XSTORMY16_OPERAND_RS :
errmsg = cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_gr_names, & fields->f_Rs);
break;
case XSTORMY16_OPERAND_ABS24 :
errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_ABS24, &fields->f_abs24);
break;
case XSTORMY16_OPERAND_BCOND2 :
errmsg = cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_h_branchcond, & fields->f_op2);
break;
case XSTORMY16_OPERAND_BCOND5 :
errmsg = cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_h_branchcond, & fields->f_op5);
break;
case XSTORMY16_OPERAND_HMEM8 :
errmsg = parse_mem8 (cd, strp, XSTORMY16_OPERAND_HMEM8, &fields->f_hmem8);
break;
case XSTORMY16_OPERAND_IMM12 :
errmsg = cgen_parse_signed_integer (cd, strp, XSTORMY16_OPERAND_IMM12, &fields->f_imm12);
break;
case XSTORMY16_OPERAND_IMM16 :
errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_IMM16, &fields->f_imm16);
break;
case XSTORMY16_OPERAND_IMM2 :
errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_IMM2, &fields->f_imm2);
break;
case XSTORMY16_OPERAND_IMM3 :
errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_IMM3, &fields->f_imm3);
break;
case XSTORMY16_OPERAND_IMM3B :
errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_IMM3B, &fields->f_imm3b);
break;
case XSTORMY16_OPERAND_IMM4 :
errmsg = parse_small_immediate (cd, strp, XSTORMY16_OPERAND_IMM4, &fields->f_imm4);
break;
case XSTORMY16_OPERAND_IMM8 :
errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_IMM8, &fields->f_imm8);
break;
case XSTORMY16_OPERAND_IMM8SMALL :
errmsg = parse_small_immediate (cd, strp, XSTORMY16_OPERAND_IMM8SMALL, &fields->f_imm8);
break;
case XSTORMY16_OPERAND_LMEM8 :
errmsg = parse_mem8 (cd, strp, XSTORMY16_OPERAND_LMEM8, &fields->f_lmem8);
break;
case XSTORMY16_OPERAND_REL12 :
errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_REL12, &fields->f_rel12);
break;
case XSTORMY16_OPERAND_REL12A :
errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_REL12A, &fields->f_rel12a);
break;
case XSTORMY16_OPERAND_REL8_2 :
errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_REL8_2, &fields->f_rel8_2);
break;
case XSTORMY16_OPERAND_REL8_4 :
errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_REL8_4, &fields->f_rel8_4);
break;
case XSTORMY16_OPERAND_WS2 :
errmsg = cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_h_wordsize, & fields->f_op2m);
break;
default :
/* xgettext:c-format */
fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
abort ();
}
return errmsg;
}
cgen_parse_fn * const xstormy16_cgen_parse_handlers[] =
{
parse_insn_normal,
};
void
xstormy16_cgen_init_asm (cd)
CGEN_CPU_DESC cd;
{
xstormy16_cgen_init_opcode_table (cd);
xstormy16_cgen_init_ibld_table (cd);
cd->parse_handlers = & xstormy16_cgen_parse_handlers[0];
cd->parse_operand = xstormy16_cgen_parse_operand;
}
/* Regex construction routine.
This translates an opcode syntax string into a regex string,
by replacing any non-character syntax element (such as an
opcode) with the pattern '.*'
It then compiles the regex and stores it in the opcode, for
later use by xstormy16_cgen_assemble_insn
Returns NULL for success, an error message for failure. */
char *
xstormy16_cgen_build_insn_regex (insn)
CGEN_INSN *insn;
{
CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
const char *mnem = CGEN_INSN_MNEMONIC (insn);
char rxbuf[CGEN_MAX_RX_ELEMENTS];
char *rx = rxbuf;
const CGEN_SYNTAX_CHAR_TYPE *syn;
int reg_err;
syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
/* Mnemonics come first in the syntax string. */
if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
return _("missing mnemonic in syntax string");
++syn;
/* Generate a case sensitive regular expression that emulates case
insensitive matching in the "C" locale. We cannot generate a case
insensitive regular expression because in Turkish locales, 'i' and 'I'
are not equal modulo case conversion. */
/* Copy the literal mnemonic out of the insn. */
for (; *mnem; mnem++)
{
char c = *mnem;
if (ISALPHA (c))
{
*rx++ = '[';
*rx++ = TOLOWER (c);
*rx++ = TOUPPER (c);
*rx++ = ']';
}
else
*rx++ = c;
}
/* Copy any remaining literals from the syntax string into the rx. */
for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
{
if (CGEN_SYNTAX_CHAR_P (* syn))
{
char c = CGEN_SYNTAX_CHAR (* syn);
switch (c)
{
/* Escape any regex metacharacters in the syntax. */
case '.': case '[': case '\\':
case '*': case '^': case '$':
#ifdef CGEN_ESCAPE_EXTENDED_REGEX
case '?': case '{': case '}':
case '(': case ')': case '*':
case '|': case '+': case ']':
#endif
*rx++ = '\\';
*rx++ = c;
break;
default:
if (ISALPHA (c))
{
*rx++ = '[';
*rx++ = TOLOWER (c);
*rx++ = TOUPPER (c);
*rx++ = ']';
}
else
*rx++ = c;
break;
}
}
else
{
/* Replace non-syntax fields with globs. */
*rx++ = '.';
*rx++ = '*';
}
}
/* Trailing whitespace ok. */
* rx++ = '[';
* rx++ = ' ';
* rx++ = '\t';
* rx++ = ']';
* rx++ = '*';
/* But anchor it after that. */
* rx++ = '$';
* rx = '\0';
CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
if (reg_err == 0)
return NULL;
else
{
static char msg[80];
regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
regfree ((regex_t *) CGEN_INSN_RX (insn));
free (CGEN_INSN_RX (insn));
(CGEN_INSN_RX (insn)) = NULL;
return msg;
}
}
/* Default insn parser.
The syntax string is scanned and operands are parsed and stored in FIELDS.
Relocs are queued as we go via other callbacks.
??? Note that this is currently an all-or-nothing parser. If we fail to
parse the instruction, we return 0 and the caller will start over from
the beginning. Backtracking will be necessary in parsing subexpressions,
but that can be handled there. Not handling backtracking here may get
expensive in the case of the m68k. Deal with later.
Returns NULL for success, an error message for failure. */
static const char *
parse_insn_normal (cd, insn, strp, fields)
CGEN_CPU_DESC cd;
const CGEN_INSN *insn;
const char **strp;
CGEN_FIELDS *fields;
{
/* ??? Runtime added insns not handled yet. */
const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
const char *str = *strp;
const char *errmsg;
const char *p;
const CGEN_SYNTAX_CHAR_TYPE * syn;
#ifdef CGEN_MNEMONIC_OPERANDS
/* FIXME: wip */
int past_opcode_p;
#endif
/* For now we assume the mnemonic is first (there are no leading operands).
We can parse it without needing to set up operand parsing.
GAS's input scrubber will ensure mnemonics are lowercase, but we may
not be called from GAS. */
p = CGEN_INSN_MNEMONIC (insn);
while (*p && TOLOWER (*p) == TOLOWER (*str))
++p, ++str;
if (* p)
return _("unrecognized instruction");
#ifndef CGEN_MNEMONIC_OPERANDS
if (* str && ! ISSPACE (* str))
return _("unrecognized instruction");
#endif
CGEN_INIT_PARSE (cd);
cgen_init_parse_operand (cd);
#ifdef CGEN_MNEMONIC_OPERANDS
past_opcode_p = 0;
#endif
/* We don't check for (*str != '\0') here because we want to parse
any trailing fake arguments in the syntax string. */
syn = CGEN_SYNTAX_STRING (syntax);
/* Mnemonics come first for now, ensure valid string. */
if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
abort ();
++syn;
while (* syn != 0)
{
/* Non operand chars must match exactly. */
if (CGEN_SYNTAX_CHAR_P (* syn))
{
/* FIXME: While we allow for non-GAS callers above, we assume the
first char after the mnemonic part is a space. */
/* FIXME: We also take inappropriate advantage of the fact that
GAS's input scrubber will remove extraneous blanks. */
if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
{
#ifdef CGEN_MNEMONIC_OPERANDS
if (CGEN_SYNTAX_CHAR(* syn) == ' ')
past_opcode_p = 1;
#endif
++ syn;
++ str;
}
else if (*str)
{
/* Syntax char didn't match. Can't be this insn. */
static char msg [80];
/* xgettext:c-format */
sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
CGEN_SYNTAX_CHAR(*syn), *str);
return msg;
}
else
{
/* Ran out of input. */
static char msg [80];
/* xgettext:c-format */
sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
CGEN_SYNTAX_CHAR(*syn));
return msg;
}
continue;
}
/* We have an operand of some sort. */
errmsg = xstormy16_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
&str, fields);
if (errmsg)
return errmsg;
/* Done with this operand, continue with next one. */
++ syn;
}
/* If we're at the end of the syntax string, we're done. */
if (* syn == 0)
{
/* FIXME: For the moment we assume a valid `str' can only contain
blanks now. IE: We needn't try again with a longer version of
the insn and it is assumed that longer versions of insns appear
before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
while (ISSPACE (* str))
++ str;
if (* str != '\0')
return _("junk at end of line"); /* FIXME: would like to include `str' */
return NULL;
}
/* We couldn't parse it. */
return _("unrecognized instruction");
}
/* Main entry point.
This routine is called for each instruction to be assembled.
STR points to the insn to be assembled.
We assume all necessary tables have been initialized.
The assembled instruction, less any fixups, is stored in BUF.
Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
or NULL if an error occured (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
this function recurses.
??? It's possible to make this cpu-independent.
One would have to deal with a few minor things.
At this point in time doing so would be more of a curiosity than useful
[for example this file isn't _that_ big], but keeping the possibility in
mind helps keep the design clean. */
const CGEN_INSN *
xstormy16_cgen_assemble_insn (cd, str, fields, buf, errmsg)
CGEN_CPU_DESC cd;
const char *str;
CGEN_FIELDS *fields;
CGEN_INSN_BYTES_PTR buf;
char **errmsg;
{
const char *start;
CGEN_INSN_LIST *ilist;
const char *parse_errmsg = NULL;
const char *insert_errmsg = NULL;
int recognized_mnemonic = 0;
/* Skip leading white space. */
while (ISSPACE (* str))
++ str;
/* The instructions are stored in hashed lists.
Get the first in the list. */
ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
/* Keep looking until we find a match. */
start = str;
for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
{
const CGEN_INSN *insn = ilist->insn;
recognized_mnemonic = 1;
#ifdef CGEN_VALIDATE_INSN_SUPPORTED
/* Not usually needed as unsupported opcodes
shouldn't be in the hash lists. */
/* Is this insn supported by the selected cpu? */
if (! xstormy16_cgen_insn_supported (cd, insn))
continue;
#endif
/* If the RELAX attribute is set, this is an insn that shouldn't be
chosen immediately. Instead, it is used during assembler/linker
relaxation if possible. */
if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
continue;
str = start;
/* Skip this insn if str doesn't look right lexically. */
if (CGEN_INSN_RX (insn) != NULL &&
regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
continue;
/* Allow parse/insert handlers to obtain length of insn. */
CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
if (parse_errmsg != NULL)
continue;
/* ??? 0 is passed for `pc'. */
insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
(bfd_vma) 0);
if (insert_errmsg != NULL)
continue;
/* It is up to the caller to actually output the insn and any
queued relocs. */
return insn;
}
{
static char errbuf[150];
#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
const char *tmp_errmsg;
/* If requesting verbose error messages, use insert_errmsg.
Failing that, use parse_errmsg. */
tmp_errmsg = (insert_errmsg ? insert_errmsg :
parse_errmsg ? parse_errmsg :
recognized_mnemonic ?
_("unrecognized form of instruction") :
_("unrecognized instruction"));
if (strlen (start) > 50)
/* xgettext:c-format */
sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
else
/* xgettext:c-format */
sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
#else
if (strlen (start) > 50)
/* xgettext:c-format */
sprintf (errbuf, _("bad instruction `%.50s...'"), start);
else
/* xgettext:c-format */
sprintf (errbuf, _("bad instruction `%.50s'"), start);
#endif
*errmsg = errbuf;
return NULL;
}
}
#if 0 /* This calls back to GAS which we can't do without care. */
/* Record each member of OPVALS in the assembler's symbol table.
This lets GAS parse registers for us.
??? Interesting idea but not currently used. */
/* Record each member of OPVALS in the assembler's symbol table.
FIXME: Not currently used. */
void
xstormy16_cgen_asm_hash_keywords (cd, opvals)
CGEN_CPU_DESC cd;
CGEN_KEYWORD *opvals;
{
CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
const CGEN_KEYWORD_ENTRY * ke;
while ((ke = cgen_keyword_search_next (& search)) != NULL)
{
#if 0 /* Unnecessary, should be done in the search routine. */
if (! xstormy16_cgen_opval_supported (ke))
continue;
#endif
cgen_asm_record_register (cd, ke->name, ke->value);
}
}
#endif /* 0 */

1399
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/* CPU data header for xstormy16.
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
This file is part of the GNU Binutils and/or GDB, the GNU debugger.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#ifndef XSTORMY16_CPU_H
#define XSTORMY16_CPU_H
#define CGEN_ARCH xstormy16
/* Given symbol S, return xstormy16_cgen_<S>. */
#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
#define CGEN_SYM(s) xstormy16##_cgen_##s
#else
#define CGEN_SYM(s) xstormy16/**/_cgen_/**/s
#endif
/* Selected cpu families. */
#define HAVE_CPU_XSTORMY16
#define CGEN_INSN_LSB0_P 0
/* Minimum size of any insn (in bytes). */
#define CGEN_MIN_INSN_SIZE 2
/* Maximum size of any insn (in bytes). */
#define CGEN_MAX_INSN_SIZE 4
#define CGEN_INT_INSN_P 1
/* Maximum number of syntax elements in an instruction. */
#define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 19
/* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.
e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands
we can't hash on everything up to the space. */
#define CGEN_MNEMONIC_OPERANDS
/* Maximum number of fields in an instruction. */
#define CGEN_ACTUAL_MAX_IFMT_OPERANDS 9
/* Enums. */
/* Enum declaration for . */
typedef enum gr_names {
H_GR_R0 = 0, H_GR_R1 = 1, H_GR_R2 = 2, H_GR_R3 = 3
, H_GR_R4 = 4, H_GR_R5 = 5, H_GR_R6 = 6, H_GR_R7 = 7
, H_GR_R8 = 8, H_GR_R9 = 9, H_GR_R10 = 10, H_GR_R11 = 11
, H_GR_R12 = 12, H_GR_R13 = 13, H_GR_R14 = 14, H_GR_R15 = 15
, H_GR_PSW = 14, H_GR_SP = 15
} GR_NAMES;
/* Enum declaration for . */
typedef enum gr_rbj_names {
H_RBJ_R8, H_RBJ_R9
} GR_RBJ_NAMES;
/* Enum declaration for insn op enums. */
typedef enum insn_op1 {
OP1_0, OP1_1, OP1_2, OP1_3
, OP1_4, OP1_5, OP1_6, OP1_7
, OP1_8, OP1_9, OP1_A, OP1_B
, OP1_C, OP1_D, OP1_E, OP1_F
} INSN_OP1;
/* Enum declaration for insn op enums. */
typedef enum insn_op2 {
OP2_0, OP2_1, OP2_2, OP2_3
, OP2_4, OP2_5, OP2_6, OP2_7
, OP2_8, OP2_9, OP2_A, OP2_B
, OP2_C, OP2_D, OP2_E, OP2_F
} INSN_OP2;
/* Enum declaration for insn op enums. */
typedef enum insn_op2a {
OP2A_0, OP2A_2, OP2A_4, OP2A_6
, OP2A_8, OP2A_A, OP2A_C, OP2A_E
} INSN_OP2A;
/* Enum declaration for insn op enums. */
typedef enum insn_op2m {
OP2M_0, OP2M_1
} INSN_OP2M;
/* Enum declaration for insn op enums. */
typedef enum insn_op3 {
OP3_0, OP3_1, OP3_2, OP3_3
, OP3_4, OP3_5, OP3_6, OP3_7
, OP3_8, OP3_9, OP3_A, OP3_B
, OP3_C, OP3_D, OP3_E, OP3_F
} INSN_OP3;
/* Enum declaration for insn op enums. */
typedef enum insn_op3a {
OP3A_0, OP3A_1, OP3A_2, OP3A_3
} INSN_OP3A;
/* Enum declaration for insn op enums. */
typedef enum insn_op3b {
OP3B_0, OP3B_2, OP3B_4, OP3B_6
, OP3B_8, OP3B_A, OP3B_C, OP3B_E
} INSN_OP3B;
/* Enum declaration for insn op enums. */
typedef enum insn_op4 {
OP4_0, OP4_1, OP4_2, OP4_3
, OP4_4, OP4_5, OP4_6, OP4_7
, OP4_8, OP4_9, OP4_A, OP4_B
, OP4_C, OP4_D, OP4_E, OP4_F
} INSN_OP4;
/* Enum declaration for insn op enums. */
typedef enum insn_op4m {
OP4M_0, OP4M_1
} INSN_OP4M;
/* Enum declaration for insn op enums. */
typedef enum insn_op4b {
OP4B_0, OP4B_1
} INSN_OP4B;
/* Enum declaration for insn op enums. */
typedef enum insn_op5 {
OP5_0, OP5_1, OP5_2, OP5_3
, OP5_4, OP5_5, OP5_6, OP5_7
, OP5_8, OP5_9, OP5_A, OP5_B
, OP5_C, OP5_D, OP5_E, OP5_F
} INSN_OP5;
/* Enum declaration for insn op enums. */
typedef enum insn_op5a {
OP5A_0, OP5A_1
} INSN_OP5A;
/* Attributes. */
/* Enum declaration for machine type selection. */
typedef enum mach_attr {
MACH_BASE, MACH_XSTORMY16, MACH_MAX
} MACH_ATTR;
/* Enum declaration for instruction set selection. */
typedef enum isa_attr {
ISA_XSTORMY16, ISA_MAX
} ISA_ATTR;
/* Number of architecture variants. */
#define MAX_ISAS 1
#define MAX_MACHS ((int) MACH_MAX)
/* Ifield support. */
extern const struct cgen_ifld xstormy16_cgen_ifld_table[];
/* Ifield attribute indices. */
/* Enum declaration for cgen_ifld attrs. */
typedef enum cgen_ifld_attr {
CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED
, CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31
, CGEN_IFLD_MACH, CGEN_IFLD_END_NBOOLS
} CGEN_IFLD_ATTR;
/* Number of non-boolean elements in cgen_ifld_attr. */
#define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1)
/* Enum declaration for xstormy16 ifield types. */
typedef enum ifield_type {
XSTORMY16_F_NIL, XSTORMY16_F_ANYOF, XSTORMY16_F_RD, XSTORMY16_F_RDM
, XSTORMY16_F_RM, XSTORMY16_F_RS, XSTORMY16_F_RB, XSTORMY16_F_RBJ
, XSTORMY16_F_OP1, XSTORMY16_F_OP2, XSTORMY16_F_OP2A, XSTORMY16_F_OP2M
, XSTORMY16_F_OP3, XSTORMY16_F_OP3A, XSTORMY16_F_OP3B, XSTORMY16_F_OP4
, XSTORMY16_F_OP4M, XSTORMY16_F_OP4B, XSTORMY16_F_OP5, XSTORMY16_F_OP5A
, XSTORMY16_F_OP, XSTORMY16_F_IMM2, XSTORMY16_F_IMM3, XSTORMY16_F_IMM3B
, XSTORMY16_F_IMM4, XSTORMY16_F_IMM8, XSTORMY16_F_IMM12, XSTORMY16_F_IMM16
, XSTORMY16_F_LMEM8, XSTORMY16_F_HMEM8, XSTORMY16_F_REL8_2, XSTORMY16_F_REL8_4
, XSTORMY16_F_REL12, XSTORMY16_F_REL12A, XSTORMY16_F_ABS24_1, XSTORMY16_F_ABS24_2
, XSTORMY16_F_ABS24, XSTORMY16_F_MAX
} IFIELD_TYPE;
#define MAX_IFLD ((int) XSTORMY16_F_MAX)
/* Hardware attribute indices. */
/* Enum declaration for cgen_hw attrs. */
typedef enum cgen_hw_attr {
CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE
, CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_END_NBOOLS
} CGEN_HW_ATTR;
/* Number of non-boolean elements in cgen_hw_attr. */
#define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1)
/* Enum declaration for xstormy16 hardware types. */
typedef enum cgen_hw_type {
HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR
, HW_H_IADDR, HW_H_PC, HW_H_GR, HW_H_RBJ
, HW_H_RPSW, HW_H_Z8, HW_H_Z16, HW_H_CY
, HW_H_HC, HW_H_OV, HW_H_PT, HW_H_S
, HW_H_BRANCHCOND, HW_H_WORDSIZE, HW_MAX
} CGEN_HW_TYPE;
#define MAX_HW ((int) HW_MAX)
/* Operand attribute indices. */
/* Enum declaration for cgen_operand attrs. */
typedef enum cgen_operand_attr {
CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT
, CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY
, CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_END_NBOOLS
} CGEN_OPERAND_ATTR;
/* Number of non-boolean elements in cgen_operand_attr. */
#define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1)
/* Enum declaration for xstormy16 operand types. */
typedef enum cgen_operand_type {
XSTORMY16_OPERAND_PC, XSTORMY16_OPERAND_PSW_Z8, XSTORMY16_OPERAND_PSW_Z16, XSTORMY16_OPERAND_PSW_CY
, XSTORMY16_OPERAND_PSW_HC, XSTORMY16_OPERAND_PSW_OV, XSTORMY16_OPERAND_PSW_PT, XSTORMY16_OPERAND_PSW_S
, XSTORMY16_OPERAND_RD, XSTORMY16_OPERAND_RDM, XSTORMY16_OPERAND_RM, XSTORMY16_OPERAND_RS
, XSTORMY16_OPERAND_RB, XSTORMY16_OPERAND_RBJ, XSTORMY16_OPERAND_BCOND2, XSTORMY16_OPERAND_WS2
, XSTORMY16_OPERAND_BCOND5, XSTORMY16_OPERAND_IMM2, XSTORMY16_OPERAND_IMM3, XSTORMY16_OPERAND_IMM3B
, XSTORMY16_OPERAND_IMM4, XSTORMY16_OPERAND_IMM8, XSTORMY16_OPERAND_IMM8SMALL, XSTORMY16_OPERAND_IMM12
, XSTORMY16_OPERAND_IMM16, XSTORMY16_OPERAND_LMEM8, XSTORMY16_OPERAND_HMEM8, XSTORMY16_OPERAND_REL8_2
, XSTORMY16_OPERAND_REL8_4, XSTORMY16_OPERAND_REL12, XSTORMY16_OPERAND_REL12A, XSTORMY16_OPERAND_ABS24
, XSTORMY16_OPERAND_PSW, XSTORMY16_OPERAND_RPSW, XSTORMY16_OPERAND_SP, XSTORMY16_OPERAND_R0
, XSTORMY16_OPERAND_R1, XSTORMY16_OPERAND_R2, XSTORMY16_OPERAND_R8, XSTORMY16_OPERAND_MAX
} CGEN_OPERAND_TYPE;
/* Number of operands types. */
#define MAX_OPERANDS 39
/* Maximum number of operands referenced by any insn. */
#define MAX_OPERAND_INSTANCES 8
/* Insn attribute indices. */
/* Enum declaration for cgen_insn attrs. */
typedef enum cgen_insn_attr {
CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
, CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX
, CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31
, CGEN_INSN_MACH, CGEN_INSN_END_NBOOLS
} CGEN_INSN_ATTR;
/* Number of non-boolean elements in cgen_insn_attr. */
#define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1)
/* cgen.h uses things we just defined. */
#include "opcode/cgen.h"
/* Attributes. */
extern const CGEN_ATTR_TABLE xstormy16_cgen_hardware_attr_table[];
extern const CGEN_ATTR_TABLE xstormy16_cgen_ifield_attr_table[];
extern const CGEN_ATTR_TABLE xstormy16_cgen_operand_attr_table[];
extern const CGEN_ATTR_TABLE xstormy16_cgen_insn_attr_table[];
/* Hardware decls. */
extern CGEN_KEYWORD xstormy16_cgen_opval_gr_names;
extern CGEN_KEYWORD xstormy16_cgen_opval_gr_Rbj_names;
extern CGEN_KEYWORD xstormy16_cgen_opval_h_branchcond;
extern CGEN_KEYWORD xstormy16_cgen_opval_h_wordsize;
#endif /* XSTORMY16_CPU_H */

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/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
THIS FILE IS MACHINE GENERATED WITH CGEN.
- the resultant file is machine generated, cgen-dis.in isn't
Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
Keep that in mind. */
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
#include "dis-asm.h"
#include "bfd.h"
#include "symcat.h"
#include "xstormy16-desc.h"
#include "xstormy16-opc.h"
#include "opintl.h"
/* Default text to print if an instruction isn't recognized. */
#define UNKNOWN_INSN_MSG _("*unknown*")
static void print_normal
PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int));
static void print_address
PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int));
static void print_keyword
PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int));
static void print_insn_normal
PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *,
bfd_vma, int));
static int print_insn
PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned));
static int default_print_insn
PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));
static int read_insn
PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int,
CGEN_EXTRACT_INFO *, unsigned long *));
/* -- disassembler routines inserted here */
void xstormy16_cgen_print_operand
PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *,
void const *, bfd_vma, int));
/* Main entry point for printing operands.
XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
of dis-asm.h on cgen.h.
This function is basically just a big switch statement. Earlier versions
used tables to look up the function to use, but
- if the table contains both assembler and disassembler functions then
the disassembler contains much of the assembler and vice-versa,
- there's a lot of inlining possibilities as things grow,
- using a switch statement avoids the function call overhead.
This function could be moved into `print_insn_normal', but keeping it
separate makes clear the interface between `print_insn_normal' and each of
the handlers. */
void
xstormy16_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)
CGEN_CPU_DESC cd;
int opindex;
PTR xinfo;
CGEN_FIELDS *fields;
void const *attrs ATTRIBUTE_UNUSED;
bfd_vma pc;
int length;
{
disassemble_info *info = (disassemble_info *) xinfo;
switch (opindex)
{
case XSTORMY16_OPERAND_RB :
print_keyword (cd, info, & xstormy16_cgen_opval_gr_names, fields->f_Rb, 0);
break;
case XSTORMY16_OPERAND_RBJ :
print_keyword (cd, info, & xstormy16_cgen_opval_gr_Rbj_names, fields->f_Rbj, 0);
break;
case XSTORMY16_OPERAND_RD :
print_keyword (cd, info, & xstormy16_cgen_opval_gr_names, fields->f_Rd, 0);
break;
case XSTORMY16_OPERAND_RDM :
print_keyword (cd, info, & xstormy16_cgen_opval_gr_names, fields->f_Rdm, 0);
break;
case XSTORMY16_OPERAND_RM :
print_keyword (cd, info, & xstormy16_cgen_opval_gr_names, fields->f_Rm, 0);
break;
case XSTORMY16_OPERAND_RS :
print_keyword (cd, info, & xstormy16_cgen_opval_gr_names, fields->f_Rs, 0);
break;
case XSTORMY16_OPERAND_ABS24 :
print_normal (cd, info, fields->f_abs24, 0|(1<<CGEN_OPERAND_ABS_ADDR)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case XSTORMY16_OPERAND_BCOND2 :
print_keyword (cd, info, & xstormy16_cgen_opval_h_branchcond, fields->f_op2, 0);
break;
case XSTORMY16_OPERAND_BCOND5 :
print_keyword (cd, info, & xstormy16_cgen_opval_h_branchcond, fields->f_op5, 0);
break;
case XSTORMY16_OPERAND_HMEM8 :
print_normal (cd, info, fields->f_hmem8, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
break;
case XSTORMY16_OPERAND_IMM12 :
print_normal (cd, info, fields->f_imm12, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case XSTORMY16_OPERAND_IMM16 :
print_normal (cd, info, fields->f_imm16, 0|(1<<CGEN_OPERAND_SIGN_OPT), pc, length);
break;
case XSTORMY16_OPERAND_IMM2 :
print_normal (cd, info, fields->f_imm2, 0, pc, length);
break;
case XSTORMY16_OPERAND_IMM3 :
print_normal (cd, info, fields->f_imm3, 0, pc, length);
break;
case XSTORMY16_OPERAND_IMM3B :
print_normal (cd, info, fields->f_imm3b, 0, pc, length);
break;
case XSTORMY16_OPERAND_IMM4 :
print_normal (cd, info, fields->f_imm4, 0, pc, length);
break;
case XSTORMY16_OPERAND_IMM8 :
print_normal (cd, info, fields->f_imm8, 0, pc, length);
break;
case XSTORMY16_OPERAND_IMM8SMALL :
print_normal (cd, info, fields->f_imm8, 0, pc, length);
break;
case XSTORMY16_OPERAND_LMEM8 :
print_normal (cd, info, fields->f_lmem8, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
break;
case XSTORMY16_OPERAND_REL12 :
print_normal (cd, info, fields->f_rel12, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
break;
case XSTORMY16_OPERAND_REL12A :
print_normal (cd, info, fields->f_rel12a, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
break;
case XSTORMY16_OPERAND_REL8_2 :
print_normal (cd, info, fields->f_rel8_2, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
break;
case XSTORMY16_OPERAND_REL8_4 :
print_normal (cd, info, fields->f_rel8_4, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
break;
case XSTORMY16_OPERAND_WS2 :
print_keyword (cd, info, & xstormy16_cgen_opval_h_wordsize, fields->f_op2m, 0);
break;
default :
/* xgettext:c-format */
fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
opindex);
abort ();
}
}
cgen_print_fn * const xstormy16_cgen_print_handlers[] =
{
print_insn_normal,
};
void
xstormy16_cgen_init_dis (cd)
CGEN_CPU_DESC cd;
{
xstormy16_cgen_init_opcode_table (cd);
xstormy16_cgen_init_ibld_table (cd);
cd->print_handlers = & xstormy16_cgen_print_handlers[0];
cd->print_operand = xstormy16_cgen_print_operand;
}
/* Default print handler. */
static void
print_normal (cd, dis_info, value, attrs, pc, length)
CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
PTR dis_info;
long value;
unsigned int attrs;
bfd_vma pc ATTRIBUTE_UNUSED;
int length ATTRIBUTE_UNUSED;
{
disassemble_info *info = (disassemble_info *) dis_info;
#ifdef CGEN_PRINT_NORMAL
CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
#endif
/* Print the operand as directed by the attributes. */
if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
; /* nothing to do */
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
(*info->fprintf_func) (info->stream, "%ld", value);
else
(*info->fprintf_func) (info->stream, "0x%lx", value);
}
/* Default address handler. */
static void
print_address (cd, dis_info, value, attrs, pc, length)
CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
PTR dis_info;
bfd_vma value;
unsigned int attrs;
bfd_vma pc ATTRIBUTE_UNUSED;
int length ATTRIBUTE_UNUSED;
{
disassemble_info *info = (disassemble_info *) dis_info;
#ifdef CGEN_PRINT_ADDRESS
CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
#endif
/* Print the operand as directed by the attributes. */
if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
; /* nothing to do */
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
(*info->print_address_func) (value, info);
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
(*info->print_address_func) (value, info);
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
(*info->fprintf_func) (info->stream, "%ld", (long) value);
else
(*info->fprintf_func) (info->stream, "0x%lx", (long) value);
}
/* Keyword print handler. */
static void
print_keyword (cd, dis_info, keyword_table, value, attrs)
CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
PTR dis_info;
CGEN_KEYWORD *keyword_table;
long value;
unsigned int attrs ATTRIBUTE_UNUSED;
{
disassemble_info *info = (disassemble_info *) dis_info;
const CGEN_KEYWORD_ENTRY *ke;
ke = cgen_keyword_lookup_value (keyword_table, value);
if (ke != NULL)
(*info->fprintf_func) (info->stream, "%s", ke->name);
else
(*info->fprintf_func) (info->stream, "???");
}
/* Default insn printer.
DIS_INFO is defined as `PTR' so the disassembler needn't know anything
about disassemble_info. */
static void
print_insn_normal (cd, dis_info, insn, fields, pc, length)
CGEN_CPU_DESC cd;
PTR dis_info;
const CGEN_INSN *insn;
CGEN_FIELDS *fields;
bfd_vma pc;
int length;
{
const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
disassemble_info *info = (disassemble_info *) dis_info;
const CGEN_SYNTAX_CHAR_TYPE *syn;
CGEN_INIT_PRINT (cd);
for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
{
if (CGEN_SYNTAX_MNEMONIC_P (*syn))
{
(*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
continue;
}
if (CGEN_SYNTAX_CHAR_P (*syn))
{
(*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
continue;
}
/* We have an operand. */
xstormy16_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
fields, CGEN_INSN_ATTRS (insn), pc, length);
}
}
/* Subroutine of print_insn. Reads an insn into the given buffers and updates
the extract info.
Returns 0 if all is well, non-zero otherwise. */
static int
read_insn (cd, pc, info, buf, buflen, ex_info, insn_value)
CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
bfd_vma pc;
disassemble_info *info;
char *buf;
int buflen;
CGEN_EXTRACT_INFO *ex_info;
unsigned long *insn_value;
{
int status = (*info->read_memory_func) (pc, buf, buflen, info);
if (status != 0)
{
(*info->memory_error_func) (status, pc, info);
return -1;
}
ex_info->dis_info = info;
ex_info->valid = (1 << buflen) - 1;
ex_info->insn_bytes = buf;
*insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
return 0;
}
/* Utility to print an insn.
BUF is the base part of the insn, target byte order, BUFLEN bytes long.
The result is the size of the insn in bytes or zero for an unknown insn
or -1 if an error occurs fetching data (memory_error_func will have
been called). */
static int
print_insn (cd, pc, info, buf, buflen)
CGEN_CPU_DESC cd;
bfd_vma pc;
disassemble_info *info;
char *buf;
unsigned int buflen;
{
CGEN_INSN_INT insn_value;
const CGEN_INSN_LIST *insn_list;
CGEN_EXTRACT_INFO ex_info;
/* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
insn_value = cgen_get_insn_value (cd, buf, buflen * 8);
/* Fill in ex_info fields like read_insn would. Don't actually call
read_insn, since the incoming buffer is already read (and possibly
modified a la m32r). */
ex_info.valid = (1 << buflen) - 1;
ex_info.dis_info = info;
ex_info.insn_bytes = buf;
/* The instructions are stored in hash lists.
Pick the first one and keep trying until we find the right one. */
insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value);
while (insn_list != NULL)
{
const CGEN_INSN *insn = insn_list->insn;
CGEN_FIELDS fields;
int length;
unsigned long insn_value_cropped;
#ifdef CGEN_VALIDATE_INSN_SUPPORTED
/* Not needed as insn shouldn't be in hash lists if not supported. */
/* Supported by this cpu? */
if (! xstormy16_cgen_insn_supported (cd, insn))
{
insn_list = CGEN_DIS_NEXT_INSN (insn_list);
continue;
}
#endif
/* Basic bit mask must be correct. */
/* ??? May wish to allow target to defer this check until the extract
handler. */
/* Base size may exceed this instruction's size. Extract the
relevant part from the buffer. */
if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
(unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
info->endian == BFD_ENDIAN_BIG);
else
insn_value_cropped = insn_value;
if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
== CGEN_INSN_BASE_VALUE (insn))
{
/* Printing is handled in two passes. The first pass parses the
machine insn and extracts the fields. The second pass prints
them. */
/* Make sure the entire insn is loaded into insn_value, if it
can fit. */
if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
(unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
{
unsigned long full_insn_value;
int rc = read_insn (cd, pc, info, buf,
CGEN_INSN_BITSIZE (insn) / 8,
& ex_info, & full_insn_value);
if (rc != 0)
return rc;
length = CGEN_EXTRACT_FN (cd, insn)
(cd, insn, &ex_info, full_insn_value, &fields, pc);
}
else
length = CGEN_EXTRACT_FN (cd, insn)
(cd, insn, &ex_info, insn_value_cropped, &fields, pc);
/* length < 0 -> error */
if (length < 0)
return length;
if (length > 0)
{
CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
/* length is in bits, result is in bytes */
return length / 8;
}
}
insn_list = CGEN_DIS_NEXT_INSN (insn_list);
}
return 0;
}
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
or -1 if an error occured fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
#endif
static int
default_print_insn (cd, pc, info)
CGEN_CPU_DESC cd;
bfd_vma pc;
disassemble_info *info;
{
char buf[CGEN_MAX_INSN_SIZE];
int buflen;
int status;
/* Attempt to read the base part of the insn. */
buflen = cd->base_insn_bitsize / 8;
status = (*info->read_memory_func) (pc, buf, buflen, info);
/* Try again with the minimum part, if min < base. */
if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
{
buflen = cd->min_insn_bitsize / 8;
status = (*info->read_memory_func) (pc, buf, buflen, info);
}
if (status != 0)
{
(*info->memory_error_func) (status, pc, info);
return -1;
}
return print_insn (cd, pc, info, buf, buflen);
}
/* Main entry point.
Print one instruction from PC on INFO->STREAM.
Return the size of the instruction (in bytes). */
int
print_insn_xstormy16 (pc, info)
bfd_vma pc;
disassemble_info *info;
{
static CGEN_CPU_DESC cd = 0;
static int prev_isa;
static int prev_mach;
static int prev_endian;
int length;
int isa,mach;
int endian = (info->endian == BFD_ENDIAN_BIG
? CGEN_ENDIAN_BIG
: CGEN_ENDIAN_LITTLE);
enum bfd_architecture arch;
/* ??? gdb will set mach but leave the architecture as "unknown" */
#ifndef CGEN_BFD_ARCH
#define CGEN_BFD_ARCH bfd_arch_xstormy16
#endif
arch = info->arch;
if (arch == bfd_arch_unknown)
arch = CGEN_BFD_ARCH;
/* There's no standard way to compute the machine or isa number
so we leave it to the target. */
#ifdef CGEN_COMPUTE_MACH
mach = CGEN_COMPUTE_MACH (info);
#else
mach = info->mach;
#endif
#ifdef CGEN_COMPUTE_ISA
isa = CGEN_COMPUTE_ISA (info);
#else
isa = 0;
#endif
/* If we've switched cpu's, close the current table and open a new one. */
if (cd
&& (isa != prev_isa
|| mach != prev_mach
|| endian != prev_endian))
{
xstormy16_cgen_cpu_close (cd);
cd = 0;
}
/* If we haven't initialized yet, initialize the opcode table. */
if (! cd)
{
const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
const char *mach_name;
if (!arch_type)
abort ();
mach_name = arch_type->printable_name;
prev_isa = isa;
prev_mach = mach;
prev_endian = endian;
cd = xstormy16_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
CGEN_CPU_OPEN_BFDMACH, mach_name,
CGEN_CPU_OPEN_ENDIAN, prev_endian,
CGEN_CPU_OPEN_END);
if (!cd)
abort ();
xstormy16_cgen_init_dis (cd);
}
/* We try to have as much common code as possible.
But at this point some targets need to take over. */
/* ??? Some targets may need a hook elsewhere. Try to avoid this,
but if not possible try to move this hook elsewhere rather than
have two hooks. */
length = CGEN_PRINT_INSN (cd, pc, info);
if (length > 0)
return length;
if (length < 0)
return -1;
(*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
return cd->default_insn_bitsize / 8;
}

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1171
opcodes/xstormy16-opc.c Normal file
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opcodes/xstormy16-opc.h Normal file
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/* Instruction opcode header for xstormy16.
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
This file is part of the GNU Binutils and/or GDB, the GNU debugger.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#ifndef XSTORMY16_OPC_H
#define XSTORMY16_OPC_H
/* -- opc.h */
/* Allows reason codes to be output when assembler errors occur. */
#define CGEN_VERBOSE_ASSEMBLER_ERRORS
/* We can't use the default hash size because many bits are used by
operands. */
#define CGEN_DIS_HASH_SIZE 1
#define CGEN_DIS_HASH(buf, value) 0
/* -- */
/* Enum declaration for xstormy16 instruction types. */
typedef enum cgen_insn_type {
XSTORMY16_INSN_INVALID, XSTORMY16_INSN_MOVLMEMIMM, XSTORMY16_INSN_MOVHMEMIMM, XSTORMY16_INSN_MOVLGRMEM
, XSTORMY16_INSN_MOVHGRMEM, XSTORMY16_INSN_MOVLMEMGR, XSTORMY16_INSN_MOVHMEMGR, XSTORMY16_INSN_MOVGRGRI
, XSTORMY16_INSN_MOVGRGRIPOSTINC, XSTORMY16_INSN_MOVGRGRIPREDEC, XSTORMY16_INSN_MOVGRIGR, XSTORMY16_INSN_MOVGRIPOSTINCGR
, XSTORMY16_INSN_MOVGRIPREDECGR, XSTORMY16_INSN_MOVGRGRII, XSTORMY16_INSN_MOVGRGRIIPOSTINC, XSTORMY16_INSN_MOVGRGRIIPREDEC
, XSTORMY16_INSN_MOVGRIIGR, XSTORMY16_INSN_MOVGRIIPOSTINCGR, XSTORMY16_INSN_MOVGRIIPREDECGR, XSTORMY16_INSN_MOVGRGR
, XSTORMY16_INSN_MOVWIMM8, XSTORMY16_INSN_MOVWGRIMM8, XSTORMY16_INSN_MOVWGRIMM16, XSTORMY16_INSN_MOVLOWGR
, XSTORMY16_INSN_MOVHIGHGR, XSTORMY16_INSN_MOVFGRGRI, XSTORMY16_INSN_MOVFGRGRIPOSTINC, XSTORMY16_INSN_MOVFGRGRIPREDEC
, XSTORMY16_INSN_MOVFGRIGR, XSTORMY16_INSN_MOVFGRIPOSTINCGR, XSTORMY16_INSN_MOVFGRIPREDECGR, XSTORMY16_INSN_MOVFGRGRII
, XSTORMY16_INSN_MOVFGRGRIIPOSTINC, XSTORMY16_INSN_MOVFGRGRIIPREDEC, XSTORMY16_INSN_MOVFGRIIGR, XSTORMY16_INSN_MOVFGRIIPOSTINCGR
, XSTORMY16_INSN_MOVFGRIIPREDECGR, XSTORMY16_INSN_MASKGRGR, XSTORMY16_INSN_MASKGRIMM16, XSTORMY16_INSN_PUSHGR
, XSTORMY16_INSN_POPGR, XSTORMY16_INSN_SWPN, XSTORMY16_INSN_SWPB, XSTORMY16_INSN_SWPW
, XSTORMY16_INSN_ANDGRGR, XSTORMY16_INSN_ANDIMM8, XSTORMY16_INSN_ANDGRIMM16, XSTORMY16_INSN_ORGRGR
, XSTORMY16_INSN_ORIMM8, XSTORMY16_INSN_ORGRIMM16, XSTORMY16_INSN_XORGRGR, XSTORMY16_INSN_XORIMM8
, XSTORMY16_INSN_XORGRIMM16, XSTORMY16_INSN_NOTGR, XSTORMY16_INSN_ADDGRGR, XSTORMY16_INSN_ADDGRIMM4
, XSTORMY16_INSN_ADDIMM8, XSTORMY16_INSN_ADDGRIMM16, XSTORMY16_INSN_ADCGRGR, XSTORMY16_INSN_ADCGRIMM4
, XSTORMY16_INSN_ADCIMM8, XSTORMY16_INSN_ADCGRIMM16, XSTORMY16_INSN_SUBGRGR, XSTORMY16_INSN_SUBGRIMM4
, XSTORMY16_INSN_SUBIMM8, XSTORMY16_INSN_SUBGRIMM16, XSTORMY16_INSN_SBCGRGR, XSTORMY16_INSN_SBCGRIMM4
, XSTORMY16_INSN_SBCGRIMM8, XSTORMY16_INSN_SBCGRIMM16, XSTORMY16_INSN_INCGRIMM2, XSTORMY16_INSN_DECGRIMM2
, XSTORMY16_INSN_RRCGRGR, XSTORMY16_INSN_RRCGRIMM4, XSTORMY16_INSN_RLCGRGR, XSTORMY16_INSN_RLCGRIMM4
, XSTORMY16_INSN_SHRGRGR, XSTORMY16_INSN_SHRGRIMM, XSTORMY16_INSN_SHLGRGR, XSTORMY16_INSN_SHLGRIMM
, XSTORMY16_INSN_ASRGRGR, XSTORMY16_INSN_ASRGRIMM, XSTORMY16_INSN_SET1GRIMM, XSTORMY16_INSN_SET1GRGR
, XSTORMY16_INSN_SET1LMEMIMM, XSTORMY16_INSN_SET1HMEMIMM, XSTORMY16_INSN_CLR1GRIMM, XSTORMY16_INSN_CLR1GRGR
, XSTORMY16_INSN_CLR1LMEMIMM, XSTORMY16_INSN_CLR1HMEMIMM, XSTORMY16_INSN_CBWGR, XSTORMY16_INSN_REVGR
, XSTORMY16_INSN_BCCGRGR, XSTORMY16_INSN_BCCGRIMM8, XSTORMY16_INSN_BCCIMM16, XSTORMY16_INSN_BNGRIMM4
, XSTORMY16_INSN_BNGRGR, XSTORMY16_INSN_BNLMEMIMM, XSTORMY16_INSN_BNHMEMIMM, XSTORMY16_INSN_BPGRIMM4
, XSTORMY16_INSN_BPGRGR, XSTORMY16_INSN_BPLMEMIMM, XSTORMY16_INSN_BPHMEMIMM, XSTORMY16_INSN_BCC
, XSTORMY16_INSN_BGR, XSTORMY16_INSN_BR, XSTORMY16_INSN_JMP, XSTORMY16_INSN_JMPF
, XSTORMY16_INSN_CALLRGR, XSTORMY16_INSN_CALLRIMM, XSTORMY16_INSN_CALLGR, XSTORMY16_INSN_CALLFIMM
, XSTORMY16_INSN_ICALLRGR, XSTORMY16_INSN_ICALLGR, XSTORMY16_INSN_ICALLFIMM, XSTORMY16_INSN_IRET
, XSTORMY16_INSN_RET, XSTORMY16_INSN_MUL, XSTORMY16_INSN_DIV, XSTORMY16_INSN_NOP
, XSTORMY16_INSN_HALT, XSTORMY16_INSN_HOLD, XSTORMY16_INSN_BRK, XSTORMY16_INSN_SYSCALL
} CGEN_INSN_TYPE;
/* Index of `invalid' insn place holder. */
#define CGEN_INSN_INVALID XSTORMY16_INSN_INVALID
/* Total number of insns in table. */
#define MAX_INSNS ((int) XSTORMY16_INSN_SYSCALL + 1)
/* This struct records data prior to insertion or after extraction. */
struct cgen_fields
{
int length;
long f_nil;
long f_anyof;
long f_Rd;
long f_Rdm;
long f_Rm;
long f_Rs;
long f_Rb;
long f_Rbj;
long f_op1;
long f_op2;
long f_op2a;
long f_op2m;
long f_op3;
long f_op3a;
long f_op3b;
long f_op4;
long f_op4m;
long f_op4b;
long f_op5;
long f_op5a;
long f_op;
long f_imm2;
long f_imm3;
long f_imm3b;
long f_imm4;
long f_imm8;
long f_imm12;
long f_imm16;
long f_lmem8;
long f_hmem8;
long f_rel8_2;
long f_rel8_4;
long f_rel12;
long f_rel12a;
long f_abs24_1;
long f_abs24_2;
long f_abs24;
};
#define CGEN_INIT_PARSE(od) \
{\
}
#define CGEN_INIT_INSERT(od) \
{\
}
#define CGEN_INIT_EXTRACT(od) \
{\
}
#define CGEN_INIT_PRINT(od) \
{\
}
#endif /* XSTORMY16_OPC_H */