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[AArch64] Range check only resolved relocations.
2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com> * config/tc-aarch64.c (md_apply_fix): Move value range checking inside fx_done condition. 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com> * gas/aarch64/adr_1.d: New file. * gas/aarch64/adr_1.s: New file. * gas/aarch64/b_1.d: New file. * gas/aarch64/b_1.s: New file. * gas/aarch64/beq_1.d: New file. * gas/aarch64/beq_1.s: New file. * gas/aarch64/ldr_1.d: New file. * gas/aarch64/ldr_1.s: New file. * gas/aarch64/tbz_1.d: New file. * gas/aarch64/tbz_1.s: New file.
This commit is contained in:
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@ -1,3 +1,8 @@
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2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
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* config/tc-aarch64.c (md_apply_fix): Move value range checking
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inside fx_done condition.
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2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
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* config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
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@ -6341,14 +6341,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
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break;
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case BFD_RELOC_AARCH64_LD_LO19_PCREL:
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if (value & 3)
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("pc-relative load offset not word aligned"));
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if (signed_overflow (value, 21))
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("pc-relative load offset out of range"));
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if (fixP->fx_done || !seg->use_rela_p)
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{
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if (value & 3)
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("pc-relative load offset not word aligned"));
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if (signed_overflow (value, 21))
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("pc-relative load offset out of range"));
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insn = get_aarch64_insn (buf);
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insn |= encode_ld_lit_ofs_19 (value >> 2);
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put_aarch64_insn (buf, insn);
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@ -6356,11 +6356,11 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
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break;
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case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
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if (signed_overflow (value, 21))
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("pc-relative address offset out of range"));
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if (fixP->fx_done || !seg->use_rela_p)
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{
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if (signed_overflow (value, 21))
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("pc-relative address offset out of range"));
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insn = get_aarch64_insn (buf);
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insn |= encode_adr_imm (value);
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put_aarch64_insn (buf, insn);
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@ -6368,14 +6368,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
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break;
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case BFD_RELOC_AARCH64_BRANCH19:
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if (value & 3)
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("conditional branch target not word aligned"));
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if (signed_overflow (value, 21))
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("conditional branch out of range"));
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if (fixP->fx_done || !seg->use_rela_p)
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{
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if (value & 3)
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("conditional branch target not word aligned"));
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if (signed_overflow (value, 21))
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("conditional branch out of range"));
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insn = get_aarch64_insn (buf);
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insn |= encode_cond_branch_ofs_19 (value >> 2);
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put_aarch64_insn (buf, insn);
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@ -6383,14 +6383,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
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break;
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case BFD_RELOC_AARCH64_TSTBR14:
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if (value & 3)
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("conditional branch target not word aligned"));
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if (signed_overflow (value, 16))
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("conditional branch out of range"));
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if (fixP->fx_done || !seg->use_rela_p)
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{
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if (value & 3)
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("conditional branch target not word aligned"));
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if (signed_overflow (value, 16))
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("conditional branch out of range"));
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insn = get_aarch64_insn (buf);
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insn |= encode_tst_branch_ofs_14 (value >> 2);
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put_aarch64_insn (buf, insn);
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@ -6399,13 +6399,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
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case BFD_RELOC_AARCH64_JUMP26:
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case BFD_RELOC_AARCH64_CALL26:
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if (value & 3)
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("branch target not word aligned"));
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if (signed_overflow (value, 28))
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as_bad_where (fixP->fx_file, fixP->fx_line, _("branch out of range"));
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if (fixP->fx_done || !seg->use_rela_p)
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{
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if (value & 3)
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("branch target not word aligned"));
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if (signed_overflow (value, 28))
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("branch out of range"));
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insn = get_aarch64_insn (buf);
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insn |= encode_branch_ofs_26 (value >> 2);
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put_aarch64_insn (buf, insn);
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@ -1,3 +1,16 @@
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2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
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* gas/aarch64/adr_1.d: New file.
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* gas/aarch64/adr_1.s: New file.
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* gas/aarch64/b_1.d: New file.
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* gas/aarch64/b_1.s: New file.
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* gas/aarch64/beq_1.d: New file.
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* gas/aarch64/beq_1.s: New file.
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* gas/aarch64/ldr_1.d: New file.
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* gas/aarch64/ldr_1.s: New file.
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* gas/aarch64/tbz_1.d: New file.
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* gas/aarch64/tbz_1.s: New file.
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2013-05-24 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
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* gas/s390/zarch-z9-109-err.s, gas/s390/zarch-z9-109-err.l: New test.
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9
gas/testsuite/gas/aarch64/adr_1.d
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9
gas/testsuite/gas/aarch64/adr_1.d
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@ -0,0 +1,9 @@
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#objdump: -dr
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.*: file format .*
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Disassembly of section \.text:
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0000000000000000 <.*>:
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0: 10000001 adr x1, 0 <bar>
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0: R_AARCH64_ADR_PREL_LO21 bar\+0x80000000
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5
gas/testsuite/gas/aarch64/adr_1.s
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5
gas/testsuite/gas/aarch64/adr_1.s
Normal file
@ -0,0 +1,5 @@
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// adr.s Test file for AArch64 adr.
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.text
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adr x1, bar + 0x80000000
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9
gas/testsuite/gas/aarch64/b_1.d
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9
gas/testsuite/gas/aarch64/b_1.d
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@ -0,0 +1,9 @@
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#objdump: -dr
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.*: file format .*
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Disassembly of section \.text:
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0000000000000000 <.*>:
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0: 14000000 b 0 <bar>
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0: R_AARCH64_JUMP26 bar\+0x8000000
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5
gas/testsuite/gas/aarch64/b_1.s
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5
gas/testsuite/gas/aarch64/b_1.s
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@ -0,0 +1,5 @@
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// b.s Test file for AArch64 b.
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.text
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b bar + 0x8000000
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9
gas/testsuite/gas/aarch64/beq_1.d
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9
gas/testsuite/gas/aarch64/beq_1.d
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@ -0,0 +1,9 @@
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#objdump: -dr
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.*: file format .*
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Disassembly of section \.text:
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0000000000000000 <.*>:
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0: 54000000 b.eq 0 <bar>
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0: R_AARCH64_CONDBR19 bar\+0x100000
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5
gas/testsuite/gas/aarch64/beq_1.s
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5
gas/testsuite/gas/aarch64/beq_1.s
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@ -0,0 +1,5 @@
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// b.s Test file for AArch64 b.
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.text
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beq bar + 0x100000
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gas/testsuite/gas/aarch64/ldr_1.d
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9
gas/testsuite/gas/aarch64/ldr_1.d
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@ -0,0 +1,9 @@
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#objdump: -dr
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.*: file format .*
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Disassembly of section \.text:
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0000000000000000 <.*>:
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0: 58000001 ldr x1, 0 <bar>
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0: R_AARCH64_LD_PREL_LO19 bar\+0x100000
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5
gas/testsuite/gas/aarch64/ldr_1.s
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5
gas/testsuite/gas/aarch64/ldr_1.s
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@ -0,0 +1,5 @@
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// ldr.s Test file for AArch64 ldr.
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.text
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ldr x1, bar + 0x100000
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9
gas/testsuite/gas/aarch64/tbz_1.d
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9
gas/testsuite/gas/aarch64/tbz_1.d
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@ -0,0 +1,9 @@
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#objdump: -dr
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.*: file format .*
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Disassembly of section \.text:
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0000000000000000 <.*>:
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0: 36080000 tbz w0, #1, 0 <bar>
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0: R_AARCH64_TSTBR14 bar\+0x8000
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5
gas/testsuite/gas/aarch64/tbz_1.s
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5
gas/testsuite/gas/aarch64/tbz_1.s
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@ -0,0 +1,5 @@
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// tbz.s Test file for AArch64 tbz.
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.text
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tbz x0, #1, bar + 0x8000
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