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* Handle 10 and 20-bit versions of Break instruction. Move handling
* of special values from signal_exception() in interp.c into mips.igen. * * Modified: gencode.c interp.c mips.igen sim-main.h
This commit is contained in:
Ian Carmichael
parent
18993a6868
commit
895a7dc2aa
@ -2716,6 +2716,24 @@ build_instruction (doisa, features, mips16, insn)
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break ;
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case BREAK:
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printf(" unsigned int break_code = instruction & HALT_INSTRUCTION_MASK;\n");
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printf(" if ( break_code == (HALT_INSTRUCTION & HALT_INSTRUCTION_MASK)\n");
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printf(" || break_code == (HALT_INSTRUCTION2 & HALT_INSTRUCTION_MASK))\n");
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printf(" {\n");
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printf(" sim_engine_halt (SD, CPU, NULL, cia,\n");
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printf(" sim_exited, (unsigned int)(A0 & 0xFFFFFFFF));\n");
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printf(" }\n");
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printf(" else if ( break_code == (BREAKPOINT_INSTRUCTION & HALT_INSTRUCTION_MASK)\n");
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printf(" || break_code == (BREAKPOINT_INSTRUCTION2 & HALT_INSTRUCTION_MASK))\n");
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printf(" {\n");
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printf(" if (STATE & simDELAYSLOT)\n");
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printf(" PC = cia - 4; /* reference the branch instruction */\n");
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printf(" else\n");
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printf(" PC = cia;\n");
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printf(" sim_engine_halt (SD, CPU, NULL, cia, sim_stopped, SIM_SIGTRAP);\n");
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printf(" }\n");
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printf(" SignalException(BreakPoint,instruction);\n");
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break ;
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@ -110,23 +110,11 @@ char* pr_uword64 PARAMS ((uword64 addr));
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#define RSVD_INSTRUCTION_ARG_MASK 0xFFFFF
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/* The following reserved instruction value is used when a simulator
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halt is required. NOTE: Care must be taken, since this value may
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be used in later revisions of the MIPS ISA. */
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#define HALT_INSTRUCTION (0x03ff000d)
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#define HALT_INSTRUCTION2 (0x0000ffcd)
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#define HALT_INSTRUCTION_MASK (0x03FFFFC0)
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/* Bits in the Debug register */
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#define Debug_DBD 0x80000000 /* Debug Branch Delay */
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#define Debug_DM 0x40000000 /* Debug Mode */
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#define Debug_DBp 0x00000002 /* Debug Breakpoint indicator */
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/*---------------------------------------------------------------------------*/
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/*-- GDB simulator interface ------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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@ -1839,33 +1827,6 @@ signal_exception (SIM_DESC sd,
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sim_io_eprintf(sd,"ReservedInstruction at PC = 0x%s\n", pr_addr (cia));
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}
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case BreakPoint:
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#ifdef DEBUG
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sim_io_printf(sd,"DBG: SignalException(%d) PC = 0x%s\n",exception,pr_addr(cia));
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#endif /* DEBUG */
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/* Keep a copy of the current A0 in-case this is the program exit
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breakpoint: */
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{
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va_list ap;
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unsigned int instruction;
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va_start(ap, exception);
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instruction = va_arg(ap,unsigned int);
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va_end(ap);
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/* Check for our special terminating BREAK: */
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if ((instruction & HALT_INSTRUCTION_MASK) == (HALT_INSTRUCTION & HALT_INSTRUCTION_MASK) ||
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(instruction & HALT_INSTRUCTION_MASK) == (HALT_INSTRUCTION2 & HALT_INSTRUCTION_MASK))
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{
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sim_engine_halt (SD, CPU, NULL, cia,
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sim_exited, (unsigned int)(A0 & 0xFFFFFFFF));
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}
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}
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if (STATE & simDELAYSLOT)
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PC = cia - 4; /* reference the branch instruction */
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else
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PC = cia;
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sim_engine_halt (SD, CPU, NULL, cia,
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sim_stopped, SIM_SIGTRAP);
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default:
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/* Store exception code into current exception id variable (used
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by exit code): */
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@ -1964,6 +1925,7 @@ signal_exception (SIM_DESC sd,
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sim_engine_halt (SD, CPU, NULL, NULL_CIA,
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sim_stopped, SIM_SIGFPE);
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case BreakPoint:
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case SystemCall:
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case Trap:
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sim_engine_restart (SD, CPU, NULL, PC);
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@ -1974,11 +1936,6 @@ signal_exception (SIM_DESC sd,
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sim_engine_halt (SD, CPU, NULL, NULL_CIA,
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sim_stopped, SIM_SIGTRAP);
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case BreakPoint:
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PC = EPC;
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sim_engine_abort (SD, CPU, NULL_CIA,
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"FATAL: Should not encounter a breakpoint\n");
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default : /* Unknown internal exception */
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PC = EPC;
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sim_engine_halt (SD, CPU, NULL, NULL_CIA,
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@ -941,6 +941,36 @@
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*tx19:
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// end-sanitize-tx19
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{
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/* Check for some break instruction which are reserved for use by the simulator. */
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unsigned int break_code = instruction_0 & HALT_INSTRUCTION_MASK;
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if (break_code == (HALT_INSTRUCTION & HALT_INSTRUCTION_MASK) ||
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break_code == (HALT_INSTRUCTION2 & HALT_INSTRUCTION_MASK))
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{
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sim_engine_halt (SD, CPU, NULL, cia,
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sim_exited, (unsigned int)(A0 & 0xFFFFFFFF));
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}
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else if (break_code == (BREAKPOINT_INSTRUCTION & HALT_INSTRUCTION_MASK) ||
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break_code == (BREAKPOINT_INSTRUCTION2 & HALT_INSTRUCTION_MASK))
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{
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if (STATE & simDELAYSLOT)
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PC = cia - 4; /* reference the branch instruction */
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else
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PC = cia;
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sim_engine_halt (SD, CPU, NULL, cia, sim_stopped, SIM_SIGTRAP);
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}
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// start-sanitize-sky
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else if (break_code == (HALT_INSTRUCTION_PASS & HALT_INSTRUCTION_MASK))
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{
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sim_engine_halt (SD, CPU, NULL, cia, sim_exited, 0);
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}
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else if (break_code == (HALT_INSTRUCTION_FAIL & HALT_INSTRUCTION_MASK))
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{
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sim_engine_halt (SD, CPU, NULL, cia, sim_exited, 15);
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}
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// end-sanitize-sky
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/* If we get this far, we're not an instruction reserved by the sim. Raise
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the exception. */
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SignalException(BreakPoint, instruction_0);
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}
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@ -212,7 +212,7 @@ typedef struct _hilo_history {
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#define ALU32_END(ANS) \
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if (ALU32_HAD_OVERFLOW) \
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SignalExceptionIntegerOverflow (); \
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(ANS) = ALU32_OVERFLOW_RESULT
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(ANS) = (signed32) ALU32_OVERFLOW_RESULT
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#define ALU64_END(ANS) \
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@ -838,6 +838,24 @@ struct sim_state {
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run-time errors in the simulator. */
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#define SimulatorFault (0xFFFFFFFF)
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/* The following break instructions are reserved for use by the
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simulator. The first is used to halt the simulation. The second
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is used by gdb for break-points. NOTE: Care must be taken, since
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this value may be used in later revisions of the MIPS ISA. */
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#define HALT_INSTRUCTION_MASK (0x03FFFFC0)
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#define HALT_INSTRUCTION (0x03ff000d)
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#define HALT_INSTRUCTION2 (0x0000ffcd)
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/* start-sanitize-sky */
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#define HALT_INSTRUCTION_PASS (0x03fffc0d)
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#define HALT_INSTRUCTION_FAIL (0x03ffffcd)
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/* end-sanitize-sky */
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#define BREAKPOINT_INSTRUCTION (0x0005000d)
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#define BREAKPOINT_INSTRUCTION2 (0x0000014d)
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void signal_exception (SIM_DESC sd, sim_cpu *cpu, address_word cia, int exception, ...);
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#define SignalException(exc,instruction) signal_exception (SD, CPU, cia, (exc), (instruction))
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#define SignalExceptionInterrupt() signal_exception (SD, CPU, cia, Interrupt)
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