mirror/binutils-gdb
2
0
Fork 0
mirror of https://sourceware.org/git/binutils-gdb.git synced 2024-12-03 04:12:10 +08:00
Code Issues Packages Projects Releases Wiki Activity

ARM/opcodes: Fix negative hexadecimal offset disassembly

Browse Source 
2014-08-21  Nathan Sidwell  <nathan@codesourcery.com>
            Maciej W. Rozycki  <macro@codesourcery.com>

	opcodes/
	* arm-dis.c (print_arm_address): Negate the GPR-relative offset
	returned if the U bit is set.

2014-08-21  Paul Brook  <paul@codesourcery.com>

	gas/testsuite/
	* gas/arm/arch7a-mp.d: Adjust according to `print_arm_address'
	offset fix.
	* gas/arm/arch7r-mp.d: Likewise.
This commit is contained in:
Maciej W. Rozycki 2014-08-22 16:42:12 +01:00
parent e56c722b60
commit 84919466a8
5 changed files with 16 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
gas/testsuite/ChangeLog
View File

@ -1,3 +1,9 @@
2014-08-22 Paul Brook <paul@codesourcery.com>
* gas/arm/arch7a-mp.d: Adjust according to `print_arm_address'
offset fix.
* gas/arm/arch7r-mp.d: Likewise.
2014-08-21 Maciej W. Rozycki <macro@codesourcery.com>
* gas/mips/mips.exp: Correct indentation.

2
gas/testsuite/gas/arm/arch7a-mp.d
View File

@ -11,7 +11,7 @@ Disassembly of section .text:
0[0-9a-f]+ <[^>]+> f59ef000 pldw \[lr\]
0[0-9a-f]+ <[^>]+> f591f000 pldw \[r1\]
0[0-9a-f]+ <[^>]+> f590ffff pldw \[r0, #4095\] ; 0xfff
0[0-9a-f]+ <[^>]+> f510ffff pldw \[r0, #-4095\] ; 0xfff
0[0-9a-f]+ <[^>]+> f510ffff pldw \[r0, #-4095\] ; 0xfffff001
0[0-9a-f]+ <[^>]+> f790f000 pldw \[r0, r0\]
0[0-9a-f]+ <[^>]+> f791f000 pldw \[r1, r0\]
0[0-9a-f]+ <[^>]+> f79ef000 pldw \[lr, r0\]

2
gas/testsuite/gas/arm/arch7r-mp.d
View File

@ -10,7 +10,7 @@ Disassembly of section .text:
0[0-9a-f]+ <[^>]+> f59ef000 pldw \[lr\]
0[0-9a-f]+ <[^>]+> f591f000 pldw \[r1\]
0[0-9a-f]+ <[^>]+> f590ffff pldw \[r0, #4095\] ; 0xfff
0[0-9a-f]+ <[^>]+> f510ffff pldw \[r0, #-4095\] ; 0xfff
0[0-9a-f]+ <[^>]+> f510ffff pldw \[r0, #-4095\] ; 0xfffff001
0[0-9a-f]+ <[^>]+> f790f000 pldw \[r0, r0\]
0[0-9a-f]+ <[^>]+> f791f000 pldw \[r1, r0\]
0[0-9a-f]+ <[^>]+> f79ef000 pldw \[lr, r0\]

6
opcodes/ChangeLog
View File

@ -1,3 +1,9 @@
2014-08-21 Nathan Sidwell <nathan@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
* arm-dis.c (print_arm_address): Negate the GPR-relative offset
returned if the U bit is set.
2014-08-21 Maciej W. Rozycki <macro@codesourcery.com>
* micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out

2
opcodes/arm-dis.c
View File

@ -2583,6 +2583,8 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given)
arm_decode_shift (given, func, stream, TRUE);
}
}
if (NEGATIVE_BIT_SET)
offset = -offset;
}
return (signed long) offset;