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x86-64: limit breakage from gcc movdir64b et al workaround

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This is only a partial fix for PR/gas 27419, in that it limits the bad
behavior of accepting mismatched operands to just x32 mode. The full fix
would be to revert commits 27f134698ac5 and b3a3496f83a1, and to address
the issue in gcc instead.
This commit is contained in:
Jan Beulich 2021-03-25 08:17:45 +01:00
parent 5a4037661b
commit 829f3fe1f0
16 changed files with 178 additions and 35 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
gas/ChangeLog
View File

@ -1,3 +1,25 @@
2021-03-25 Jan Beulich <jbeulich@suse.com>
PR/gas 27419
* config/tc-i386.c (process_suffix): Restrict (%rip) -> (%eip)
conversion to x32 mode.
* testsuite/gas/i386/ilp32/enqcmd.s,
testsuite/gas/i386/ilp32/enqcmd.d,
testsuite/gas/i386/ilp32/movdir.s,
testsuite/gas/i386/ilp32/movdir.d: New.
* testsuite/gas/i386/x86-64-enqcmd.s,
testsuite/gas/i386/x86-64-movdir.s: Drop mismatched operand
cases.
* testsuite/gas/i386/x86-64-enqcmd-inval.s: Add (%rip) and
(%eip) cases.
* testsuite/gas/i386/x86-64-movdir64b-reg.s Add (%eip) case.
* testsuite/gas/i386/x86-64-enqcmd.d,
testsuite/gas/i386/x86-64-enqcmd-intel.d,
testsuite/gas/i386/x86-64-enqcmd-inval.l,
testsuite/gas/i386/x86-64-movdir.d,
testsuite/gas/i386/x86-64-movdir-intel.d,
testsuite/gas/i386/x86-64-movdir64b-reg.l: Adjust expectations.
2021-03-25 Alan Modra <amodra@gmail.com>
PR 27647

9
gas/config/tc-i386.c
View File

@ -7169,7 +7169,7 @@ process_suffix (void)
/* Check the register operand for the address size prefix if
the memory operand has no real registers, like symbol, DISP
or symbol(%rip). */
or bogus (x32-only) symbol(%rip) when symbol(%eip) is meant. */
if (i.mem_operands == 1
&& i.reg_operands == 1
&& i.operands == 2
@ -7178,9 +7178,14 @@ process_suffix (void)
? i.op[1].regs->reg_type.bitfield.word
: i.op[1].regs->reg_type.bitfield.dword)
&& ((i.base_reg == NULL && i.index_reg == NULL)
|| (i.base_reg
#if defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF)
|| (x86_elf_abi == X86_64_X32_ABI
&& i.base_reg
&& i.base_reg->reg_num == RegIP
&& i.base_reg->reg_type.bitfield.qword))
#else
|| 0)
#endif
&& !add_prefix (ADDR_PREFIX_OPCODE))
return 0;

38
gas/testsuite/gas/i386/ilp32/enqcmd.d Normal file
View File

@ -0,0 +1,38 @@
#objdump: -dw
#name: ilp32 ENQCMD[S] insns
.*: +file format .*
Disassembly of section \.text:
0+ <_start>:
+[a-f0-9]+: f2 0f 38 f8 01 enqcmd \(%rcx\),%rax
+[a-f0-9]+: 67 f2 0f 38 f8 01 enqcmd \(%ecx\),%eax
+[a-f0-9]+: f3 0f 38 f8 01 enqcmds \(%rcx\),%rax
+[a-f0-9]+: 67 f3 0f 38 f8 01 enqcmds \(%ecx\),%eax
+[a-f0-9]+: f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd 0x0\(,%eiz,1\),%ecx
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd 0x12345678\(,%eiz,1\),%ecx
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds 0x0\(,%eiz,1\),%ecx
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 78 56 34 12 enqcmds 0x12345678\(,%eiz,1\),%ecx
+[a-f0-9]+: f2 0f 38 f8 01 enqcmd \(%rcx\),%rax
+[a-f0-9]+: 67 f2 0f 38 f8 01 enqcmd \(%ecx\),%eax
+[a-f0-9]+: f3 0f 38 f8 01 enqcmds \(%rcx\),%rax
+[a-f0-9]+: 67 f3 0f 38 f8 01 enqcmds \(%ecx\),%eax
+[a-f0-9]+: f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd 0x0\(,%eiz,1\),%ecx
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd 0x12345678\(,%eiz,1\),%ecx
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds 0x0\(,%eiz,1\),%ecx
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 78 56 34 12 enqcmds 0x12345678\(,%eiz,1\),%ecx
#pass

35
gas/testsuite/gas/i386/ilp32/enqcmd.s Normal file
View File

@ -0,0 +1,35 @@
# Check ENQCMD[S] 64-bit instructions in x32 mode
.allow_index_reg
.text
_start:
enqcmd (%rcx),%rax
enqcmd (%ecx),%eax
enqcmds (%rcx),%rax
enqcmds (%ecx),%eax
enqcmd foo(%rip),%rcx
enqcmd foo(%rip),%ecx
enqcmd foo(%eip),%ecx
enqcmds foo(%rip),%rcx
enqcmds foo(%rip),%ecx
enqcmds foo(%eip),%ecx
enqcmd foo, %ecx
enqcmd 0x12345678, %ecx
enqcmds foo, %ecx
enqcmds 0x12345678, %ecx
.intel_syntax noprefix
enqcmd rax,[rcx]
enqcmd eax,[ecx]
enqcmds rax,[rcx]
enqcmds eax,[ecx]
enqcmd rcx,[rip+foo]
enqcmd ecx,[rip+foo]
enqcmd ecx,[eip+foo]
enqcmds rcx,[rip+foo]
enqcmds ecx,[rip+foo]
enqcmds ecx,[eip+foo]
enqcmd ecx,ds:foo
enqcmd ecx,ds:0x12345678
enqcmds ecx,ds:foo
enqcmds ecx,ds:0x12345678

29
gas/testsuite/gas/i386/ilp32/movdir.d Normal file
View File

@ -0,0 +1,29 @@
#objdump: -dw
#name: ilp32 MOVDIR[I,64B] insns
.*: +file format .*
Disassembly of section \.text:
0+ <_start>:
+[a-f0-9]+: 48 0f 38 f9 01 movdiri %rax,\(%rcx\)
+[a-f0-9]+: 66 0f 38 f8 01 movdir64b \(%rcx\),%rax
+[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b 0x0\(,%eiz,1\),%ecx
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b 0x12345678\(,%eiz,1\),%ecx
+[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%rcx\)
+[a-f0-9]+: 48 0f 38 f9 01 movdiri %rax,\(%rcx\)
+[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%rcx\)
+[a-f0-9]+: 48 0f 38 f9 01 movdiri %rax,\(%rcx\)
+[a-f0-9]+: 66 0f 38 f8 01 movdir64b \(%rcx\),%rax
+[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b 0x0\(,%eiz,1\),%ecx
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b 0x12345678\(,%eiz,1\),%ecx
#pass

26
gas/testsuite/gas/i386/ilp32/movdir.s Normal file
View File

@ -0,0 +1,26 @@
# Check MOVDIR[I,64B] 64-bit instructions in x32 mode
.allow_index_reg
.text
_start:
movdiri %rax, (%rcx)
movdir64b (%rcx),%rax
movdir64b (%ecx),%eax
movdir64b foo(%rip),%rcx
movdir64b foo(%rip),%ecx
movdir64b foo(%eip),%ecx
movdir64b foo, %ecx
movdir64b 0x12345678, %ecx
.intel_syntax noprefix
movdiri [rcx],eax
movdiri [rcx],rax
movdiri dword ptr [rcx],eax
movdiri qword ptr [rcx],rax
movdir64b rax,[rcx]
movdir64b eax,[ecx]
movdir64b rcx,[rip+foo]
movdir64b ecx,[rip+foo]
movdir64b ecx,[eip+foo]
movdir64b ecx,ds:foo
movdir64b ecx,ds:0x12345678

5
gas/testsuite/gas/i386/x86-64-enqcmd-intel.d
View File

@ -1,4 +1,3 @@
#as:
#objdump: -dw -Mintel
#name: x86_64 ENQCMD[S] insns (Intel disassembly)
#source: x86-64-enqcmd.s
@ -15,10 +14,8 @@ Disassembly of section \.text:
+[a-f0-9]+: 67 f3 0f 38 f8 01 enqcmds eax,\[ecx\]
+[a-f0-9]+: f2 0f 38 f8 0d 00 00 00 00 enqcmd rcx,\[rip\+0x0\] #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds rcx,\[rip\+0x0\] #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd ecx,\[eiz\*1\+0x0\]
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd ecx,\[eiz\*1\+0x12345678\]
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds ecx,\[eiz\*1\+0x0\]
@ -29,10 +26,8 @@ Disassembly of section \.text:
+[a-f0-9]+: 67 f3 0f 38 f8 01 enqcmds eax,\[ecx\]
+[a-f0-9]+: f2 0f 38 f8 0d 00 00 00 00 enqcmd rcx,\[rip\+0x0\] #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds rcx,\[rip\+0x0\] #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd ecx,\[eiz\*1\+0x0\]
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd ecx,\[eiz\*1\+0x12345678\]
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds ecx,\[eiz\*1\+0x0\]

16
gas/testsuite/gas/i386/x86-64-enqcmd-inval.l
View File

@ -1,9 +1,13 @@
.* Assembler messages:
.*6: Error: invalid register operand size for `enqcmd'
.*7: Error: invalid register operand size for `enqcmd'
.*8: Error: invalid register operand size for `enqcmds'
.*9: Error: invalid register operand size for `enqcmds'
.*12: Error: invalid register operand size for `enqcmd'
.*13: Error: invalid register operand size for `enqcmd'
.*14: Error: invalid register operand size for `enqcmds'
.*15: Error: invalid register operand size for `enqcmds'
.*8: Error: invalid register operand size for `enqcmd'
.*9: Error: invalid register operand size for `enqcmd'
.*10: Error: invalid register operand size for `enqcmds'
.*11: Error: invalid register operand size for `enqcmds'
.*12: Error: invalid register operand size for `enqcmds'
.*13: Error: invalid register operand size for `enqcmds'
.*16: Error: invalid register operand size for `enqcmd'
.*17: Error: invalid register operand size for `enqcmd'
.*18: Error: invalid register operand size for `enqcmds'
.*19: Error: invalid register operand size for `enqcmds'

6
gas/testsuite/gas/i386/x86-64-enqcmd-inval.s
View File

@ -1,12 +1,16 @@
# Check error for ENQCMD[S] 32-bit instructions
# Check error for ENQCMD[S] 64-bit instructions
.allow_index_reg
.text
_start:
enqcmd (%esi),%rax
enqcmd (%eip),%rax
enqcmd (%rsi),%eax
enqcmd (%rip),%eax
enqcmds (%esi),%rax
enqcmds (%eip),%rax
enqcmds (%rsi),%eax
enqcmds (%rip),%eax
.intel_syntax noprefix
enqcmd rax,[esi]

6
gas/testsuite/gas/i386/x86-64-enqcmd.d
View File

@ -1,7 +1,5 @@
#as:
#objdump: -dw
#name: x86_64 ENQCMD[S] insns
#source: x86-64-enqcmd.s
.*: +file format .*
@ -15,10 +13,8 @@ Disassembly of section \.text:
+[a-f0-9]+: 67 f3 0f 38 f8 01 enqcmds \(%ecx\),%eax
+[a-f0-9]+: f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd 0x0\(,%eiz,1\),%ecx
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd 0x12345678\(,%eiz,1\),%ecx
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds 0x0\(,%eiz,1\),%ecx
@ -29,10 +25,8 @@ Disassembly of section \.text:
+[a-f0-9]+: 67 f3 0f 38 f8 01 enqcmds \(%ecx\),%eax
+[a-f0-9]+: f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd 0x0\(,%eiz,1\),%ecx
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd 0x12345678\(,%eiz,1\),%ecx
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds 0x0\(,%eiz,1\),%ecx

4
gas/testsuite/gas/i386/x86-64-enqcmd.s
View File

@ -8,10 +8,8 @@ _start:
enqcmds (%rcx),%rax
enqcmds (%ecx),%eax
enqcmd foo(%rip),%rcx
enqcmd foo(%rip),%ecx
enqcmd foo(%eip),%ecx
enqcmds foo(%rip),%rcx
enqcmds foo(%rip),%ecx
enqcmds foo(%eip),%ecx
enqcmd foo, %ecx
enqcmd 0x12345678, %ecx
@ -24,10 +22,8 @@ _start:
enqcmds rax,[rcx]
enqcmds eax,[ecx]
enqcmd rcx,[rip+foo]
enqcmd ecx,[rip+foo]
enqcmd ecx,[eip+foo]
enqcmds rcx,[rip+foo]
enqcmds ecx,[rip+foo]
enqcmds ecx,[eip+foo]
enqcmd ecx,ds:foo
enqcmd ecx,ds:0x12345678

3
gas/testsuite/gas/i386/x86-64-movdir-intel.d
View File

@ -1,4 +1,3 @@
#as:
#objdump: -dw -Mintel
#name: x86_64 MOVDIR[I,64B] insns (Intel disassembly)
#source: x86-64-movdir.s
@ -14,7 +13,6 @@ Disassembly of section \.text:
+[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b eax,\[ecx\]
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b rcx,\[rip\+0x0\] #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b ecx,\[eiz\*1\+0x0\]
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b ecx,\[eiz\*1\+0x12345678\]
+[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[rcx\],eax
@ -25,7 +23,6 @@ Disassembly of section \.text:
+[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b eax,\[ecx\]
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b rcx,\[rip\+0x0\] #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b ecx,\[eiz\*1\+0x0\]
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b ecx,\[eiz\*1\+0x12345678\]
#pass

4
gas/testsuite/gas/i386/x86-64-movdir.d
View File

@ -1,7 +1,5 @@
#as:
#objdump: -dw
#name: x86_64 MOVDIR[I,64B] insns
#source: x86-64-movdir.s
.*: +file format .*
@ -14,7 +12,6 @@ Disassembly of section \.text:
+[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b 0x0\(,%eiz,1\),%ecx
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b 0x12345678\(,%eiz,1\),%ecx
+[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%rcx\)
@ -25,7 +22,6 @@ Disassembly of section \.text:
+[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b 0x0\(,%eiz,1\),%ecx
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b 0x12345678\(,%eiz,1\),%ecx
#pass

2
gas/testsuite/gas/i386/x86-64-movdir.s
View File

@ -7,7 +7,6 @@ _start:
movdir64b (%rcx),%rax
movdir64b (%ecx),%eax
movdir64b foo(%rip),%rcx
movdir64b foo(%rip),%ecx
movdir64b foo(%eip),%ecx
movdir64b foo, %ecx
movdir64b 0x12345678, %ecx
@ -20,7 +19,6 @@ _start:
movdir64b rax,[rcx]
movdir64b eax,[ecx]
movdir64b rcx,[rip+foo]
movdir64b ecx,[rip+foo]
movdir64b ecx,[eip+foo]
movdir64b ecx,ds:foo
movdir64b ecx,ds:0x12345678

6
gas/testsuite/gas/i386/x86-64-movdir64b-reg.l
View File

@ -1,5 +1,7 @@
.*: Assembler messages:
.*:6: Error: invalid register operand size for `movdir64b'
.*:7: Error: invalid register operand size for `movdir64b'
.*:10: Error: invalid register operand size for `movdir64b'
.*:11: Error: invalid register operand size for `movdir64b'
.*:8: Error: invalid register operand size for `movdir64b'
.*:9: Error: invalid register operand size for `movdir64b'
.*:12: Error: invalid register operand size for `movdir64b'
.*:13: Error: invalid register operand size for `movdir64b'

2
gas/testsuite/gas/i386/x86-64-movdir64b-reg.s
View File

@ -4,7 +4,9 @@
.text
_start:
movdir64b (%esi),%rax
movdir64b (%eip),%rax
movdir64b (%rsi),%eax
movdir64b (%rip),%eax
.intel_syntax noprefix
movdir64b rax,[esi]