From 762c38d552abbfed97c349c5e7c8ef34119b2f5e Mon Sep 17 00:00:00 2001 From: Yixuan Chen Date: Thu, 4 Jul 2024 17:16:59 +0800 Subject: [PATCH] RISC-V:[gprofng] Minimal support gprofng for riscv. ChangeLog: Add target riscv to --enable-gprofng. 2024-07-04 Yixuan Chen * configure: Add riscv. * configure.ac: Add riscv. gprofng/ChangeLog: Minimal support gprofng for riscv. 2024-07-04 Yixuan Chen * gprofng/common/core_pcbe.c (core_pcbe_init): Add RISC-V vendor conditon. (defined): Add riscv. * gprofng/common/cpuid.c (defined): Add risc-v hwprobe. * gprofng/common/gp-defs.h (TOK_A_RISCV): Add riscv. (defined): Add riscv. (ARCH_RISCV): Add riscv. * gprofng/common/hwc_cpus.h: Add RISC-V vendor. * gprofng/common/hwcfuncs.h (HW_INTERVAL_TYPE): Remove useless defination. * gprofng/configure: Add riscv. * gprofng/configure.ac: Add riscv. * gprofng/libcollector/hwprofile.h (ARCH): Add RISC-V register. (CONTEXT_PC): Add RISC-V register. (CONTEXT_FP): Add RISC-V register. (CONTEXT_SP): Add RISC-V register. (SETFUNCTIONCONTEXT): * gprofng/libcollector/libcol_util.c (__collector_util_init): Fix libc open condition. * gprofng/libcollector/libcol_util.h (ARCH): Add RISC-V. * gprofng/libcollector/unwind.c (ARCH): Add RISC-V register. (GET_PC): Add RISC-V register. (GET_SP): Add RISC-V register. (GET_FP): Add RISC-V register. (FILL_CONTEXT): * gprofng/src/DbeSession.cc (ARCH): Add RISC-V. * gprofng/src/Disasm.cc (Disasm::disasm_open): Add RISC-V. * gprofng/src/Experiment.cc (Experiment::ExperimentHandler::startElement): Add RISC-V. * gprofng/src/checks.cc (ARCH): Add RISC-V. * gprofng/src/collctrl.cc (defined): Set risc-v cpu frequency to 1000MHz as default for now, will fix when I find a better method to get cpu frequency. (read_cpuinfo): Add "mvendorid" condition according to risc-v /proc/cpuinfo file content. * gprofng/src/dbe_types.h (enum Platform_t): Add RISC-V. --- configure | 2 +- configure.ac | 2 +- gprofng/common/core_pcbe.c | 5 ++++- gprofng/common/cpuid.c | 27 +++++++++++++++++++++++++++ gprofng/common/gp-defs.h | 5 ++++- gprofng/common/hwc_cpus.h | 7 +++++++ gprofng/common/hwcfuncs.h | 1 - gprofng/configure | 4 ++++ gprofng/configure.ac | 4 ++++ gprofng/libcollector/hwprofile.h | 10 ++++++++++ gprofng/libcollector/libcol_util.c | 9 +++++++++ gprofng/libcollector/libcol_util.h | 2 +- gprofng/libcollector/unwind.c | 11 +++++++++++ gprofng/src/DbeSession.cc | 2 ++ gprofng/src/Disasm.cc | 2 ++ gprofng/src/Experiment.cc | 2 ++ gprofng/src/checks.cc | 4 ++++ gprofng/src/collctrl.cc | 5 ++++- gprofng/src/dbe_types.h | 3 ++- 19 files changed, 99 insertions(+), 8 deletions(-) diff --git a/configure b/configure index d8cb423cd56..7823f2c3784 100755 --- a/configure +++ b/configure @@ -3146,7 +3146,7 @@ fi if test "$enable_gprofng" = "yes"; then case "${target}" in - x86_64-*-linux* | i?86-*-linux* | aarch64-*-linux*) + x86_64-*-linux* | i?86-*-linux* | aarch64-*-linux* | riscv64-*-linux*) configdirs="$configdirs gprofng" ;; esac diff --git a/configure.ac b/configure.ac index 326d469c0c6..a390639bfa9 100644 --- a/configure.ac +++ b/configure.ac @@ -414,7 +414,7 @@ enable_gprofng=$enableval, enable_gprofng=yes) if test "$enable_gprofng" = "yes"; then case "${target}" in - x86_64-*-linux* | i?86-*-linux* | aarch64-*-linux*) + x86_64-*-linux* | i?86-*-linux* | aarch64-*-linux* | riscv64-*-linux*) configdirs="$configdirs gprofng" ;; esac diff --git a/gprofng/common/core_pcbe.c b/gprofng/common/core_pcbe.c index 45470d254db..fac85971490 100644 --- a/gprofng/common/core_pcbe.c +++ b/gprofng/common/core_pcbe.c @@ -2752,6 +2752,9 @@ core_pcbe_init (void) return 0; case X86_VENDOR_Intel: break; + case ANDES_VENDOR_ID: + case SIFIVE_VENDOR_ID: + case THEAD_VENDOR_ID: default: return -1; } @@ -2913,7 +2916,7 @@ core_pcbe_impl_name (void) static const char * core_pcbe_cpuref (void) { -#if defined(__aarch64__) +#if defined(__aarch64__) || defined(__riscv) return ""; #elif defined(__i386__) || defined(__x86_64) switch (cpuid_getmodel ()) diff --git a/gprofng/common/cpuid.c b/gprofng/common/cpuid.c index af15439eb27..891d5471335 100644 --- a/gprofng/common/cpuid.c +++ b/gprofng/common/cpuid.c @@ -42,6 +42,11 @@ __get_cpuid (unsigned int op ATTRIBUTE_UNUSED, unsigned int *eax, Tprintf (DBG_LT0, "cpuid.c:%d read_cpuid_id() MIDR_EL1=0x%016x\n", __LINE__, *eax); return res; } +#elif defined(__riscv) +#include +#include +#include +#include #endif /* @@ -180,6 +185,28 @@ get_cpuid_info () cpi->cpi_model += CPI_MODEL_XTD (regs.eax) << 4; break; } +#elif defined(__riscv) + #ifndef __riscv_hwprobe + cpi->cpi_vendor = 0; + cpi->cpi_family = 0; + cpi->cpi_model = 0; + #else + struct riscv_hwprobe res; + res.key = RISCV_HWPROBE_KEY_MVENDORID; + cpu_set_t cpu_set; + int __riscv_hwprobe (struct riscv_hwprobe *pairs, \ + long pair_count, long cpu_count, \ + unsigned long *cpus, unsigned long flags) \ + { + return syscall(__NR_riscv_hwprobe, pairs, pair_count, cpu_count, cpus, flags); + } + CPU_ZERO(&cpu_set); + CPU_SET(0, &cpu_set); + long ret = __riscv_hwprobe(&res, 1, 1, &cpu_set, 0); + cpi->cpi_vendor = res.value; + cpi->cpi_family = 0; + cpi->cpi_model = 0; + #endif #endif return cpi; } diff --git a/gprofng/common/gp-defs.h b/gprofng/common/gp-defs.h index a1c1f050ab1..e0471f334a2 100644 --- a/gprofng/common/gp-defs.h +++ b/gprofng/common/gp-defs.h @@ -32,6 +32,7 @@ */ #define ARCH(x) TOK_A_##x(ARCH) #define TOK_A_Aarch64(x) x##_Aarch64 +#define TOK_A_RISCV(x) x##_RISCV #define TOK_A_SPARC(x) x##_SPARC #define TOK_A_Intel(x) x##_Intel @@ -45,11 +46,13 @@ #define ARCH_Intel 1 #elif defined(__aarch64__) #define ARCH_Aarch64 1 +#elif defined(__riscv) +#define ARCH_RISCV 1 #else #error "Undefined platform" #endif -#if defined(__sparcv9) || defined(__x86_64) || defined(__aarch64__) +#if defined(__sparcv9) || defined(__x86_64) || defined(__aarch64__) || defined(__riscv) #define WSIZE_64 1 #else #define WSIZE_32 1 diff --git a/gprofng/common/hwc_cpus.h b/gprofng/common/hwc_cpus.h index 3d84391b489..88788f3b144 100644 --- a/gprofng/common/hwc_cpus.h +++ b/gprofng/common/hwc_cpus.h @@ -168,6 +168,13 @@ enum { ARM_CPU_IMP_AMPERE = 0xC0 }; +// riscv Constants from arch/riscv/include/asm/vendorid_list.h +enum { + ANDES_VENDOR_ID = 0x31e, + SIFIVE_VENDOR_ID = 0x489, + THEAD_VENDOR_ID = 0x5b7 +}; + #define AARCH64_VENDORSTR_ARM "ARM" /* strings below must match those returned by cpc_getcpuver() */ diff --git a/gprofng/common/hwcfuncs.h b/gprofng/common/hwcfuncs.h index f44b9a7b4ae..361a7213016 100644 --- a/gprofng/common/hwcfuncs.h +++ b/gprofng/common/hwcfuncs.h @@ -96,7 +96,6 @@ typedef struct { /* supplementary data fields */ #define HW_INTERVAL_MAX UINT64_MAX #define HW_INTERVAL_PRESET(x) (HW_INTERVAL_MAX - ((uint64_t)(x) - 1)) -#define HW_INTERVAL_TYPE(x) ((uint64_t) (x) /* parsing */ #define HWCFUNCS_MAX_ATTRS 20 diff --git a/gprofng/configure b/gprofng/configure index 980553561bf..84276b8e4f6 100755 --- a/gprofng/configure +++ b/gprofng/configure @@ -15789,6 +15789,10 @@ build_src= build_src=true build_collector=true ;; + riscv*-*-linux*) + build_src=true + build_collector=true + ;; esac # Check whether --enable-gprofng-tools was given. if test "${enable_gprofng_tools+set}" = set; then : diff --git a/gprofng/configure.ac b/gprofng/configure.ac index 691d6c9815a..5a4013c6940 100644 --- a/gprofng/configure.ac +++ b/gprofng/configure.ac @@ -63,6 +63,10 @@ build_src= build_src=true build_collector=true ;; + riscv*-*-linux*) + build_src=true + build_collector=true + ;; esac AC_ARG_ENABLE(gprofng-tools, AS_HELP_STRING([--disable-gprofng-tools], [do not build gprofng/src directory]), diff --git a/gprofng/libcollector/hwprofile.h b/gprofng/libcollector/hwprofile.h index b1ddd1c493b..9d0a309c639 100644 --- a/gprofng/libcollector/hwprofile.h +++ b/gprofng/libcollector/hwprofile.h @@ -84,6 +84,16 @@ typedef struct MHwcntr_packet (ucp)->uc_mcontext.regs[CONTEXT_PC] = (greg_t)(funcp); \ (ucp)->uc_mcontext.regs[CONTEXT_SP] = 0; \ (ucp)->uc_mcontext.regs[CONTEXT_FP] = 0; + +#elif ARCH(RISCV) +#define CONTEXT_PC REG_PC +#define CONTEXT_FP 8 +#define CONTEXT_SP 2 +#define SETFUNCTIONCONTEXT(ucp,funcp) \ + (ucp)->uc_mcontext.__gregs[CONTEXT_PC] = (greg_t)(funcp); \ + (ucp)->uc_mcontext.__gregs[CONTEXT_FP] = 0; \ + (ucp)->uc_mcontext.__gregs[CONTEXT_SP] = 0; + #endif /* ARCH() */ #endif diff --git a/gprofng/libcollector/libcol_util.c b/gprofng/libcollector/libcol_util.c index 15ba24d2ab5..1e58cf491a1 100644 --- a/gprofng/libcollector/libcol_util.c +++ b/gprofng/libcollector/libcol_util.c @@ -1459,7 +1459,10 @@ __collector_util_init () else if ((ptr = dlvsym (libc, "fopen", "GLIBC_2.0")) != NULL) __collector_util_funcs.fopen = ptr; else + { ptr = dlsym (libc, "fopen"); + if(ptr) __collector_util_funcs.fopen = ptr; + } if (__collector_util_funcs.fopen == NULL) { CALL_UTIL (fprintf)(stderr, "COL_ERROR_UTIL_INIT fopen: %s\n", dlerror ()); @@ -1475,7 +1478,10 @@ __collector_util_init () else if ((ptr = dlvsym (libc, "popen", "GLIBC_2.0")) != NULL) __collector_util_funcs.popen = ptr; else + { ptr = dlsym (libc, "popen"); + if(ptr) __collector_util_funcs.popen = ptr; + } if (__collector_util_funcs.popen == NULL) { CALL_UTIL (fprintf)(stderr, "COL_ERROR_UTIL_INIT popen: %s\n", dlerror ()); @@ -1491,7 +1497,10 @@ __collector_util_init () else if ((ptr = dlvsym (libc, "fclose", "GLIBC_2.0")) != NULL) __collector_util_funcs.fclose = ptr; else + { ptr = dlsym (libc, "fclose"); + if(ptr) __collector_util_funcs.fclose = ptr; + } if (__collector_util_funcs.fclose == NULL) { CALL_UTIL (fprintf)(stderr, "COL_ERROR_UTIL_INIT fclose: %s\n", dlerror ()); diff --git a/gprofng/libcollector/libcol_util.h b/gprofng/libcollector/libcol_util.h index 2eeeaeed50b..c8ec83ff0d9 100644 --- a/gprofng/libcollector/libcol_util.h +++ b/gprofng/libcollector/libcol_util.h @@ -270,7 +270,7 @@ __collector_cas_ptr (void *mem, void *cmp, void *new) return r; } -#elif ARCH(Aarch64) +#elif ARCH(Aarch64) || ARCH(RISCV) static __attribute__ ((always_inline)) inline uint32_t __collector_inc_32 (volatile uint32_t *ptr) { diff --git a/gprofng/libcollector/unwind.c b/gprofng/libcollector/unwind.c index e62da04433c..55fa2e9e9e7 100644 --- a/gprofng/libcollector/unwind.c +++ b/gprofng/libcollector/unwind.c @@ -180,6 +180,11 @@ memory_error_func (int status ATTRIBUTE_UNUSED, bfd_vma addr ATTRIBUTE_UNUSED, #define GET_PC(ctx) (((ucontext_t*)ctx)->uc_mcontext.regs[15]) #define GET_SP(ctx) (((ucontext_t*)ctx)->uc_mcontext.regs[13]) #define GET_FP(ctx) (((ucontext_t*)ctx)->uc_mcontext.regs[14]) + +#elif ARCH(RISCV) +#define GET_PC(ctx) (((ucontext_t*)ctx)->uc_mcontext.__gregs[REG_PC]) +#define GET_SP(ctx) (((ucontext_t*)ctx)->uc_mcontext.__gregs[2]) +#define GET_FP(ctx) (((ucontext_t*)ctx)->uc_mcontext.__gregs[8]) #endif /* ARCH() */ /* @@ -234,6 +239,12 @@ typedef uint64_t __u64; context->uc_mcontext.sp = (__u64) __builtin_frame_address(0); \ } +#elif ARCH(RISCV) +#define FILL_CONTEXT(context) \ + { CALL_UTIL(getcontext)(context); \ + context->uc_mcontext.__gregs[2] = (uint64_t) __builtin_frame_address(0); \ + } + #endif /* ARCH() */ static int diff --git a/gprofng/src/DbeSession.cc b/gprofng/src/DbeSession.cc index 20329091167..a6808d8d8f6 100644 --- a/gprofng/src/DbeSession.cc +++ b/gprofng/src/DbeSession.cc @@ -94,6 +94,8 @@ Platform_t DbeSession::platform = Sparc; #elif ARCH(Aarch64) Aarch64; +#elif ARCH(RISCV) + RISCV; #else // ARCH(Intel) Intel; #endif diff --git a/gprofng/src/Disasm.cc b/gprofng/src/Disasm.cc index 1396e4fb072..e41bf679292 100644 --- a/gprofng/src/Disasm.cc +++ b/gprofng/src/Disasm.cc @@ -208,6 +208,7 @@ Disasm::disasm_open () case Amd64: need_swap_endian = (DbeSession::platform == Sparc); break; + case RISCV: case Sparcv8plus: case Sparcv9: case Sparc: @@ -246,6 +247,7 @@ Disasm::disasm_open () dis_info.arch = bfd_arch_i386; dis_info.mach = bfd_mach_x86_64; break; + case RISCV: case Sparcv8plus: case Sparcv9: case Sparc: diff --git a/gprofng/src/Experiment.cc b/gprofng/src/Experiment.cc index 02a24ebc40d..a1f78fc0cde 100644 --- a/gprofng/src/Experiment.cc +++ b/gprofng/src/Experiment.cc @@ -542,6 +542,8 @@ Experiment::ExperimentHandler::startElement (char*, char*, char *qName, Attribut exp->platform = Intel; else if (strcmp (str, "aarch64") == 0) exp->platform = Aarch64; + else if (strcmp (str, "riscv64") == 0) + exp->platform = RISCV; else exp->platform = Sparc; exp->need_swap_endian = (DbeSession::platform == Sparc) ? diff --git a/gprofng/src/checks.cc b/gprofng/src/checks.cc index 8392bbe848d..4fe850d6509 100644 --- a/gprofng/src/checks.cc +++ b/gprofng/src/checks.cc @@ -332,6 +332,10 @@ collect::check_executable_arch (Elf *elf) case EM_AARCH64: is_64 = true; break; +#elif ARCH(RISCV) + case EM_RISCV: + is_64 = true; + break; #endif default: return EXEC_ELF_ARCH; diff --git a/gprofng/src/collctrl.cc b/gprofng/src/collctrl.cc index d32590f1cd6..ece01d17f32 100644 --- a/gprofng/src/collctrl.cc +++ b/gprofng/src/collctrl.cc @@ -91,6 +91,9 @@ read_cpuinfo () #if defined(__aarch64__) asm volatile("mrs %0, cntfrq_el0" : "=r" (cpu_info.cpu_clk_freq)); +#elif defined(__riscv) + // Set 1000 MHz for minimal support RISC-V, will fix with a better method to get cpu clock frequency. + cpu_info.cpu_clk_freq = 1000; #endif // Read /proc/cpuinfo to get CPU info and clock rate @@ -106,7 +109,7 @@ read_cpuinfo () cpu_info.cpu_clk_freq = read_int (temp + 9); else if (strncmp (temp, "cpu family", 10) == 0) cpu_info.cpu_family = read_int (temp + 10); - else if (strncmp (temp, "vendor_id", 9) == 0) + else if ((strncmp (temp, "vendor_id", 9) || strncmp (temp, "mvendorid", 9)) == 0) { if (cpu_info.cpu_vendorstr == NULL) read_str (temp + 9, &cpu_info.cpu_vendorstr); diff --git a/gprofng/src/dbe_types.h b/gprofng/src/dbe_types.h index dd97adc4d51..430922a9b75 100644 --- a/gprofng/src/dbe_types.h +++ b/gprofng/src/dbe_types.h @@ -42,7 +42,8 @@ enum Platform_t Sparcv8plus, Java, Amd64, - Aarch64 + Aarch64, + RISCV }; enum WSize_t