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Fix unexpected failures in GAS testsuite for ARM VxWorks target.
PR 19456 * testsuite/gas/arm/weakdef-1.d: Skip for VxWorks. * testsuite/gas/arm/blx-bl-convert.d * testsuite/gas/arm/plt-1.d: Likewise. * testsuite/gas/arm/reloc-bad.d: Likewise. * testsuite/gas/arm/thumb-w-good.d: Likewise. * testsuite/gas/arm/thumb2_pool.d: Likewise. * testsuite/gas/arm/ldconst.d: Adjust so that it works with VxWorks * testsuite/gas/arm/tls_vxworks.d: Update expected output.
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2016-01-20 Nick Clifton <nickc@redhat.com>
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PR 19456
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* testsuite/gas/arm/weakdef-1.d: Skip for VxWorks.
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* testsuite/gas/arm/blx-bl-convert.d
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* testsuite/gas/arm/plt-1.d: Likewise.
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* testsuite/gas/arm/reloc-bad.d: Likewise.
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* testsuite/gas/arm/thumb-w-good.d: Likewise.
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* testsuite/gas/arm/thumb2_pool.d: Likewise.
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* testsuite/gas/arm/ldconst.d: Adjust so that it works with VxWorks
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* testsuite/gas/arm/tls_vxworks.d: Update expected output.
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PR 19499
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* doc/as.texinfo (Errors): Correct documentation describing the
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interaction of .file and .line with warning and error messages.
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@ -1,7 +1,7 @@
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#name: blx->bl convert under no -march/cpu
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#error-output: blx-bl-convert.l
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#objdump: -d
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#skip: *-*-pe *-wince-* *-*-coff
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#skip: *-*-pe *-wince-* *-*-coff *-*-vxworks
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.*: file format .*
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@ -36,7 +36,5 @@ Disassembly of section .text:
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0+6c <[^>]*> e59f8008 ? ldr r8, \[pc, #8\] ; 0+7c <[^>]*>
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0+70 <[^>]*> e59fb004 ? ldr fp, \[pc, #4\] ; 0+7c <[^>]*>
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0+74 <[^>]*> e51fe000 ? ldr lr, \[pc, #-0\] ; 0+7c <[^>]*>
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0+78 <[^>]*> 00000000 .word 0x00000000
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78: R_ARM_ABS32 ext_symbol
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0+7c <[^>]*> 00001000 .word 0x00001000
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7c: R_ARM_ABS32 ext_symbol
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#pass
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@ -2,7 +2,7 @@
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# as:
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# objdump: -dr
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# This test is only valid on ELF based ports.
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#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
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#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks
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.*: +file format .*arm.*
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@ -1,2 +1,3 @@
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#name: Invalid relocations
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#error-output: reloc-bad.l
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#not-target: *-*-vxworks
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@ -1,6 +1,6 @@
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#name: Wide instruction acceptance in Thumb-2 cores
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#objdump: -d --prefix-addresses --show-raw-insn
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#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
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#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks
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.*: +file format .*arm.*
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# as: -march=armv6t2
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# objdump: -dr --prefix-addresses --show-raw-insn
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# This test is only valid on ELF based ports.
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#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
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#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks
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.*: +file format .*arm.*
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@ -12,19 +12,21 @@
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Disassembly of section .text:
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00+0 <main>:
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0: e1a00000 nop \(mov r0,r0\)
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4: e1a00000 nop \(mov r0,r0\)
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8: e1a0f00e mov pc, lr
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c: 00000000 .word 0x00000000
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c: R_ARM_TLS_GD32 a
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00+0 <arm_fn>:
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0: e1a00000 nop \; \(mov r0, r0\)
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0: R_ARM_TLS_DESCSEQ af
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4: e59f0014 ldr r0, \[pc, \#20\] ; 20 <\.arm_pool\+0x10>
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8: fa000000 blx 8 <ae\+0x8>
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8: R_ARM_TLS_CALL ae
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# ??? The addend is appearing in both the RELA field and the
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# contents. Shouldn't it be just one? bfd_install_relocation
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# appears to write the addend into the contents unconditionally,
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# yet somehow this does not happen for the majority of relocations.
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10: 00000004 .word 0x00000004
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10: R_ARM_TLS_LDM32 b\+0x4
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14: 00000008 .word 0x00000008
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14: R_ARM_TLS_IE32 c\+0x8
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18: 00000000 .word 0x00000000
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18: R_ARM_TLS_LE32 d
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c: e1a00000 nop \; \(mov r0, r0\)
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00000010 <.arm_pool>:
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10: 00000008 .word 0x00000008
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10: R_ARM_TLS_GD32 aa\+0x8
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14: 0000000c .word 0x0000000c
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14: R_ARM_TLS_LDM32 ab\+0xc
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18: 00000010 .word 0x00000010
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#pass
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# as:
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# objdump: -dr
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# This test is only valid on ELF based ports.
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#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
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#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks
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.*: +file format .*arm.*
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