mirror/binutils-gdb
2
0
Fork 0
mirror of https://sourceware.org/git/binutils-gdb.git synced 2024-11-21 01:12:32 +08:00
Code Issues Packages Projects Releases Wiki Activity

sim: mn10300: fix SMP compile

Browse Source 
The igen tool sets up the SD define for code fragments to use, but
mn10300 was expecting "sd".  Change all the igen related code to use
SD so it actually compiles.
This commit is contained in:
Mike Frysinger 2022-12-25 00:28:55 -05:00
parent fb74976044
commit 70b920ed09
3 changed files with 18 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
sim/mn10300/am33.igen
View File

@ -256,8 +256,8 @@
usp += 4;
}
if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
)
{
if (mask & 0x1)
@ -307,8 +307,8 @@
PC = cia;
mask = REGS;
if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
)
{
if (mask & 0x4)

4
sim/mn10300/mn10300-sim.h
View File

@ -182,10 +182,10 @@ dw2u64 (dword data)
/* Bring data in from the cold */
#define IMEM8(EA) \
(sim_core_read_aligned_1(STATE_CPU(sd, 0), EA, exec_map, (EA)))
(sim_core_read_aligned_1(STATE_CPU (SD, 0), EA, exec_map, (EA)))
#define IMEM8_IMMED(EA, N) \
(sim_core_read_aligned_1(STATE_CPU(sd, 0), EA, exec_map, (EA) + (N)))
(sim_core_read_aligned_1(STATE_CPU (SD, 0), EA, exec_map, (EA) + (N)))
/* Function declarations. */

24
sim/mn10300/mn10300.igen
View File

@ -4024,8 +4024,8 @@
sp += 4;
}
if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
)
{
if (mask & 0x1)
@ -4080,8 +4080,8 @@
PC = cia;
mask = REGS;
if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
)
{
if (mask & 0x4)
@ -4183,8 +4183,8 @@
mask = REGS;
if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
)
{
if (mask & 0x4)
@ -4293,8 +4293,8 @@
mask = REGS;
if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
)
{
if (mask & 0x4)
@ -4401,8 +4401,8 @@
offset = -4;
mask = REGS;
if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
)
{
@ -4507,8 +4507,8 @@
offset = -4;
mask = REGS;
if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
|| STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
)
{