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gdb: LoongArch: Implement loongarch_scan_prologue()
If can't determine prologue from the symbol table, need to examine instructions. Implement loongarch_scan_prologue() to analyze the function prologue from START_PC to LIMIT_PC, return the address of the first instruction past the prologue. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
This commit is contained in:
Tiezhu Yang
parent
5355776935
commit
6e0d24c448
@ -22,11 +22,131 @@
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#include "dwarf2/frame.h"
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#include "elf-bfd.h"
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#include "frame-unwind.h"
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#include "gdbcore.h"
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#include "loongarch-tdep.h"
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#include "target.h"
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#include "target-descriptions.h"
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#include "trad-frame.h"
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#include "user-regs.h"
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/* Fetch the instruction at PC. */
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static insn_t
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loongarch_fetch_instruction (CORE_ADDR pc)
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{
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size_t insn_len = loongarch_insn_length (0);
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gdb_byte buf[insn_len];
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int err;
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err = target_read_memory (pc, buf, insn_len);
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if (err)
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memory_error (TARGET_XFER_E_IO, pc);
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return extract_unsigned_integer (buf, insn_len, BFD_ENDIAN_LITTLE);
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}
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/* Return TRUE if INSN is a branch instruction, otherwise return FALSE. */
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static bool
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loongarch_insn_is_branch (insn_t insn)
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{
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if ((insn & 0xfc000000) == 0x4c000000 /* jirl rd, rj, offs16 */
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|| (insn & 0xfc000000) == 0x50000000 /* b offs26 */
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|| (insn & 0xfc000000) == 0x54000000 /* bl offs26 */
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|| (insn & 0xfc000000) == 0x58000000 /* beq rj, rd, offs16 */
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|| (insn & 0xfc000000) == 0x5c000000 /* bne rj, rd, offs16 */
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|| (insn & 0xfc000000) == 0x60000000 /* blt rj, rd, offs16 */
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|| (insn & 0xfc000000) == 0x64000000 /* bge rj, rd, offs16 */
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|| (insn & 0xfc000000) == 0x68000000 /* bltu rj, rd, offs16 */
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|| (insn & 0xfc000000) == 0x6c000000 /* bgeu rj, rd, offs16 */
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|| (insn & 0xfc000000) == 0x40000000 /* beqz rj, offs21 */
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|| (insn & 0xfc000000) == 0x44000000) /* bnez rj, offs21 */
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return true;
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return false;
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}
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/* Analyze the function prologue from START_PC to LIMIT_PC.
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Return the address of the first instruction past the prologue. */
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static CORE_ADDR
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loongarch_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc,
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CORE_ADDR limit_pc, struct frame_info *this_frame,
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struct trad_frame_cache *this_cache)
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{
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CORE_ADDR cur_pc = start_pc, prologue_end = 0;
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loongarch_gdbarch_tdep *tdep = (loongarch_gdbarch_tdep *) gdbarch_tdep (gdbarch);
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auto regs = tdep->regs;
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int32_t sp = regs.r + 3;
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int32_t fp = regs.r + 22;
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int32_t reg_value[32] = {0};
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int32_t reg_used[32] = {1, 0};
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while (cur_pc < limit_pc)
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{
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insn_t insn = loongarch_fetch_instruction (cur_pc);
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size_t insn_len = loongarch_insn_length (insn);
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int32_t rd = loongarch_decode_imm ("0:5", insn, 0);
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int32_t rj = loongarch_decode_imm ("5:5", insn, 0);
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int32_t rk = loongarch_decode_imm ("10:5", insn, 0);
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int32_t si12 = loongarch_decode_imm ("10:12", insn, 1);
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int32_t si20 = loongarch_decode_imm ("5:20", insn, 1);
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if ((insn & 0xffc00000) == 0x02c00000 /* addi.d sp,sp,si12 */
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&& rd == sp && rj == sp && si12 < 0)
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{
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prologue_end = cur_pc + insn_len;
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}
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else if ((insn & 0xffc00000) == 0x02c00000 /* addi.d fp,sp,si12 */
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&& rd == fp && rj == sp && si12 > 0)
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{
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prologue_end = cur_pc + insn_len;
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}
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else if ((insn & 0xffc00000) == 0x29c00000 /* st.d rd,sp,si12 */
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&& rj == sp)
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{
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prologue_end = cur_pc + insn_len;
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}
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else if ((insn & 0xff000000) == 0x27000000 /* stptr.d rd,sp,si14 */
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&& rj == sp)
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{
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prologue_end = cur_pc + insn_len;
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}
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else if ((insn & 0xfe000000) == 0x14000000) /* lu12i.w rd,si20 */
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{
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reg_value[rd] = si20 << 12;
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reg_used[rd] = 1;
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}
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else if ((insn & 0xffc00000) == 0x03800000) /* ori rd,rj,si12 */
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{
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if (reg_used[rj])
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{
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reg_value[rd] = reg_value[rj] | (si12 & 0xfff);
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reg_used[rd] = 1;
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}
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}
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else if ((insn & 0xffff8000) == 0x00108000 /* add.d sp,sp,rk */
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&& rd == sp && rj == sp)
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{
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if (reg_used[rk] == 1 && reg_value[rk] < 0)
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{
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prologue_end = cur_pc + insn_len;
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break;
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}
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}
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else if (loongarch_insn_is_branch (insn))
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{
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break;
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}
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cur_pc += insn_len;
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}
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if (prologue_end == 0)
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prologue_end = cur_pc;
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return prologue_end;
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}
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/* Implement the loongarch_skip_prologue gdbarch method. */
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static CORE_ADDR
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@ -45,7 +165,17 @@ loongarch_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
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return std::max (pc, post_prologue_pc);
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}
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return 0;
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/* Can't determine prologue from the symbol table, need to examine
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instructions. */
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/* Find an upper limit on the function prologue using the debug
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information. If the debug information could not be used to provide
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that bound, then use an arbitrary large number as the upper bound. */
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CORE_ADDR limit_pc = skip_prologue_using_sal (gdbarch, pc);
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if (limit_pc == 0)
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limit_pc = pc + 100; /* Arbitrary large number. */
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return loongarch_scan_prologue (gdbarch, pc, limit_pc, nullptr, nullptr);
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}
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/* Adjust the address downward (direction of stack growth) so that it
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