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2003-11-16 Andrew Cagney <cagney@redhat.com>
* mips-tdep.h (deprecated_mips_set_processor_regs_hack): Declare. * remote-mips.c (common_open): Instead of "mips_read_register_type" and "mips_set_processor_type_command" call "deprecated_mips_set_processor_regs_hack". * config/mips/tm-mips.h (mips_read_processor_type): Delete declaration. (mips_set_processor_type_command): Delete declaration. * mips-tdep.c (mips_gdbarch_init): Update comment. (mips_dump_tdep): Do not print MIPS_REGISTER_NAMES. (mips_set_processor_type): Delete function. (NUM_MIPS_PROCESSOR_REGS): Define. (mips_show_processor_type_command): Delete function. (mips_set_processor_type_command): Delete function. (tmp_mips_processor_type): Delete. (mips_processor_type): Delete. (mips_processor_type_table): Delete. (mips_r3051_reg_names): Delete. (mips_r3081_reg_names): Delete. (mips_lsi33k_reg_names): Delete. (mips_processor_reg_names): Delete. (mips_read_processor_type): Delete function. (deprecated_mips_set_processor_regs_hack): New function. (struct gdbarch_tdep): Add member "mips_processor_reg_names". (mips_register_name): Get the processor names from the tdep. (mips_tx39_reg_names): New array. (mips_generic_reg_names): Wire to a standard set of names. (mips_gdbarch_init): Set "mips_processor_reg_names". * config/mips/tm-irix5.h (MIPS_REGISTER_NAMES): Delete macro. * config/mips/tm-mips.h (MIPS_REGISTER_NAMES): Delete macro. * config/mips/tm-tx39.h (MIPS_REGISTER_NAMES): Delete macro.
This commit is contained in:
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691c0433df
@ -1,3 +1,36 @@
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2003-11-16 Andrew Cagney <cagney@redhat.com>
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* mips-tdep.h (deprecated_mips_set_processor_regs_hack): Declare.
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* remote-mips.c (common_open): Instead of
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"mips_read_register_type" and "mips_set_processor_type_command"
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call "deprecated_mips_set_processor_regs_hack".
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* config/mips/tm-mips.h (mips_read_processor_type): Delete
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declaration.
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(mips_set_processor_type_command): Delete declaration.
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* mips-tdep.c (mips_gdbarch_init): Update comment.
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(mips_dump_tdep): Do not print MIPS_REGISTER_NAMES.
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(mips_set_processor_type): Delete function.
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(NUM_MIPS_PROCESSOR_REGS): Define.
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(mips_show_processor_type_command): Delete function.
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(mips_set_processor_type_command): Delete function.
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(tmp_mips_processor_type): Delete.
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(mips_processor_type): Delete.
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(mips_processor_type_table): Delete.
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(mips_r3051_reg_names): Delete.
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(mips_r3081_reg_names): Delete.
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(mips_lsi33k_reg_names): Delete.
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(mips_processor_reg_names): Delete.
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(mips_read_processor_type): Delete function.
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(deprecated_mips_set_processor_regs_hack): New function.
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(struct gdbarch_tdep): Add member "mips_processor_reg_names".
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(mips_register_name): Get the processor names from the tdep.
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(mips_tx39_reg_names): New array.
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(mips_generic_reg_names): Wire to a standard set of names.
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(mips_gdbarch_init): Set "mips_processor_reg_names".
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* config/mips/tm-irix5.h (MIPS_REGISTER_NAMES): Delete macro.
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* config/mips/tm-mips.h (MIPS_REGISTER_NAMES): Delete macro.
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* config/mips/tm-tx39.h (MIPS_REGISTER_NAMES): Delete macro.
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2003-11-16 Andrew Cagney <cagney@redhat.com>
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* mips-tdep.c (struct gdbarch_tdep): Add field "regnum".
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@ -21,21 +21,6 @@
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#include "mips/tm-mips.h"
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/* Redefine register numbers for SGI. */
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#undef MIPS_REGISTER_NAMES
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/* Initializer for an array of names for registers 32 and above.
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There should be NUM_REGS-32 strings in this initializer. */
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#define MIPS_REGISTER_NAMES \
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{ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
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"pc", "cause", "bad", "hi", "lo", "fsr", "fir" \
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}
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/* Offsets for register values in _sigtramp frame.
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sigcontext is immediately above the _sigtramp frame on Irix. */
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#define SIGFRAME_BASE 0x0
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@ -22,21 +22,6 @@
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#include "mips/tm-mips.h"
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#include "solib.h"
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/* Redefine register numbers for SGI. */
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#undef MIPS_REGISTER_NAMES
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/* Initializer for an array of names for registers 32 and above.
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There should be NUM_REGS-32 strings in this initializer. */
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#define MIPS_REGISTER_NAMES \
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{ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
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"pc", "cause", "bad", "hi", "lo", "fsr", "fir" \
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}
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/* The signal handler trampoline is called _sigtramp. */
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#undef IN_SIGTRAMP
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#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))
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@ -45,22 +45,6 @@ extern int mips_step_skips_delay (CORE_ADDR);
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#define STEP_SKIPS_DELAY_P (1)
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#define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc))
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/* Initializer for an array of names for registers 32 and above.
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There should be NUM_REGS-32 strings in this initializer. */
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#ifndef MIPS_REGISTER_NAMES
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#define MIPS_REGISTER_NAMES \
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{ "sr", "lo", "hi", "bad", "cause","pc", \
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
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"fsr", "fir", ""/*"fp"*/, "", \
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"", "", "", "", "", "", "", "", \
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"", "", "", "", "", "", "", "", \
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}
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#endif
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/* Register numbers of various important registers.
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Note that some of these values are "real" register numbers,
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and correspond to the general registers of the machine,
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@ -119,9 +103,6 @@ extern struct frame_info *setup_arbitrary_frame (int, CORE_ADDR *);
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extern CORE_ADDR sigtramp_address, sigtramp_end;
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extern void fixup_sigtramp (void);
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/* Defined in mips-tdep.c and used in remote-mips.c */
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extern char *mips_read_processor_type (void);
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/* Functions for dealing with MIPS16 call and return stubs. */
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#define IGNORE_HELPER_CALL(pc) mips_ignore_helper (pc)
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extern int mips_ignore_helper (CORE_ADDR pc);
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@ -134,8 +115,5 @@ typedef unsigned long t_inst; /* Integer big enough to hold an instruction */
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#endif /* TM_MIPS_H */
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/* Command to set the processor type. */
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extern void mips_set_processor_type_command (char *, int);
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/* Single step based on where the current instruction will take us. */
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extern void mips_software_single_step (enum target_signal, int);
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Boston, MA 02111-1307, USA. */
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#include "mips/tm-mips.h"
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#undef MIPS_REGISTER_NAMES
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#define MIPS_REGISTER_NAMES \
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{ "sr", "lo", "hi", "bad", "cause","pc", \
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"", "", "", "", "", "", "", "", \
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"", "", "", "", "", "", "", "", \
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"", "", "", "", "", "", "", "", \
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"", "", "", "", "", "", "", "", \
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"", "", "", "", \
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"", "", "", "", "", "", "", "", \
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"", "", "config", "cache", "debug", "depc", "epc", "" \
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}
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228
gdb/mips-tdep.c
228
gdb/mips-tdep.c
@ -142,6 +142,8 @@ struct gdbarch_tdep
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different values. This contains the "public" fields. Don't
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add any that do not need to be public. */
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const struct mips_regnum *regnum;
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/* Register names table for the current register set. */
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const char **mips_processor_reg_names;
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};
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const struct mips_regnum *
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@ -393,10 +395,6 @@ static CORE_ADDR heuristic_proc_start (CORE_ADDR);
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static CORE_ADDR read_next_frame_reg (struct frame_info *, int);
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static int mips_set_processor_type (char *);
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static void mips_show_processor_type_command (char *, int);
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static void reinit_frame_cache_sfunc (char *, int, struct cmd_list_element *);
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static mips_extra_func_info_t find_proc_desc (CORE_ADDR pc,
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@ -409,32 +407,71 @@ static CORE_ADDR after_prologue (CORE_ADDR pc,
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static struct type *mips_float_register_type (void);
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static struct type *mips_double_register_type (void);
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/* This value is the model of MIPS in use. It is derived from the value
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of the PrID register. */
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char *mips_processor_type;
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char *tmp_mips_processor_type;
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/* The list of available "set mips " and "show mips " commands */
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static struct cmd_list_element *setmipscmdlist = NULL;
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static struct cmd_list_element *showmipscmdlist = NULL;
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/* A set of original names, to be used when restoring back to generic
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registers from a specific set. */
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static char *mips_generic_reg_names[] = MIPS_REGISTER_NAMES;
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/* Integer registers 0 thru 31 are handled explicitly by
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mips_register_name(). Processor specific registers 32 and above
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are listed in the sets of register names assigned to
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mips_processor_reg_names. */
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static char **mips_processor_reg_names = mips_generic_reg_names;
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are listed in the followign tables. */
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enum { NUM_MIPS_PROCESSOR_REGS = (90 - 32) };
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/* Generic MIPS. */
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static const char *mips_generic_reg_names[NUM_MIPS_PROCESSOR_REGS] = {
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"sr", "lo", "hi", "bad", "cause","pc",
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
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"fsr", "fir", ""/*"fp"*/, "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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};
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/* Names of IDT R3041 registers. */
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static const char *mips_r3041_reg_names[] = {
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"sr", "lo", "hi", "bad", "cause","pc",
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
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"fsr", "fir", "",/*"fp"*/ "",
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"", "", "bus", "ccfg", "", "", "", "",
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"", "", "port", "cmp", "", "", "epc", "prid",
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};
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/* Names of tx39 registers. */
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static const char *mips_tx39_reg_names[NUM_MIPS_PROCESSOR_REGS] = {
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"sr", "lo", "hi", "bad", "cause","pc",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "config", "cache", "debug", "depc", "epc", ""
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};
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/* Names of IRIX registers. */
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static const char *mips_irix_reg_names[NUM_MIPS_PROCESSOR_REGS] = {
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
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"pc", "cause", "bad", "hi", "lo", "fsr", "fir"
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};
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/* Return the name of the register corresponding to REGNO. */
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static const char *
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mips_register_name (int regno)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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/* GPR names for all ABIs other than n32/n64. */
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static char *mips_gpr_names[] = {
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"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
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@ -470,79 +507,15 @@ mips_register_name (int regno)
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return mips_gpr_names[rawnum];
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}
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else if (32 <= rawnum && rawnum < NUM_REGS)
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return mips_processor_reg_names[rawnum - 32];
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{
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gdb_assert (rawnum - 32 < NUM_MIPS_PROCESSOR_REGS);
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return tdep->mips_processor_reg_names[rawnum - 32];
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}
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else
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internal_error (__FILE__, __LINE__,
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"mips_register_name: bad register number %d", rawnum);
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}
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/* *INDENT-OFF* */
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/* Names of IDT R3041 registers. */
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char *mips_r3041_reg_names[] = {
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"sr", "lo", "hi", "bad", "cause","pc",
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
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"fsr", "fir", "",/*"fp"*/ "",
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"", "", "bus", "ccfg", "", "", "", "",
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"", "", "port", "cmp", "", "", "epc", "prid",
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};
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/* Names of IDT R3051 registers. */
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char *mips_r3051_reg_names[] = {
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"sr", "lo", "hi", "bad", "cause","pc",
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
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"fsr", "fir", ""/*"fp"*/, "",
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"inx", "rand", "elo", "", "ctxt", "", "", "",
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"", "", "ehi", "", "", "", "epc", "prid",
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};
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/* Names of IDT R3081 registers. */
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char *mips_r3081_reg_names[] = {
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"sr", "lo", "hi", "bad", "cause","pc",
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
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"fsr", "fir", ""/*"fp"*/, "",
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"inx", "rand", "elo", "cfg", "ctxt", "", "", "",
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"", "", "ehi", "", "", "", "epc", "prid",
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};
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/* Names of LSI 33k registers. */
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char *mips_lsi33k_reg_names[] = {
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"epc", "hi", "lo", "sr", "cause","badvaddr",
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"dcic", "bpc", "bda", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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};
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struct {
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char *name;
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char **regnames;
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} mips_processor_type_table[] = {
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{ "generic", mips_generic_reg_names },
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{ "r3041", mips_r3041_reg_names },
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{ "r3051", mips_r3051_reg_names },
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{ "r3071", mips_r3081_reg_names },
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{ "r3081", mips_r3081_reg_names },
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{ "lsi33k", mips_lsi33k_reg_names },
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{ NULL, NULL }
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};
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/* *INDENT-ON* */
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/* Return the groups that a MIPS register can be categorised into. */
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static int
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@ -5119,76 +5092,22 @@ set_mipsfpu_auto_command (char *args, int from_tty)
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mips_fpu_type_auto = 1;
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}
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/* Command to set the processor type. */
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/* Attempt to identify the particular processor model by reading the
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processor id. NOTE: cagney/2003-11-15: Firstly it isn't clear that
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the relevant processor still exists (it dates back to '94) and
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secondly this is not the way to do this. The processor type should
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be set by forcing an architecture change. */
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void
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mips_set_processor_type_command (char *args, int from_tty)
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{
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int i;
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if (tmp_mips_processor_type == NULL || *tmp_mips_processor_type == '\0')
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{
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printf_unfiltered ("The known MIPS processor types are as follows:\n\n");
|
||||
for (i = 0; mips_processor_type_table[i].name != NULL; ++i)
|
||||
printf_unfiltered ("%s\n", mips_processor_type_table[i].name);
|
||||
|
||||
/* Restore the value. */
|
||||
tmp_mips_processor_type = xstrdup (mips_processor_type);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
if (!mips_set_processor_type (tmp_mips_processor_type))
|
||||
{
|
||||
error ("Unknown processor type `%s'.", tmp_mips_processor_type);
|
||||
/* Restore its value. */
|
||||
tmp_mips_processor_type = xstrdup (mips_processor_type);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
mips_show_processor_type_command (char *args, int from_tty)
|
||||
{
|
||||
}
|
||||
|
||||
/* Modify the actual processor type. */
|
||||
|
||||
static int
|
||||
mips_set_processor_type (char *str)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (str == NULL)
|
||||
return 0;
|
||||
|
||||
for (i = 0; mips_processor_type_table[i].name != NULL; ++i)
|
||||
{
|
||||
if (strcasecmp (str, mips_processor_type_table[i].name) == 0)
|
||||
{
|
||||
mips_processor_type = str;
|
||||
mips_processor_reg_names = mips_processor_type_table[i].regnames;
|
||||
return 1;
|
||||
/* FIXME tweak fpu flag too */
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Attempt to identify the particular processor model by reading the
|
||||
processor id. */
|
||||
|
||||
char *
|
||||
mips_read_processor_type (void)
|
||||
deprecated_mips_set_processor_regs_hack (void)
|
||||
{
|
||||
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
|
||||
CORE_ADDR prid;
|
||||
|
||||
prid = read_register (PRID_REGNUM);
|
||||
|
||||
if ((prid & ~0xf) == 0x700)
|
||||
return savestring ("r3041", strlen ("r3041"));
|
||||
|
||||
return NULL;
|
||||
tdep->mips_processor_reg_names = mips_r3041_reg_names;
|
||||
}
|
||||
|
||||
/* Just like reinit_frame_cache, but with the right arguments to be
|
||||
@ -6019,11 +5938,14 @@ mips_gdbarch_init (struct gdbarch_info info,
|
||||
else
|
||||
tdep->mips_fpu_type = MIPS_FPU_DOUBLE;
|
||||
|
||||
/* MIPS version of register names. NOTE: At present the MIPS
|
||||
register name management is part way between the old -
|
||||
#undef/#define MIPS_REGISTER_NAMES and the new REGISTER_NAME(nr).
|
||||
Further work on it is required. */
|
||||
/* MIPS version of register names. */
|
||||
set_gdbarch_register_name (gdbarch, mips_register_name);
|
||||
if (info.osabi == GDB_OSABI_IRIX)
|
||||
tdep->mips_processor_reg_names = mips_irix_reg_names;
|
||||
else if (info.bfd_arch_info != NULL && info.bfd_arch_info->mach == bfd_mach_mips3900)
|
||||
tdep->mips_processor_reg_names = mips_tx39_reg_names;
|
||||
else
|
||||
tdep->mips_processor_reg_names = mips_generic_reg_names;
|
||||
set_gdbarch_read_pc (gdbarch, mips_read_pc);
|
||||
set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
|
||||
set_gdbarch_deprecated_target_read_fp (gdbarch, mips_read_sp); /* Draft FRAME base. */
|
||||
@ -6296,8 +6218,6 @@ mips_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
|
||||
fprintf_unfiltered (file,
|
||||
"mips_dump_tdep: MIPS_NUMREGS = %d\n",
|
||||
MIPS_NUMREGS);
|
||||
fprintf_unfiltered (file,
|
||||
"mips_dump_tdep: MIPS_REGISTER_NAMES = delete?\n");
|
||||
fprintf_unfiltered (file,
|
||||
"mips_dump_tdep: MIPS_SAVED_REGSIZE = %d\n",
|
||||
MIPS_SAVED_REGSIZE);
|
||||
|
@ -70,4 +70,8 @@ enum {
|
||||
MIPS_EMBED_FP0_REGNUM = 38
|
||||
};
|
||||
|
||||
/* Defined in mips-tdep.c and used in remote-mips.c */
|
||||
extern void deprecated_mips_set_processor_regs_hack (void);
|
||||
|
||||
|
||||
#endif /* MIPS_TDEP_H */
|
||||
|
@ -1607,9 +1607,7 @@ device is attached to the target board (e.g., /dev/ttya).\n"
|
||||
/* FIXME: Should we call start_remote here? */
|
||||
|
||||
/* Try to figure out the processor model if possible. */
|
||||
ptype = mips_read_processor_type ();
|
||||
if (ptype)
|
||||
mips_set_processor_type_command (xstrdup (ptype), 0);
|
||||
deprecated_mips_set_processor_regs_hack ();
|
||||
|
||||
/* This is really the job of start_remote however, that makes an
|
||||
assumption that the target is about to print out a status message
|
||||
|
Loading…
Reference in New Issue
Block a user