x86: fold Size{16,32,64} template attributes

Only one of them can be set at a time, which means they can be expressed
by a single 2-bit field instead of three 1-bit ones.
This commit is contained in:
Jan Beulich 2018-10-10 08:41:52 +02:00 committed by Jan Beulich
parent 43f6cd0588
commit 673fe0f0a7
7 changed files with 11707 additions and 15583 deletions

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@ -1,3 +1,8 @@
2018-10-10 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (parse_insn, process_suffix): Replace
opcode_modifier.size<N> uses.
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (aarch64_features): Add new "ssbs".

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@ -4450,10 +4450,10 @@ parse_insn (char *line, char *mnemonic)
}
/* If we are in 16-bit mode, do not allow addr16 or data16.
Similarly, in 32-bit mode, do not allow addr32 or data32. */
if ((current_templates->start->opcode_modifier.size16
|| current_templates->start->opcode_modifier.size32)
if ((current_templates->start->opcode_modifier.size == SIZE16
|| current_templates->start->opcode_modifier.size == SIZE32)
&& flag_code != CODE_64BIT
&& (current_templates->start->opcode_modifier.size32
&& ((current_templates->start->opcode_modifier.size == SIZE32)
^ (flag_code == CODE_16BIT)))
{
as_bad (_("redundant %s prefix"),
@ -6045,11 +6045,11 @@ process_suffix (void)
{
/* If matched instruction specifies an explicit instruction mnemonic
suffix, use it. */
if (i.tm.opcode_modifier.size16)
if (i.tm.opcode_modifier.size == SIZE16)
i.suffix = WORD_MNEM_SUFFIX;
else if (i.tm.opcode_modifier.size32)
else if (i.tm.opcode_modifier.size == SIZE32)
i.suffix = LONG_MNEM_SUFFIX;
else if (i.tm.opcode_modifier.size64)
else if (i.tm.opcode_modifier.size == SIZE64)
i.suffix = QWORD_MNEM_SUFFIX;
else if (i.reg_operands)
{

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@ -1,3 +1,15 @@
2018-10-10 Jan Beulich <jbeulich@suse.com>
* i386-gen.c (opcode_modifiers): Drop Size16, Size32, and
Size64. Add Size.
* i386-opc.h (Size16, Size32, Size64): Delete.
(Size): New.
(SIZE16, SIZE32, SIZE64): Define.
(struct i386_opcode_modifier): Drop size16, size32, and size64.
Add size.
* i386-opc.tbl (Size16, Size32, Size64): Define.
* i386-tbl.h: Re-generate.
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.c (operand_general_constraint_met_p): Add

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@ -612,9 +612,7 @@ static bitfield opcode_modifiers[] =
BITFIELD (JumpInterSegment),
BITFIELD (FloatMF),
BITFIELD (FloatR),
BITFIELD (Size16),
BITFIELD (Size32),
BITFIELD (Size64),
BITFIELD (Size),
BITFIELD (CheckRegSize),
BITFIELD (IgnoreSize),
BITFIELD (DefaultSize),

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@ -399,11 +399,12 @@ enum
/* src/dest swap for floats. */
FloatR,
/* needs size prefix if in 32-bit mode */
Size16,
#define SIZE16 1
/* needs size prefix if in 16-bit mode */
Size32,
#define SIZE32 2
/* needs size prefix if in 64-bit mode */
Size64,
#define SIZE64 3
Size,
/* check register size. */
CheckRegSize,
/* instruction ignores operand size prefix and in Intel mode ignores
@ -627,9 +628,7 @@ typedef struct i386_opcode_modifier
unsigned int jumpintersegment:1;
unsigned int floatmf:1;
unsigned int floatr:1;
unsigned int size16:1;
unsigned int size32:1;
unsigned int size64:1;
unsigned int size:2;
unsigned int checkregsize:1;
unsigned int ignoresize:1;
unsigned int defaultsize:1;

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@ -22,6 +22,10 @@
#include "i386-opc.h"
#undef None
#define Size16 Size=SIZE16
#define Size32 Size=SIZE32
#define Size64 Size=SIZE64
### MARKER ###
#define VexWIG VexW=VEXWIG

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