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Correct opcode generated for RX indirect MOVs without an offset.

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PR gas/19665
	* config/rx-parse.y (MOV):  Opcode generation for index
	register addressing mode.
	* testsuite/gas/rx/rx.exp: Updated for new testcase.
	* testsuite/gas/rx/pr19665.s: New file.
	* testsuite/gas/rx/pr19665.s: New file.
	* testsuite/gas/rx/mov.d: Update expected output.
This commit is contained in:
Vinay Kumar G 2016-02-15 16:34:34 +00:00 committed by Nick Clifton
parent 9fb71ee49f
commit 6439ea1a88
6 changed files with 72 additions and 6 deletions
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12
gas/ChangeLog
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@ -1,4 +1,14 @@
2016-02-15 Nick Clifton <nickc@redhat.com>
202016-02-15 Vinay <Vinay.G@kpit.com>
PR gas/19665
* config/rx-parse.y (MOV): Opcode generation for index
register addressing mode.
* testsuite/gas/rx/rx.exp: Updated for new testcase.
* testsuite/gas/rx/pr19665.s: New file.
* testsuite/gas/rx/pr19665.s: New file.
* testsuite/gas/rx/mov.d: Update expected output.
16-02-15 Nick Clifton <nickc@redhat.com>
* doc/as.texinfo (.section): Document that numeric values can now
be used for the flags and type fields of the ELF target's .section

9
gas/config/rx-parse.y
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@ -274,6 +274,15 @@ statement :
/* ---------------------------------------------------------------------- */
| MOV DOT_B '#' EXPR ',' '[' REG ']'
{ B2 (0xf8, 0x04); F ($7, 8, 4); IMMB ($4, 12);}
| MOV DOT_W '#' EXPR ',' '[' REG ']'
{ B2 (0xf8, 0x01); F ($7, 8, 4); IMMW ($4, 12);}
| MOV DOT_L '#' EXPR ',' '[' REG ']'
{ B2 (0xf8, 0x02); F ($7, 8, 4); IMM ($4, 12);}
| MOV DOT_B '#' EXPR ',' disp '[' REG ']'
/* rx_disp5op changes the value if it succeeds, so keep it last. */
{ if ($8 <= 7 && rx_uintop ($4, 8) && rx_disp5op0 (&$6, BSIZE))

10
gas/testsuite/gas/rx/mov.d
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@ -167,13 +167,13 @@ Disassembly of section .*:
[0-9a-f]+: ef 1f mov\.l r1, r15
[0-9a-f]+: ef f0 mov\.l r15, r0
[0-9a-f]+: ef ff mov\.l r15, r15
[0-9a-f]+: 3c 00 00 mov\.b #0, 0\[r0\]
[0-9a-f]+: f8 04 00 mov\.b #0, \[r0\]
[0-9a-f]+: f8 f4 00 mov\.b #0, \[r15\]
[0-9a-f]+: f9 04 fc 00 mov\.b #0, 252\[r0\]
[0-9a-f]+: f9 f4 fc 00 mov\.b #0, 252\[r15\]
[0-9a-f]+: fa 04 fc ff 00 mov\.b #0, 65532\[r0\]
[0-9a-f]+: fa f4 fc ff 00 mov\.b #0, 65532\[r15\]
[0-9a-f]+: 3c 00 ff mov\.b #255, 0\[r0\]
[0-9a-f]+: f8 04 ff mov\.b #255, \[r0\]
[0-9a-f]+: f8 f4 ff mov\.b #255, \[r15\]
[0-9a-f]+: f9 04 fc ff mov\.b #255, 252\[r0\]
[0-9a-f]+: f9 f4 fc ff mov\.b #255, 252\[r15\]
@ -185,13 +185,13 @@ Disassembly of section .*:
[0-9a-f]+: f9 f5 7e 80 mov\.w #-128, 252\[r15\]
[0-9a-f]+: fa 05 fe 7f 80 mov\.w #-128, 65532\[r0\]
[0-9a-f]+: fa f5 fe 7f 80 mov\.w #-128, 65532\[r15\]
[0-9a-f]+: 3d 00 7f mov\.w #127, 0\[r0\]
[0-9a-f]+: f8 05 7f mov\.w #127, \[r0\]
[0-9a-f]+: f8 f5 7f mov\.w #127, \[r15\]
[0-9a-f]+: f9 05 7e 7f mov\.w #127, 252\[r0\]
[0-9a-f]+: f9 f5 7e 7f mov\.w #127, 252\[r15\]
[0-9a-f]+: fa 05 fe 7f 7f mov\.w #127, 65532\[r0\]
[0-9a-f]+: fa f5 fe 7f 7f mov\.w #127, 65532\[r15\]
[0-9a-f]+: 3d 00 00 mov\.w #0, 0\[r0\]
[0-9a-f]+: f8 05 00 mov\.w #0, \[r0\]
[0-9a-f]+: f8 f5 00 mov\.w #0, \[r15\]
[0-9a-f]+: f9 05 7e 00 mov\.w #0, 252\[r0\]
[0-9a-f]+: f9 f5 7e 00 mov\.w #0, 252\[r15\]
@ -209,7 +209,7 @@ Disassembly of section .*:
[0-9a-f]+: f9 f6 3f 80 mov.l #-128, 252\[r15\]
[0-9a-f]+: fa 06 ff 3f 80 mov.l #-128, 65532\[r0\]
[0-9a-f]+: fa f6 ff 3f 80 mov.l #-128, 65532\[r15\]
[0-9a-f]+: 3e 00 7f mov.l #127, 0\[r0\]
[0-9a-f]+: f8 06 7f mov.l #127, \[r0\]
[0-9a-f]+: f8 f6 7f mov.l #127, \[r15\]
[0-9a-f]+: f9 06 3f 7f mov.l #127, 252\[r0\]
[0-9a-f]+: f9 f6 3f 7f mov.l #127, 252\[r15\]

26
gas/testsuite/gas/rx/pr19665.d Normal file
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@ -0,0 +1,26 @@
#objdump: -dr
dump.o: file format elf32-rx-le
Disassembly of section .*:
00000000 <.*>:
0: f8 04 ff[ ]+mov\.b #255, \[r0\]
3: f8 14 ff[ ]+mov\.b #255, \[r1\]
6: f8 24 ff[ ]+mov\.b #255, \[r2\]
9: f8 d4 ff[ ]+mov\.b #255, \[r13\]
c: f8 e4 ff[ ]+mov\.b #255, \[r14\]
f: f8 f4 ff[ ]+mov\.b #255, \[r15\]
12: f8 09 ff 00[ ]+mov\.w #255, \[r0\]
16: f8 19 ff 00[ ]+mov\.w #255, \[r1\]
1a: f8 29 ff 00[ ]+mov\.w #255, \[r2\]
1e: f8 d9 ff 00[ ]+mov\.w #255, \[r13\]
22: f8 e9 ff 00[ ]+mov\.w #255, \[r14\]
26: f8 f9 ff 00[ ]+mov\.w #255, \[r15\]
2a: f8 0a ff 00[ ]+mov\.l #255, \[r0\]
2e: f8 1a ff 00[ ]+mov\.l #255, \[r1\]
32: f8 2a ff 00[ ]+mov\.l #255, \[r2\]
36: f8 da ff 00[ ]+mov\.l #255, \[r13\]
3a: f8 ea ff 00[ ]+mov\.l #255, \[r14\]
3e: f8 fa ff 00[ ]+mov\.l #255, \[r15\]

20
gas/testsuite/gas/rx/pr19665.s Normal file
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@ -0,0 +1,20 @@
mov.b #0xff, [r0]
mov.b #0xff, [r1]
mov.b #0xff, [r2]
mov.b #0xff, [r13]
mov.b #0xff, [r14]
mov.b #0xff, [r15]
#
mov.w #0xff, [r0]
mov.w #0xff, [r1]
mov.w #0xff, [r2]
mov.w #0xff, [r13]
mov.w #0xff, [r14]
mov.w #0xff, [r15]
#
mov.l #0xff, [r0]
mov.l #0xff, [r1]
mov.l #0xff, [r2]
mov.l #0xff, [r13]
mov.l #0xff, [r14]
mov.l #0xff, [r15]

1
gas/testsuite/gas/rx/rx.exp
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@ -34,3 +34,4 @@ foreach test [lsort [glob $srcdir/$subdir/*.sm]] {
run_dump_test "rx-asm-good"
# run_list_test "rx-asm-bad" "" "Generation of error messages with bogus Renesas assembler directives"
run_dump_test "pr19665"