sim: switch sim_{read,write} APIs to 64-bit all the time [PR sim/7504]

We've been using SIM_ADDR which has always been 32-bit.  This means
the upper 32-bit address range in 64-bit sims is inaccessible.  Use
64-bit addresses all the time since we want the APIs to be stable
regardless of the active arch backend (which can be 32 or 64-bit).

The length is also 64-bit because it's completely feasible to have
a program that is larger than 4 GiB in size/image/runtime.  Forcing
the caller to manually chunk those accesses up into 4 GiB at a time
doesn't seem useful to anyone.

Bug: https://sourceware.org/PR7504
This commit is contained in:
Mike Frysinger 2022-11-12 01:15:32 +07:00
parent 20fea6638f
commit 63fd5b5dda
14 changed files with 64 additions and 60 deletions

View File

@ -20,6 +20,8 @@
#ifndef SIM_SIM_H
#define SIM_SIM_H 1
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
@ -163,14 +165,14 @@ SIM_RC sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
at virtual address MEM and store in BUF. Result is number of bytes
read, or zero if error. */
int sim_read (SIM_DESC sd, SIM_ADDR mem, void *buf, int length);
uint64_t sim_read (SIM_DESC sd, uint64_t mem, void *buf, uint64_t length);
/* Store LENGTH bytes from BUF into the simulated program's
memory. Store bytes starting at virtual address MEM. Result is
number of bytes write, or zero if error. */
int sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buf, int length);
uint64_t sim_write (SIM_DESC sd, uint64_t mem, const void *buf, uint64_t length);
/* Fetch register REGNO storing its raw (target endian) value in the

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@ -150,13 +150,13 @@ ARMul_ConsolePrint (ARMul_State * state,
}
}
int
uint64_t
sim_write (SIM_DESC sd ATTRIBUTE_UNUSED,
SIM_ADDR addr,
uint64_t addr,
const void * buffer,
int size)
uint64_t size)
{
int i;
uint64_t i;
const unsigned char * data = buffer;
init ();
@ -167,13 +167,13 @@ sim_write (SIM_DESC sd ATTRIBUTE_UNUSED,
return size;
}
int
uint64_t
sim_read (SIM_DESC sd ATTRIBUTE_UNUSED,
SIM_ADDR addr,
uint64_t addr,
void * buffer,
int size)
uint64_t size)
{
int i;
uint64_t i;
unsigned char * data = buffer;
init ();

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@ -1529,8 +1529,8 @@ sim_engine_run (SIM_DESC sd,
}
}
int
sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size)
uint64_t
sim_write (SIM_DESC sd, uint64_t addr, const void *buffer, uint64_t size)
{
int osize = size;
@ -1566,8 +1566,8 @@ sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size)
return 0;
}
int
sim_read (SIM_DESC sd, SIM_ADDR addr, void *buffer, int size)
uint64_t
sim_read (SIM_DESC sd, uint64_t addr, void *buffer, uint64_t size)
{
int osize = size;

View File

@ -26,16 +26,16 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
/* Generic implementation of sim_read that works with simulators
modeling real hardware */
int
sim_read (SIM_DESC sd, SIM_ADDR mem, void *buffer, int length)
uint64_t
sim_read (SIM_DESC sd, uint64_t mem, void *buffer, uint64_t length)
{
SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
return sim_core_read_buffer (sd, NULL, read_map,
buffer, mem, length);
}
int
sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buffer, int length)
uint64_t
sim_write (SIM_DESC sd, uint64_t mem, const void *buffer, uint64_t length)
{
SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
return sim_core_write_buffer (sd, NULL, write_map,

View File

@ -63,8 +63,8 @@ SIM_RC sim_analyze_program (SIM_DESC sd, const char *prog_name,
This is still accommodated for backward compatibility reasons. */
typedef struct host_callback_struct host_callback;
typedef int sim_write_fn (SIM_DESC sd, SIM_ADDR mem,
const void *buf, int length);
typedef uint64_t sim_write_fn (SIM_DESC sd, uint64_t mem,
const void *buf, uint64_t length);
struct bfd *sim_load_file (SIM_DESC sd, const char *myname,
host_callback *callback, const char *prog,
struct bfd *prog_bfd, int verbose_p,

View File

@ -485,8 +485,8 @@ aux_ent_entry (struct bfd *ebfd)
/* Helper for cris_handle_interpreter: like sim_write, but load at
interp_load_addr offset. */
static int
cris_write_interp (SIM_DESC sd, SIM_ADDR mem, const void *buf, int length)
static uint64_t
cris_write_interp (SIM_DESC sd, uint64_t mem, const void *buf, uint64_t length)
{
return sim_write (sd, mem + interp_load_addr, buf, length);
}

View File

@ -664,9 +664,9 @@ map_memory (SIM_DESC sd, SIM_CPU *cpu, unsigned phys_addr)
static int
xfer_mem (SIM_DESC sd,
SIM_ADDR virt,
address_word virt,
unsigned char *buffer,
int size,
uint64_t size,
int write_p)
{
uint8_t *memory;
@ -705,8 +705,8 @@ xfer_mem (SIM_DESC sd,
}
int
sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size)
uint64_t
sim_write (SIM_DESC sd, uint64_t addr, const void *buffer, uint64_t size)
{
/* FIXME: this should be performing a virtual transfer */
/* FIXME: We cast the const away, but it's safe because xfer_mem only reads
@ -714,8 +714,8 @@ sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size)
return xfer_mem (sd, addr, (void *) buffer, size, 1);
}
int
sim_read (SIM_DESC sd, SIM_ADDR addr, void *buffer, int size)
uint64_t
sim_read (SIM_DESC sd, uint64_t addr, void *buffer, uint64_t size)
{
/* FIXME: this should be performing a virtual transfer */
return xfer_mem (sd, addr, buffer, size, 0);

View File

@ -329,8 +329,8 @@ sim_fetch_register(SIM_DESC sd, int regno, void *buf, int length)
return -1;
}
int
sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buffer, int length)
uint64_t
sim_write (SIM_DESC sd, uint64_t mem, const void *buffer, uint64_t length)
{
int i, len;
const unsigned char *data = buffer;
@ -341,8 +341,8 @@ sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buffer, int length)
return length;
}
int
sim_read (SIM_DESC sd, SIM_ADDR mem, void *buffer, int length)
uint64_t
sim_read (SIM_DESC sd, uint64_t mem, void *buffer, uint64_t length)
{
int i, len;
unsigned char *data = buffer;

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@ -4340,8 +4340,8 @@ sim_engine_run (SIM_DESC sd,
}
}
int
sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size)
uint64_t
sim_write (SIM_DESC sd, uint64_t addr, const void *buffer, uint64_t size)
{
sim_cpu *cpu = STATE_CPU (sd, 0);
int i;
@ -4362,8 +4362,8 @@ sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size)
return i;
}
int
sim_read (SIM_DESC sd, SIM_ADDR addr, void *buffer, int size)
uint64_t
sim_read (SIM_DESC sd, uint64_t addr, void *buffer, uint64_t size)
{
sim_cpu *cpu = STATE_CPU (sd, 0);

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@ -158,8 +158,8 @@ sim_create_inferior (SIM_DESC sd, struct bfd * abfd,
return SIM_RC_OK;
}
int
sim_read (SIM_DESC sd, SIM_ADDR mem, void *buf, int length)
uint64_t
sim_read (SIM_DESC sd, uint64_t mem, void *buf, uint64_t length)
{
check_desc (sd);
@ -171,8 +171,8 @@ sim_read (SIM_DESC sd, SIM_ADDR mem, void *buf, int length)
return length;
}
int
sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buf, int length)
uint64_t
sim_write (SIM_DESC sd, uint64_t mem, const void *buf, uint64_t length)
{
check_desc (sd);

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@ -124,25 +124,27 @@ sim_load (SIM_DESC sd, const char *prog, bfd *abfd, int from_tty)
}
int
sim_read (SIM_DESC sd, SIM_ADDR mem, void *buf, int length)
uint64_t
sim_read (SIM_DESC sd, uint64_t mem, void *buf, uint64_t length)
{
int result = psim_read_memory(simulator, MAX_NR_PROCESSORS,
buf, mem, length);
TRACE(trace_gdb, ("sim_read(mem=0x%lx, buf=%p, length=%d) = %d\n",
(long)mem, buf, length, result));
TRACE(trace_gdb,
("sim_read(mem=0x%" PRIx64 ", buf=%p, length=%" PRIx64 ") = %d\n",
mem, buf, length, result));
return result;
}
int
sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buf, int length)
uint64_t
sim_write (SIM_DESC sd, uint64_t mem, const void *buf, uint64_t length)
{
int result = psim_write_memory(simulator, MAX_NR_PROCESSORS,
buf, mem, length,
1/*violate_ro*/);
TRACE(trace_gdb, ("sim_write(mem=0x%lx, buf=%p, length=%d) = %d\n",
(long)mem, buf, length, result));
TRACE(trace_gdb,
("sim_write(mem=0x%" PRIx64 ", buf=%p, length=%" PRIx64 ") = %d\n",
mem, buf, length, result));
return result;
}

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@ -204,8 +204,8 @@ sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
/* Read memory. */
int
sim_read (SIM_DESC sd, SIM_ADDR mem, void *buf, int length)
uint64_t
sim_read (SIM_DESC sd, uint64_t mem, void *buf, uint64_t length)
{
check_desc (sd);
@ -220,8 +220,8 @@ sim_read (SIM_DESC sd, SIM_ADDR mem, void *buf, int length)
/* Write memory. */
int
sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buf, int length)
uint64_t
sim_write (SIM_DESC sd, uint64_t mem, const void *buf, uint64_t length)
{
check_desc (sd);

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@ -225,8 +225,8 @@ sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
return SIM_RC_OK;
}
int
sim_read (SIM_DESC sd, SIM_ADDR mem, void *buffer, int length)
uint64_t
sim_read (SIM_DESC sd, uint64_t mem, void *buffer, uint64_t length)
{
int i;
unsigned char *data = buffer;
@ -251,8 +251,8 @@ sim_read (SIM_DESC sd, SIM_ADDR mem, void *buffer, int length)
return length;
}
int
sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buffer, int length)
uint64_t
sim_write (SIM_DESC sd, uint64_t mem, const void *buffer, uint64_t length)
{
int i;
const unsigned char *data = buffer;

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@ -1873,8 +1873,8 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
signal (SIGFPE, prev_fpe);
}
int
sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size)
uint64_t
sim_write (SIM_DESC sd, uint64_t addr, const void *buffer, uint64_t size)
{
int i;
const unsigned char *data = buffer;
@ -1888,8 +1888,8 @@ sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size)
return size;
}
int
sim_read (SIM_DESC sd, SIM_ADDR addr, void *buffer, int size)
uint64_t
sim_read (SIM_DESC sd, uint64_t addr, void *buffer, uint64_t size)
{
int i;
unsigned char *data = buffer;