From 632d447c675f7b287be781f576daf661e5eb5c54 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Wed, 2 Mar 2005 13:25:01 +0000 Subject: [PATCH] * gas/ppc/astest.d: Adjust for relocs reduced to section sym. * gas/ppc/astest2.d: Likewise. * gas/ppc/astest2_64.d: Likewise. * ppc/astest64.d: Likewise. * ppc/booke.d: Likewise. * ppc/power4.d: Likewise. * ppc/test1elf32.d: Likewise. * ppc/test1elf64.d: Likewise. --- gas/testsuite/ChangeLog | 21 +++++++++++---- gas/testsuite/gas/ppc/astest.d | 28 +++++++++++--------- gas/testsuite/gas/ppc/astest2.d | 27 ++++++++++--------- gas/testsuite/gas/ppc/astest2_64.d | 25 +++++++++++------- gas/testsuite/gas/ppc/astest64.d | 26 +++++++++++------- gas/testsuite/gas/ppc/booke.d | 16 ++++++------ gas/testsuite/gas/ppc/power4.d | 20 +++++++------- gas/testsuite/gas/ppc/test1elf32.d | 20 +++++++------- gas/testsuite/gas/ppc/test1elf64.d | 42 +++++++++++++++++------------- 9 files changed, 130 insertions(+), 95 deletions(-) diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 0f91ee78ef2..dc0c3efab3d 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,14 @@ +2005-03-02 Alan Modra + + * gas/ppc/astest.d: Adjust for relocs reduced to section sym. + * gas/ppc/astest2.d: Likewise. + * gas/ppc/astest2_64.d: Likewise. + * ppc/astest64.d: Likewise. + * ppc/booke.d: Likewise. + * ppc/power4.d: Likewise. + * ppc/test1elf32.d: Likewise. + * ppc/test1elf64.d: Likewise. + 2005-03-02 Jan Beulich * gas/i386/cr-err.[ls]: New. @@ -30,7 +41,7 @@ destination address rather than an offset from the start of the section. * gas/arm/pic.d: Likewise. - + 2005-03-01 Alan Modra * gas/m68k/mcf-emac.d: Allow for 64-bit addresses. @@ -810,8 +821,8 @@ * gas/all/altmac2.[sd]: ... to here. * gas/all/excl.s: New. * gas/all/gas.exp: Suppress both tests for a few targets known to - break. Run the new (split out) test only when the target doesn't - use '!' as a comment character. + break. Run the new (split out) test only when the target doesn't + use '!' as a comment character. 2004-08-18 Thiemo Seufer @@ -1229,10 +1240,10 @@ * gas/dlx/alltests.exp: Execute new lohi test. * gas/dlx/lohi.s: New test for spurious lo16/hi16 - reloc overflow checking. + reloc overflow checking. * gas/dlx/lohi.d: New file: expected output. * gas/dlx/lhi.d: Updated to properly expect lo16 - relocations where asked for. + relocations where asked for. * gas/dlx/itype.d: Likewise. * gas/dlx/lhi.d: Corrected cut+paste error in test name. diff --git a/gas/testsuite/gas/ppc/astest.d b/gas/testsuite/gas/ppc/astest.d index 758f9ce84c6..715bc4e4601 100644 --- a/gas/testsuite/gas/ppc/astest.d +++ b/gas/testsuite/gas/ppc/astest.d @@ -33,37 +33,41 @@ Disassembly of section \.text: 38: 48 00 00 00 b 38 38: R_PPC_LOCAL24PC a 3c: 4b ff ff d4 b 10 - 40: 00 00 00 40 \.long 0x40 40: R_PPC_ADDR32 \.text\+0x40 - 44: 00 00 00 4c \.long 0x4c 44: R_PPC_ADDR32 \.text\+0x4c 48: 00 00 00 00 \.long 0x0 48: R_PPC_REL32 x 4c: 00 00 00 04 \.long 0x4 4c: R_PPC_REL32 x\+0x4 - \.\.\. + 50: 00 00 00 00 \.long 0x0 50: R_PPC_REL32 z - 54: R_PPC_REL32 y + 54: 00 00 00 04 \.long 0x4 + 54: R_PPC_REL32 \.data\+0x4 + 58: 00 00 00 00 \.long 0x0 58: R_PPC_ADDR32 x - 5c: R_PPC_ADDR32 y + 5c: 00 00 00 04 \.long 0x4 + 5c: R_PPC_ADDR32 \.data\+0x4 + 60: 00 00 00 00 \.long 0x0 60: R_PPC_ADDR32 z 64: ff ff ff fc fnmsub f31,f31,f31,f31 64: R_PPC_ADDR32 x\+0xf+ffffffc - 68: ff ff ff fc fnmsub f31,f31,f31,f31 - 68: R_PPC_ADDR32 y\+0xf+ffffffc + 68: 00 00 00 00 \.long 0x0 + 68: R_PPC_ADDR32 \.data 6c: ff ff ff fc fnmsub f31,f31,f31,f31 6c: R_PPC_ADDR32 z\+0xf+ffffffc 70: ff ff ff 9c \.long 0xffffff9c 74: ff ff ff 9c \.long 0xffffff9c - \.\.\. + 78: 00 00 00 00 \.long 0x0 78: R_PPC_ADDR32 a - 7c: R_PPC_ADDR32 b - 80: R_PPC_ADDR32 apfour + 7c: 00 00 00 10 \.long 0x10 + 7c: R_PPC_ADDR32 \.text\+0x10 + 80: 00 00 00 10 \.long 0x10 + 80: R_PPC_ADDR32 \.text\+0x10 84: ff ff ff fc fnmsub f31,f31,f31,f31 - 88: 00 00 00 02 \.long 0x2 - 88: R_PPC_ADDR32 apfour\+0x2 + 88: 00 00 00 12 \.long 0x12 + 88: R_PPC_ADDR32 \.text\+0x12 8c: 00 00 00 00 \.long 0x0 Disassembly of section \.data: diff --git a/gas/testsuite/gas/ppc/astest2.d b/gas/testsuite/gas/ppc/astest2.d index 273ca57bf85..e0e1943b06b 100644 --- a/gas/testsuite/gas/ppc/astest2.d +++ b/gas/testsuite/gas/ppc/astest2.d @@ -29,26 +29,28 @@ Disassembly of section \.text: 38: 48 00 00 00 b 38 38: R_PPC_LOCAL24PC a 3c: 48 00 00 40 b 7c - 40: 00 00 00 40 \.long 0x40 40: R_PPC_ADDR32 \.text\+0x40 - 44: 00 00 00 4c \.long 0x4c 44: R_PPC_ADDR32 \.text\+0x4c 48: 00 00 00 00 \.long 0x0 48: R_PPC_REL32 x 4c: 00 00 00 04 \.long 0x4 4c: R_PPC_REL32 x\+0x4 - \.\.\. + 50: 00 00 00 00 \.long 0x0 50: R_PPC_REL32 z - 54: R_PPC_REL32 y + 54: 00 00 00 04 \.long 0x4 + 54: R_PPC_REL32 \.data\+0x4 + 58: 00 00 00 00 \.long 0x0 58: R_PPC_ADDR32 x - 5c: R_PPC_ADDR32 y + 5c: 00 00 00 04 \.long 0x4 + 5c: R_PPC_ADDR32 \.data\+0x4 + 60: 00 00 00 00 \.long 0x0 60: R_PPC_ADDR32 z 64: ff ff ff fc fnmsub f31,f31,f31,f31 64: R_PPC_ADDR32 x\+0xf+ffffffc - 68: ff ff ff fc fnmsub f31,f31,f31,f31 - 68: R_PPC_ADDR32 y\+0xf+ffffffc + 68: 00 00 00 00 \.long 0x0 + 68: R_PPC_ADDR32 \.data 6c: ff ff ff fc fnmsub f31,f31,f31,f31 6c: R_PPC_ADDR32 z\+0xf+ffffffc 70: 00 00 00 08 \.long 0x8 @@ -59,12 +61,13 @@ Disassembly of section \.text: 78: R_PPC_ADDR32 a 0+000007c : - \.\.\. - 7c: R_PPC_ADDR32 b - 80: R_PPC_ADDR32 apfour + 7c: 00 00 00 7c \.long 0x7c + 7c: R_PPC_ADDR32 \.text\+0x7c + 80: 00 00 00 7c \.long 0x7c + 80: R_PPC_ADDR32 \.text\+0x7c 84: ff ff ff fc fnmsub f31,f31,f31,f31 - 88: 00 00 00 02 \.long 0x2 - 88: R_PPC_ADDR32 apfour\+0x2 + 88: 00 00 00 7e \.long 0x7e + 88: R_PPC_ADDR32 \.text\+0x7e 8c: 00 00 00 00 \.long 0x0 90: 60 00 00 00 nop 94: 40 a5 ff fc ble- cr1,90 diff --git a/gas/testsuite/gas/ppc/astest2_64.d b/gas/testsuite/gas/ppc/astest2_64.d index bc3cddf22e2..356db54eccc 100644 --- a/gas/testsuite/gas/ppc/astest2_64.d +++ b/gas/testsuite/gas/ppc/astest2_64.d @@ -34,16 +34,20 @@ Disassembly of section \.text: 40: R_PPC64_REL32 x 44: 00 00 00 04 \.long 0x4 44: R_PPC64_REL32 x\+0x4 - \.\.\. + 48: 00 00 00 00 \.long 0x0 48: R_PPC64_REL32 z - 4c: R_PPC64_REL32 y + 4c: 00 00 00 04 \.long 0x4 + 4c: R_PPC64_REL32 \.data\+0x4 + 50: 00 00 00 00 \.long 0x0 50: R_PPC64_ADDR32 x - 54: R_PPC64_ADDR32 y + 54: 00 00 00 04 \.long 0x4 + 54: R_PPC64_ADDR32 \.data\+0x4 + 58: 00 00 00 00 \.long 0x0 58: R_PPC64_ADDR32 z 5c: ff ff ff fc fnmsub f31,f31,f31,f31 5c: R_PPC64_ADDR32 x\+0xfffffffffffffffc - 60: ff ff ff fc fnmsub f31,f31,f31,f31 - 60: R_PPC64_ADDR32 y\+0xfffffffffffffffc + 60: 00 00 00 00 \.long 0x0 + 60: R_PPC64_ADDR32 \.data 64: ff ff ff fc fnmsub f31,f31,f31,f31 64: R_PPC64_ADDR32 z\+0xfffffffffffffffc 68: 00 00 00 08 \.long 0x8 @@ -54,12 +58,13 @@ Disassembly of section \.text: 70: R_PPC64_ADDR32 a 0000000000000074 : - \.\.\. - 74: R_PPC64_ADDR32 b - 78: R_PPC64_ADDR32 apfour + 74: 00 00 00 74 \.long 0x74 + 74: R_PPC64_ADDR32 \.text\+0x74 + 78: 00 00 00 74 \.long 0x74 + 78: R_PPC64_ADDR32 \.text\+0x74 7c: ff ff ff fc fnmsub f31,f31,f31,f31 - 80: 00 00 00 02 \.long 0x2 - 80: R_PPC64_ADDR32 apfour\+0x2 + 80: 00 00 00 76 \.long 0x76 + 80: R_PPC64_ADDR32 \.text\+0x76 84: 00 00 00 00 \.long 0x0 Disassembly of section \.data: diff --git a/gas/testsuite/gas/ppc/astest64.d b/gas/testsuite/gas/ppc/astest64.d index d66e72c1be1..d8edf05a339 100644 --- a/gas/testsuite/gas/ppc/astest64.d +++ b/gas/testsuite/gas/ppc/astest64.d @@ -38,27 +38,33 @@ Disassembly of section \.text: 40: R_PPC64_REL32 x 44: 00 00 00 04 \.long 0x4 44: R_PPC64_REL32 x\+0x4 - \.\.\. + 48: 00 00 00 00 \.long 0x0 48: R_PPC64_REL32 z - 4c: R_PPC64_REL32 y + 4c: 00 00 00 04 \.long 0x4 + 4c: R_PPC64_REL32 \.data\+0x4 + 50: 00 00 00 00 \.long 0x0 50: R_PPC64_ADDR32 x - 54: R_PPC64_ADDR32 y + 54: 00 00 00 04 \.long 0x4 + 54: R_PPC64_ADDR32 \.data\+0x4 + 58: 00 00 00 00 \.long 0x0 58: R_PPC64_ADDR32 z 5c: ff ff ff fc fnmsub f31,f31,f31,f31 5c: R_PPC64_ADDR32 x\+0xfffffffffffffffc - 60: ff ff ff fc fnmsub f31,f31,f31,f31 - 60: R_PPC64_ADDR32 y\+0xfffffffffffffffc + 60: 00 00 00 00 \.long 0x0 + 60: R_PPC64_ADDR32 \.data 64: ff ff ff fc fnmsub f31,f31,f31,f31 64: R_PPC64_ADDR32 z\+0xfffffffffffffffc 68: ff ff ff a4 \.long 0xffffffa4 6c: ff ff ff a4 \.long 0xffffffa4 - \.\.\. + 70: 00 00 00 00 \.long 0x0 70: R_PPC64_ADDR32 a - 74: R_PPC64_ADDR32 b - 78: R_PPC64_ADDR32 apfour + 74: 00 00 00 10 \.long 0x10 + 74: R_PPC64_ADDR32 \.text\+0x10 + 78: 00 00 00 10 \.long 0x10 + 78: R_PPC64_ADDR32 \.text\+0x10 7c: ff ff ff fc fnmsub f31,f31,f31,f31 - 80: 00 00 00 02 \.long 0x2 - 80: R_PPC64_ADDR32 apfour\+0x2 + 80: 00 00 00 12 \.long 0x12 + 80: R_PPC64_ADDR32 \.text\+0x12 84: 00 00 00 00 \.long 0x0 Disassembly of section \.data: diff --git a/gas/testsuite/gas/ppc/booke.d b/gas/testsuite/gas/ppc/booke.d index a8d5c57202d..b1327497c12 100644 --- a/gas/testsuite/gas/ppc/booke.d +++ b/gas/testsuite/gas/ppc/booke.d @@ -9,20 +9,20 @@ Disassembly of section \.text: 0+0000000 : 0: 24 25 00 30 bce 1,4\*cr1\+gt,30 4: 24 46 00 3d bcel 2,4\*cr1\+eq,40 - 8: 24 67 00 02 bcea 3,4\*cr1\+so,0 - 8: R_PPC(64)?_ADDR14 branch_target_3 - c: 24 88 00 03 bcela 4,4\*cr2\+lt,0 - c: R_PPC(64)?_ADDR14 branch_target_4 + 8: 24 67 00 52 bcea 3,4\*cr1\+so,50 + 8: R_PPC(64)?_ADDR14 \.text\+0x50 + c: 24 88 00 73 bcela 4,4\*cr2\+lt,70 + c: R_PPC(64)?_ADDR14 \.text\+0x70 10: 4c a9 00 22 bclre 5,4\*cr2\+gt 14: 4c aa 00 23 bclrel 5,4\*cr2\+eq 18: 4d 0b 04 22 bcctre 8,4\*cr2\+so 1c: 4d 0c 04 23 bcctrel 8,4\*cr3\+lt 20: 58 00 00 74 be 94 24: 58 00 00 89 bel ac - 28: 58 00 00 02 bea 0 - 28: R_PPC(64)?_ADDR24 branch_target_7 - 2c: 58 00 00 03 bela 0 - 2c: R_PPC(64)?_ADDR24 branch_target_8 + 28: 58 00 00 f6 bea f4 + 28: R_PPC(64)?_ADDR24 \.text\+0xf4 + 2c: 58 00 01 2b bela 128 + 2c: R_PPC(64)?_ADDR24 \.text\+0x128 0+0000030 : 30: e9 09 00 80 lbze r8,8\(r9\) diff --git a/gas/testsuite/gas/ppc/power4.d b/gas/testsuite/gas/ppc/power4.d index 1bc7dad9231..148e27a3b22 100644 --- a/gas/testsuite/gas/ppc/power4.d +++ b/gas/testsuite/gas/ppc/power4.d @@ -35,13 +35,13 @@ Disassembly of section \.text: 0+ <\.text>: +0: e0 83 00 00 lq r4,0\(r3\) - 2: R_PPC64_ADDR16_LO_DS dsym0 + 2: R_PPC64_ADDR16_LO_DS \.data +4: e0 83 00 00 lq r4,0\(r3\) - 6: R_PPC64_ADDR16_LO_DS dsym1 + 6: R_PPC64_ADDR16_LO_DS \.data\+0x8 +8: e0 83 00 00 lq r4,0\(r3\) - a: R_PPC64_ADDR16_LO_DS usym0 - +c: e0 83 00 00 lq r4,0\(r3\) - e: R_PPC64_ADDR16_LO_DS usym1 + a: R_PPC64_ADDR16_LO_DS \.data\+0x8 + +c: e0 83 00 10 lq r4,16\(r3\) + e: R_PPC64_ADDR16_LO_DS \.data\+0x10 +10: e0 83 00 00 lq r4,0\(r3\) 12: R_PPC64_ADDR16_LO_DS esym0 +14: e0 83 00 00 lq r4,0\(r3\) @@ -63,15 +63,15 @@ Disassembly of section \.text: +34: e0 80 00 00 lq r4,0\(0\) 36: R_PPC64_ADDR16_LO_DS \.text +38: e0 c3 00 00 lq r6,0\(r3\) - 3a: R_PPC64_GOT16_DS dsym0 + 3a: R_PPC64_GOT16_DS \.data +3c: e0 c3 00 00 lq r6,0\(r3\) - 3e: R_PPC64_GOT16_LO_DS dsym0 + 3e: R_PPC64_GOT16_LO_DS \.data +40: e0 c3 00 00 lq r6,0\(r3\) - 42: R_PPC64_PLT16_LO_DS dsym0 + 42: R_PPC64_PLT16_LO_DS \.data +44: e0 c3 00 00 lq r6,0\(r3\) - 46: R_PPC64_SECTOFF_DS dsym1 + 46: R_PPC64_SECTOFF_DS \.data\+0x8 +48: e0 c3 00 00 lq r6,0\(r3\) - 4a: R_PPC64_SECTOFF_LO_DS dsym1 + 4a: R_PPC64_SECTOFF_LO_DS \.data\+0x8 +4c: e0 c4 00 10 lq r6,16\(r4\) +50: f8 c7 00 02 stq r6,0\(r7\) +54: f8 c7 00 12 stq r6,16\(r7\) diff --git a/gas/testsuite/gas/ppc/test1elf32.d b/gas/testsuite/gas/ppc/test1elf32.d index eaf63746ae4..2e76061e849 100644 --- a/gas/testsuite/gas/ppc/test1elf32.d +++ b/gas/testsuite/gas/ppc/test1elf32.d @@ -36,13 +36,13 @@ Disassembly of section \.text: 0+0000 <\.text>: 0: 80 63 00 00 lwz r3,0\(r3\) - 2: R_PPC_ADDR16_LO dsym0 - 4: 80 63 00 00 lwz r3,0\(r3\) - 6: R_PPC_ADDR16_LO dsym1 - 8: 80 63 00 00 lwz r3,0\(r3\) - a: R_PPC_ADDR16_LO usym0 - c: 80 63 00 00 lwz r3,0\(r3\) - e: R_PPC_ADDR16_LO usym1 + 2: R_PPC_ADDR16_LO \.data + 4: 80 63 00 04 lwz r3,4\(r3\) + 6: R_PPC_ADDR16_LO \.data\+0x4 + 8: 80 63 00 04 lwz r3,4\(r3\) + a: R_PPC_ADDR16_LO \.data\+0x4 + c: 80 63 00 08 lwz r3,8\(r3\) + e: R_PPC_ADDR16_LO \.data\+0x8 10: 80 63 00 00 lwz r3,0\(r3\) 12: R_PPC_ADDR16_LO esym0 14: 80 63 00 00 lwz r3,0\(r3\) @@ -54,11 +54,11 @@ Disassembly of section \.text: 28: 38 60 ff fc li r3,-4 2c: 38 60 00 04 li r3,4 30: 38 60 00 00 li r3,0 - 32: R_PPC_ADDR16_LO dsym0 + 32: R_PPC_ADDR16_LO \.data 34: 38 60 00 00 li r3,0 - 36: R_PPC_ADDR16_HI dsym0 + 36: R_PPC_ADDR16_HI \.data 38: 38 60 00 00 li r3,0 - 3a: R_PPC_ADDR16_HA dsym0 + 3a: R_PPC_ADDR16_HA \.data 3c: 38 60 ff fc li r3,-4 40: 38 60 ff ff li r3,-1 44: 38 60 00 00 li r3,0 diff --git a/gas/testsuite/gas/ppc/test1elf64.d b/gas/testsuite/gas/ppc/test1elf64.d index 4c52f808c20..8ea8230aae9 100644 --- a/gas/testsuite/gas/ppc/test1elf64.d +++ b/gas/testsuite/gas/ppc/test1elf64.d @@ -41,13 +41,13 @@ Disassembly of section \.text: 0000000000000000 <\.text>: 0: e8 63 00 00 ld r3,0\(r3\) - 2: R_PPC64_ADDR16_LO_DS dsym0 - 4: e8 63 00 00 ld r3,0\(r3\) - 6: R_PPC64_ADDR16_LO_DS dsym1 - 8: e8 63 00 00 ld r3,0\(r3\) - a: R_PPC64_ADDR16_LO_DS usym0 - c: e8 63 00 00 ld r3,0\(r3\) - e: R_PPC64_ADDR16_LO_DS usym1 + 2: R_PPC64_ADDR16_LO_DS \.data + 4: e8 63 00 08 ld r3,8\(r3\) + 6: R_PPC64_ADDR16_LO_DS \.data\+0x8 + 8: e8 63 00 08 ld r3,8\(r3\) + a: R_PPC64_ADDR16_LO_DS \.data\+0x8 + c: e8 63 00 10 ld r3,16\(r3\) + e: R_PPC64_ADDR16_LO_DS \.data\+0x10 10: e8 63 00 00 ld r3,0\(r3\) 12: R_PPC64_ADDR16_LO_DS esym0 14: e8 63 00 00 ld r3,0\(r3\) @@ -75,19 +75,19 @@ Disassembly of section \.text: 48: 38 60 ff f8 li r3,-8 4c: 38 60 00 08 li r3,8 50: 38 60 00 00 li r3,0 - 52: R_PPC64_ADDR16_LO dsym0 + 52: R_PPC64_ADDR16_LO \.data 54: 38 60 00 00 li r3,0 - 56: R_PPC64_ADDR16_HI dsym0 + 56: R_PPC64_ADDR16_HI \.data 58: 38 60 00 00 li r3,0 - 5a: R_PPC64_ADDR16_HA dsym0 + 5a: R_PPC64_ADDR16_HA \.data 5c: 38 60 00 00 li r3,0 - 5e: R_PPC64_ADDR16_HIGHER dsym0 + 5e: R_PPC64_ADDR16_HIGHER \.data 60: 38 60 00 00 li r3,0 - 62: R_PPC64_ADDR16_HIGHERA dsym0 + 62: R_PPC64_ADDR16_HIGHERA \.data 64: 38 60 00 00 li r3,0 - 66: R_PPC64_ADDR16_HIGHEST dsym0 + 66: R_PPC64_ADDR16_HIGHEST \.data 68: 38 60 00 00 li r3,0 - 6a: R_PPC64_ADDR16_HIGHESTA dsym0 + 6a: R_PPC64_ADDR16_HIGHESTA \.data 6c: 38 60 ff f8 li r3,-8 70: 38 60 ff ff li r3,-1 74: 38 60 00 00 li r3,0 @@ -137,9 +137,15 @@ Disassembly of section \.toc: 0000000000000000 <\.toc>: \.\.\. - 0: R_PPC64_ADDR64 dsym0 - 8: R_PPC64_ADDR64 dsym1 - 10: R_PPC64_ADDR64 usym0 - 18: R_PPC64_ADDR64 usym1 + 0: R_PPC64_ADDR64 \.data + 8: R_PPC64_ADDR64 \.data\+0x8 + c: 00 00 00 08 \.long 0x8 + 10: 00 00 00 00 \.long 0x0 + 10: R_PPC64_ADDR64 \.data\+0x8 + 14: 00 00 00 08 \.long 0x8 + 18: 00 00 00 00 \.long 0x0 + 18: R_PPC64_ADDR64 \.data\+0x10 + 1c: 00 00 00 10 \.long 0x10 + \.\.\. 20: R_PPC64_ADDR64 esym0 28: R_PPC64_ADDR64 esym1