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[AArch64][PATCH 3/3] Add floating-point FP16 instructions
ARMv8.2 adds 16-bit floating point operations as an optional extension to the ARMv8 FP support. This patch adds the new FP16 instructions, making them available when the architecture extension +fp+fp16 is specified. The instructions added are: - Comparisons and conditionals: FCMP, FCCMPE, FCMP, FCMPE and FCSEL. - Arithmetic: FABS, FNEG, FSQRT, FMUL, FDIV, FADD, FSUB, FMADD, FMSUB, FNMADD and FNMSUB. - Rounding: FRINTN, FRINTP, FRINTM, FRINTZ, FRINTA, FRINTX and FRINTI. - Conversions: SCVTF (fixed-point), SCVTF (integer), UCVTF (fixed-point) UCVTF (integer), FCVTZS (fixed-point), FCVTZS (integer), FCVTZU (fixed-point), FCVTZU (integer), FCVTNS, FCVTNU, FCVTAS, FCVTAU, FCVTPS, FCVTPU, FCVTMS and FCVTMU. - Scalar FMOV: immediate, general and register gas/testsuite/ 2015-11-27 Matthew Wahab <matthew.wahab@arm.com> * gas/aarch64/float-fp16.d: New. * gas/aarch64/float-fp16.s: New. opcodes/ 2015-11-27 Matthew Wahab <matthew.wahab@arm.com> * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-opc-2.c: Regenerate. * aarch64-tbl.h (QL_FIX2FP_H, QL_FP2FIX_H): New. (QL_INT2FP_H, QL_FP2INT_H): New. (QL_FP2_H, QL_FP3_H, QL_FP4_H): New (QL_DST_H): New. (QL_FCCMP_H): New. (aarch64_opcode_table): Add 16-bit variants of scvt, ucvtf, fcvtzs, fcvtzu, fcvtns, fcvtnu, scvtf, ucvtf, fcvtas, fcvtau, fmov, fcvtpos, fcvtpu, fcvtms, fcvtmu, fcvtzs, fcvtzu, fccmp, fccmpe, fcmp, fcmpe, fabs, fneg, fsqrt, frintn, frintp, frintm, frintz, frinta, frintx, frinti, fmul, fdiv, fadd, fsub, fmax, fmin, fmaxnm, fminnm, fnmul, fmadd, fmsub, fnmadd, fnmsub and fcsel. Change-Id: Ie6d40bd1b215a9bc024e12ba75e52afbe1675eb7
This commit is contained in:
Matthew Wahab
parent
cf86120bae
commit
622b9eb1a6
@ -1,3 +1,8 @@
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2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
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* gas/aarch64/float-fp16.d: New.
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* gas/aarch64/float-fp16.s: New.
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2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
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* gas/aarch64/alias-2.d: Add tests for REV.
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172
gas/testsuite/gas/aarch64/float-fp16.d
Normal file
172
gas/testsuite/gas/aarch64/float-fp16.d
Normal file
@ -0,0 +1,172 @@
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#as: -march=armv8.2-a+fp16
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#objdump: -dr
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.*: file format .*
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Disassembly of section \.text:
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0000000000000000 <.*>:
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[0-9a-f]+: 1e200400 fccmp s0, s0, #0x0, eq
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[0-9a-f]+: 1ee00400 fccmp h0, h0, #0x0, eq
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[0-9a-f]+: 1e22d420 fccmp s1, s2, #0x0, le
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[0-9a-f]+: 1ee2d420 fccmp h1, h2, #0x0, le
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[0-9a-f]+: 1e200410 fccmpe s0, s0, #0x0, eq
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[0-9a-f]+: 1ee00410 fccmpe h0, h0, #0x0, eq
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[0-9a-f]+: 1e22d430 fccmpe s1, s2, #0x0, le
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[0-9a-f]+: 1ee2d430 fccmpe h1, h2, #0x0, le
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[0-9a-f]+: 1e202000 fcmp s0, s0
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[0-9a-f]+: 1ee02000 fcmp h0, h0
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[0-9a-f]+: 1e222020 fcmp s1, s2
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[0-9a-f]+: 1ee22020 fcmp h1, h2
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[0-9a-f]+: 1e202010 fcmpe s0, s0
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[0-9a-f]+: 1ee02010 fcmpe h0, h0
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[0-9a-f]+: 1e222030 fcmpe s1, s2
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[0-9a-f]+: 1ee22030 fcmpe h1, h2
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[0-9a-f]+: 1e202008 fcmp s0, #0\.0
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[0-9a-f]+: 1ee02008 fcmp h0, #0\.0
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[0-9a-f]+: 1e202018 fcmpe s0, #0\.0
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[0-9a-f]+: 1ee02018 fcmpe h0, #0\.0
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[0-9a-f]+: 1e210c00 fcsel s0, s0, s1, eq
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[0-9a-f]+: 1ee10c00 fcsel h0, h0, h1, eq
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[0-9a-f]+: 9ee60000 fmov x0, h0
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[0-9a-f]+: 1ee60000 fmov w0, h0
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[0-9a-f]+: 9ee70001 fmov h1, x0
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[0-9a-f]+: 1ee70001 fmov h1, w0
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[0-9a-f]+: 1ee0c020 fabs h0, h1
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[0-9a-f]+: 1e20c020 fabs s0, s1
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[0-9a-f]+: 1e60c020 fabs d0, d1
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[0-9a-f]+: 1ee14020 fneg h0, h1
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[0-9a-f]+: 1e214020 fneg s0, s1
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[0-9a-f]+: 1e614020 fneg d0, d1
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[0-9a-f]+: 1ee1c020 fsqrt h0, h1
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[0-9a-f]+: 1e21c020 fsqrt s0, s1
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[0-9a-f]+: 1e61c020 fsqrt d0, d1
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[0-9a-f]+: 1ee44020 frintn h0, h1
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[0-9a-f]+: 1e244020 frintn s0, s1
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[0-9a-f]+: 1e644020 frintn d0, d1
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[0-9a-f]+: 1ee4c020 frintp h0, h1
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[0-9a-f]+: 1e24c020 frintp s0, s1
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[0-9a-f]+: 1e64c020 frintp d0, d1
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[0-9a-f]+: 1ee54020 frintm h0, h1
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[0-9a-f]+: 1e254020 frintm s0, s1
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[0-9a-f]+: 1e654020 frintm d0, d1
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[0-9a-f]+: 1ee5c020 frintz h0, h1
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[0-9a-f]+: 1e25c020 frintz s0, s1
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[0-9a-f]+: 1e65c020 frintz d0, d1
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[0-9a-f]+: 1ee64020 frinta h0, h1
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[0-9a-f]+: 1e264020 frinta s0, s1
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[0-9a-f]+: 1e664020 frinta d0, d1
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[0-9a-f]+: 1ee74020 frintx h0, h1
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[0-9a-f]+: 1e274020 frintx s0, s1
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[0-9a-f]+: 1e674020 frintx d0, d1
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[0-9a-f]+: 1ee7c020 frinti h0, h1
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[0-9a-f]+: 1e27c020 frinti s0, s1
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[0-9a-f]+: 1e67c020 frinti d0, d1
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[0-9a-f]+: 1ee20820 fmul h0, h1, h2
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[0-9a-f]+: 1e220820 fmul s0, s1, s2
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[0-9a-f]+: 1e620820 fmul d0, d1, d2
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[0-9a-f]+: 1ee21820 fdiv h0, h1, h2
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[0-9a-f]+: 1e221820 fdiv s0, s1, s2
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[0-9a-f]+: 1e621820 fdiv d0, d1, d2
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[0-9a-f]+: 1ee22820 fadd h0, h1, h2
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[0-9a-f]+: 1e222820 fadd s0, s1, s2
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[0-9a-f]+: 1e622820 fadd d0, d1, d2
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[0-9a-f]+: 1ee23820 fsub h0, h1, h2
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[0-9a-f]+: 1e223820 fsub s0, s1, s2
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[0-9a-f]+: 1e623820 fsub d0, d1, d2
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[0-9a-f]+: 1ee24820 fmax h0, h1, h2
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[0-9a-f]+: 1e224820 fmax s0, s1, s2
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[0-9a-f]+: 1e624820 fmax d0, d1, d2
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[0-9a-f]+: 1ee25820 fmin h0, h1, h2
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[0-9a-f]+: 1e225820 fmin s0, s1, s2
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[0-9a-f]+: 1e625820 fmin d0, d1, d2
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[0-9a-f]+: 1ee26820 fmaxnm h0, h1, h2
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[0-9a-f]+: 1e226820 fmaxnm s0, s1, s2
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[0-9a-f]+: 1e626820 fmaxnm d0, d1, d2
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[0-9a-f]+: 1ee27820 fminnm h0, h1, h2
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[0-9a-f]+: 1e227820 fminnm s0, s1, s2
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[0-9a-f]+: 1e627820 fminnm d0, d1, d2
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[0-9a-f]+: 1ee28820 fnmul h0, h1, h2
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[0-9a-f]+: 1e228820 fnmul s0, s1, s2
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[0-9a-f]+: 1e628820 fnmul d0, d1, d2
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[0-9a-f]+: 1fc20c20 fmadd h0, h1, h2, h3
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[0-9a-f]+: 1f020c20 fmadd s0, s1, s2, s3
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[0-9a-f]+: 1f420c20 fmadd d0, d1, d2, d3
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[0-9a-f]+: 1fc28c20 fmsub h0, h1, h2, h3
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[0-9a-f]+: 1f028c20 fmsub s0, s1, s2, s3
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[0-9a-f]+: 1f428c20 fmsub d0, d1, d2, d3
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[0-9a-f]+: 1fe20c20 fnmadd h0, h1, h2, h3
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[0-9a-f]+: 1f220c20 fnmadd s0, s1, s2, s3
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[0-9a-f]+: 1f620c20 fnmadd d0, d1, d2, d3
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[0-9a-f]+: 1fe28c20 fnmsub h0, h1, h2, h3
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[0-9a-f]+: 1f228c20 fnmsub s0, s1, s2, s3
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[0-9a-f]+: 1f628c20 fnmsub d0, d1, d2, d3
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[0-9a-f]+: 1e2e1000 fmov s0, #1\.000000000000000000e\+00
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[0-9a-f]+: 1eee1000 fmov h0, #1\.000000000000000000e\+00
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[0-9a-f]+: 1e02f820 scvtf s0, w1, #2
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[0-9a-f]+: 9e02f420 scvtf s0, x1, #3
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[0-9a-f]+: 1ec2f820 scvtf h0, w1, #2
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[0-9a-f]+: 9ec2f420 scvtf h0, x1, #3
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[0-9a-f]+: 1e03f820 ucvtf s0, w1, #2
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[0-9a-f]+: 9e03f420 ucvtf s0, x1, #3
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[0-9a-f]+: 1ec3f820 ucvtf h0, w1, #2
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[0-9a-f]+: 9ec3f420 ucvtf h0, x1, #3
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[0-9a-f]+: 1e58f801 fcvtzs w1, d0, #2
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[0-9a-f]+: 9e58f401 fcvtzs x1, d0, #3
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[0-9a-f]+: 1ed8f801 fcvtzs w1, h0, #2
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[0-9a-f]+: 9ed8f401 fcvtzs x1, h0, #3
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[0-9a-f]+: 1e59f801 fcvtzu w1, d0, #2
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[0-9a-f]+: 9e59f401 fcvtzu x1, d0, #3
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[0-9a-f]+: 1ed9f801 fcvtzu w1, h0, #2
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[0-9a-f]+: 9ed9f401 fcvtzu x1, h0, #3
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[0-9a-f]+: 1e200001 fcvtns w1, s0
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[0-9a-f]+: 9e600001 fcvtns x1, d0
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[0-9a-f]+: 1ee00001 fcvtns w1, h0
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[0-9a-f]+: 9ee00001 fcvtns x1, h0
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[0-9a-f]+: 1e210001 fcvtnu w1, s0
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[0-9a-f]+: 9e610001 fcvtnu x1, d0
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[0-9a-f]+: 1ee10001 fcvtnu w1, h0
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[0-9a-f]+: 9ee10001 fcvtnu x1, h0
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[0-9a-f]+: 1e250001 fcvtau w1, s0
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[0-9a-f]+: 9e650001 fcvtau x1, d0
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[0-9a-f]+: 1ee50001 fcvtau w1, h0
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[0-9a-f]+: 9ee50001 fcvtau x1, h0
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[0-9a-f]+: 1e240001 fcvtas w1, s0
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[0-9a-f]+: 9e640001 fcvtas x1, d0
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[0-9a-f]+: 1ee40001 fcvtas w1, h0
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[0-9a-f]+: 9ee40001 fcvtas x1, h0
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[0-9a-f]+: 1e280001 fcvtps w1, s0
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[0-9a-f]+: 9e680001 fcvtps x1, d0
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[0-9a-f]+: 1ee80001 fcvtps w1, h0
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[0-9a-f]+: 9ee80001 fcvtps x1, h0
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[0-9a-f]+: 1e290001 fcvtpu w1, s0
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[0-9a-f]+: 9e690001 fcvtpu x1, d0
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[0-9a-f]+: 1ee90001 fcvtpu w1, h0
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[0-9a-f]+: 9ee90001 fcvtpu x1, h0
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[0-9a-f]+: 1e300001 fcvtms w1, s0
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[0-9a-f]+: 9e700001 fcvtms x1, d0
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[0-9a-f]+: 1ef00001 fcvtms w1, h0
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[0-9a-f]+: 9ef00001 fcvtms x1, h0
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[0-9a-f]+: 1e310001 fcvtmu w1, s0
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[0-9a-f]+: 9e710001 fcvtmu x1, d0
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[0-9a-f]+: 1ef10001 fcvtmu w1, h0
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[0-9a-f]+: 9ef10001 fcvtmu x1, h0
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[0-9a-f]+: 1e220020 scvtf s0, w1
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[0-9a-f]+: 9e620020 scvtf d0, x1
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[0-9a-f]+: 1ee20020 scvtf h0, w1
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[0-9a-f]+: 9ee20020 scvtf h0, x1
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[0-9a-f]+: 1e230020 ucvtf s0, w1
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[0-9a-f]+: 9e630020 ucvtf d0, x1
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[0-9a-f]+: 1ee30020 ucvtf h0, w1
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[0-9a-f]+: 9ee30020 ucvtf h0, x1
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[0-9a-f]+: 1e604020 fmov d0, d1
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[0-9a-f]+: 1e204020 fmov s0, s1
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[0-9a-f]+: 1ee04020 fmov h0, h1
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[0-9a-f]+: 9ee60020 fmov x0, h1
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[0-9a-f]+: 1ee60020 fmov w0, h1
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[0-9a-f]+: 9ee70001 fmov h1, x0
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[0-9a-f]+: 1ee70001 fmov h1, w0
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[0-9a-f]+: 1e260020 fmov w0, s1
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[0-9a-f]+: 9e660020 fmov x0, d1
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[0-9a-f]+: 1e270001 fmov s1, w0
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[0-9a-f]+: 9e670001 fmov d1, x0
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151
gas/testsuite/gas/aarch64/float-fp16.s
Normal file
151
gas/testsuite/gas/aarch64/float-fp16.s
Normal file
@ -0,0 +1,151 @@
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/* Test file for AArch64 half-precision floating-point instructions. */
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.text
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fccmp s0, s0, #0, eq
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fccmp h0, h0, #0, eq
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fccmp s1, s2, #0, le
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fccmp h1, h2, #0, le
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fccmpe s0, s0, #0, eq
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fccmpe h0, h0, #0, eq
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fccmpe s1, s2, #0, le
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fccmpe h1, h2, #0, le
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fcmp s0, s0
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fcmp h0, h0
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fcmp s1, s2
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fcmp h1, h2
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fcmpe s0, s0
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fcmpe h0, h0
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fcmpe s1, s2
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fcmpe h1, h2
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fcmp s0, #0.0
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fcmp h0, #0.0
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fcmpe s0, #0.0
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fcmpe h0, #0.0
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fcsel s0, s0, s1, eq
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fcsel h0, h0, h1, eq
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fmov x0, h0
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fmov w0, h0
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fmov h1, x0
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fmov h1, w0
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/* Scalar data-processing with one source. */
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.macro sdp1src op
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\op h0, h1
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\op s0, s1
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\op d0, d1
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.endm
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.text
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.irp op, fabs, fneg, fsqrt, frintn, frintp, frintm, frintz
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sdp1src \op
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.endr
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.irp op, frinta, frintx, frinti
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sdp1src \op
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.endr
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/* Scalar data-processing with two sources. */
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.macro sdp2src op
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\op h0, h1, h2
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\op s0, s1, s2
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\op d0, d1, d2
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.endm
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.text
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.irp op, fmul, fdiv, fadd, fsub, fmax, fmin, fmaxnm, fminnm, fnmul
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sdp2src \op
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.endr
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/* Scalar data-processing with three sources. */
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.macro sdp3src op
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\op h0, h1, h2, h3
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\op s0, s1, s2, s3
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\op d0, d1, d2, d3
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.endm
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.text
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.irp op, fmadd, fmsub, fnmadd, fnmsub
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sdp3src \op
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.endr
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/* Scalar conversion. */
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.macro scvt_fix2fp op
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\op s0, w1, #2
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\op s0, x1, #3
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\op h0, w1, #2
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\op h0, x1, #3
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.endm
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.macro scvt_fp2fix op
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\op w1, d0, #2
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\op x1, d0, #3
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\op w1, h0, #2
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\op x1, h0, #3
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.endm
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.text
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fmov s0, #1.0
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fmov h0, #1.0
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.irp op, scvtf, ucvtf
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scvt_fix2fp \op
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.endr
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.irp op, fcvtzs, fcvtzu
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scvt_fp2fix \op
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.endr
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.macro scvt_fp2int op
|
||||
\op w1, s0
|
||||
\op x1, d0
|
||||
\op w1, h0
|
||||
\op x1, h0
|
||||
.endm
|
||||
|
||||
.macro scvt_int2fp op
|
||||
\op s0, w1
|
||||
\op d0, x1
|
||||
\op h0, w1
|
||||
\op h0, x1
|
||||
.endm
|
||||
|
||||
.text
|
||||
.irp op, fcvtns, fcvtnu, fcvtau, fcvtas
|
||||
scvt_fp2int \op
|
||||
.endr
|
||||
|
||||
.text
|
||||
.irp op, fcvtps, fcvtpu, fcvtms, fcvtmu
|
||||
scvt_fp2int \op
|
||||
.endr
|
||||
|
||||
.irp op, scvtf, ucvtf
|
||||
scvt_int2fp \op
|
||||
.endr
|
||||
|
||||
/* FMOV. */
|
||||
|
||||
fmov d0, d1
|
||||
fmov s0, s1
|
||||
fmov h0, h1
|
||||
|
||||
fmov x0, h1
|
||||
fmov w0, h1
|
||||
|
||||
fmov h1, x0
|
||||
fmov h1, w0
|
||||
|
||||
fmov w0, s1
|
||||
fmov x0, d1
|
||||
|
||||
fmov s1, w0
|
||||
fmov d1, x0
|
||||
@ -1,3 +1,21 @@
|
||||
2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
|
||||
|
||||
* aarch64-asm-2.c: Regenerate.
|
||||
* aarch64-dis-2.c: Regenerate.
|
||||
* aarch64-opc-2.c: Regenerate.
|
||||
* aarch64-tbl.h (QL_FIX2FP_H, QL_FP2FIX_H): New.
|
||||
(QL_INT2FP_H, QL_FP2INT_H): New.
|
||||
(QL_FP2_H, QL_FP3_H, QL_FP4_H): New
|
||||
(QL_DST_H): New.
|
||||
(QL_FCCMP_H): New.
|
||||
(aarch64_opcode_table): Add 16-bit variants of scvt, ucvtf,
|
||||
fcvtzs, fcvtzu, fcvtns, fcvtnu, scvtf, ucvtf, fcvtas, fcvtau,
|
||||
fmov, fcvtpos, fcvtpu, fcvtms, fcvtmu, fcvtzs, fcvtzu, fccmp,
|
||||
fccmpe, fcmp, fcmpe, fabs, fneg, fsqrt, frintn, frintp, frintm,
|
||||
frintz, frinta, frintx, frinti, fmul, fdiv, fadd, fsub, fmax,
|
||||
fmin, fmaxnm, fminnm, fnmul, fmadd, fmsub, fnmadd, fnmsub and
|
||||
fcsel.
|
||||
|
||||
2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
|
||||
|
||||
* aarch64-opc.c (half_conv_t): New.
|
||||
|
||||
@ -197,246 +197,246 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
|
||||
case 604: /* extr */
|
||||
value = 604; /* --> extr. */
|
||||
break;
|
||||
case 762: /* bic */
|
||||
case 761: /* and */
|
||||
value = 761; /* --> and. */
|
||||
case 812: /* bic */
|
||||
case 811: /* and */
|
||||
value = 811; /* --> and. */
|
||||
break;
|
||||
case 764: /* mov */
|
||||
case 763: /* orr */
|
||||
value = 763; /* --> orr. */
|
||||
case 814: /* mov */
|
||||
case 813: /* orr */
|
||||
value = 813; /* --> orr. */
|
||||
break;
|
||||
case 767: /* tst */
|
||||
case 766: /* ands */
|
||||
value = 766; /* --> ands. */
|
||||
case 817: /* tst */
|
||||
case 816: /* ands */
|
||||
value = 816; /* --> ands. */
|
||||
break;
|
||||
case 772: /* uxtw */
|
||||
case 771: /* mov */
|
||||
case 770: /* orr */
|
||||
value = 770; /* --> orr. */
|
||||
case 822: /* uxtw */
|
||||
case 821: /* mov */
|
||||
case 820: /* orr */
|
||||
value = 820; /* --> orr. */
|
||||
break;
|
||||
case 774: /* mvn */
|
||||
case 773: /* orn */
|
||||
value = 773; /* --> orn. */
|
||||
case 824: /* mvn */
|
||||
case 823: /* orn */
|
||||
value = 823; /* --> orn. */
|
||||
break;
|
||||
case 778: /* tst */
|
||||
case 777: /* ands */
|
||||
value = 777; /* --> ands. */
|
||||
case 828: /* tst */
|
||||
case 827: /* ands */
|
||||
value = 827; /* --> ands. */
|
||||
break;
|
||||
case 904: /* staddb */
|
||||
case 808: /* ldaddb */
|
||||
value = 808; /* --> ldaddb. */
|
||||
case 954: /* staddb */
|
||||
case 858: /* ldaddb */
|
||||
value = 858; /* --> ldaddb. */
|
||||
break;
|
||||
case 905: /* staddh */
|
||||
case 809: /* ldaddh */
|
||||
value = 809; /* --> ldaddh. */
|
||||
case 955: /* staddh */
|
||||
case 859: /* ldaddh */
|
||||
value = 859; /* --> ldaddh. */
|
||||
break;
|
||||
case 906: /* stadd */
|
||||
case 810: /* ldadd */
|
||||
value = 810; /* --> ldadd. */
|
||||
case 956: /* stadd */
|
||||
case 860: /* ldadd */
|
||||
value = 860; /* --> ldadd. */
|
||||
break;
|
||||
case 907: /* staddlb */
|
||||
case 812: /* ldaddlb */
|
||||
value = 812; /* --> ldaddlb. */
|
||||
case 957: /* staddlb */
|
||||
case 862: /* ldaddlb */
|
||||
value = 862; /* --> ldaddlb. */
|
||||
break;
|
||||
case 908: /* staddlh */
|
||||
case 815: /* ldaddlh */
|
||||
value = 815; /* --> ldaddlh. */
|
||||
case 958: /* staddlh */
|
||||
case 865: /* ldaddlh */
|
||||
value = 865; /* --> ldaddlh. */
|
||||
break;
|
||||
case 909: /* staddl */
|
||||
case 818: /* ldaddl */
|
||||
value = 818; /* --> ldaddl. */
|
||||
case 959: /* staddl */
|
||||
case 868: /* ldaddl */
|
||||
value = 868; /* --> ldaddl. */
|
||||
break;
|
||||
case 910: /* stclrb */
|
||||
case 820: /* ldclrb */
|
||||
value = 820; /* --> ldclrb. */
|
||||
case 960: /* stclrb */
|
||||
case 870: /* ldclrb */
|
||||
value = 870; /* --> ldclrb. */
|
||||
break;
|
||||
case 911: /* stclrh */
|
||||
case 821: /* ldclrh */
|
||||
value = 821; /* --> ldclrh. */
|
||||
case 961: /* stclrh */
|
||||
case 871: /* ldclrh */
|
||||
value = 871; /* --> ldclrh. */
|
||||
break;
|
||||
case 912: /* stclr */
|
||||
case 822: /* ldclr */
|
||||
value = 822; /* --> ldclr. */
|
||||
case 962: /* stclr */
|
||||
case 872: /* ldclr */
|
||||
value = 872; /* --> ldclr. */
|
||||
break;
|
||||
case 913: /* stclrlb */
|
||||
case 824: /* ldclrlb */
|
||||
value = 824; /* --> ldclrlb. */
|
||||
case 963: /* stclrlb */
|
||||
case 874: /* ldclrlb */
|
||||
value = 874; /* --> ldclrlb. */
|
||||
break;
|
||||
case 914: /* stclrlh */
|
||||
case 827: /* ldclrlh */
|
||||
value = 827; /* --> ldclrlh. */
|
||||
case 964: /* stclrlh */
|
||||
case 877: /* ldclrlh */
|
||||
value = 877; /* --> ldclrlh. */
|
||||
break;
|
||||
case 915: /* stclrl */
|
||||
case 830: /* ldclrl */
|
||||
value = 830; /* --> ldclrl. */
|
||||
case 965: /* stclrl */
|
||||
case 880: /* ldclrl */
|
||||
value = 880; /* --> ldclrl. */
|
||||
break;
|
||||
case 916: /* steorb */
|
||||
case 832: /* ldeorb */
|
||||
value = 832; /* --> ldeorb. */
|
||||
case 966: /* steorb */
|
||||
case 882: /* ldeorb */
|
||||
value = 882; /* --> ldeorb. */
|
||||
break;
|
||||
case 917: /* steorh */
|
||||
case 833: /* ldeorh */
|
||||
value = 833; /* --> ldeorh. */
|
||||
case 967: /* steorh */
|
||||
case 883: /* ldeorh */
|
||||
value = 883; /* --> ldeorh. */
|
||||
break;
|
||||
case 918: /* steor */
|
||||
case 834: /* ldeor */
|
||||
value = 834; /* --> ldeor. */
|
||||
case 968: /* steor */
|
||||
case 884: /* ldeor */
|
||||
value = 884; /* --> ldeor. */
|
||||
break;
|
||||
case 919: /* steorlb */
|
||||
case 836: /* ldeorlb */
|
||||
value = 836; /* --> ldeorlb. */
|
||||
case 969: /* steorlb */
|
||||
case 886: /* ldeorlb */
|
||||
value = 886; /* --> ldeorlb. */
|
||||
break;
|
||||
case 920: /* steorlh */
|
||||
case 839: /* ldeorlh */
|
||||
value = 839; /* --> ldeorlh. */
|
||||
case 970: /* steorlh */
|
||||
case 889: /* ldeorlh */
|
||||
value = 889; /* --> ldeorlh. */
|
||||
break;
|
||||
case 921: /* steorl */
|
||||
case 842: /* ldeorl */
|
||||
value = 842; /* --> ldeorl. */
|
||||
case 971: /* steorl */
|
||||
case 892: /* ldeorl */
|
||||
value = 892; /* --> ldeorl. */
|
||||
break;
|
||||
case 922: /* stsetb */
|
||||
case 844: /* ldsetb */
|
||||
value = 844; /* --> ldsetb. */
|
||||
case 972: /* stsetb */
|
||||
case 894: /* ldsetb */
|
||||
value = 894; /* --> ldsetb. */
|
||||
break;
|
||||
case 923: /* stseth */
|
||||
case 845: /* ldseth */
|
||||
value = 845; /* --> ldseth. */
|
||||
case 973: /* stseth */
|
||||
case 895: /* ldseth */
|
||||
value = 895; /* --> ldseth. */
|
||||
break;
|
||||
case 924: /* stset */
|
||||
case 846: /* ldset */
|
||||
value = 846; /* --> ldset. */
|
||||
case 974: /* stset */
|
||||
case 896: /* ldset */
|
||||
value = 896; /* --> ldset. */
|
||||
break;
|
||||
case 925: /* stsetlb */
|
||||
case 848: /* ldsetlb */
|
||||
value = 848; /* --> ldsetlb. */
|
||||
case 975: /* stsetlb */
|
||||
case 898: /* ldsetlb */
|
||||
value = 898; /* --> ldsetlb. */
|
||||
break;
|
||||
case 926: /* stsetlh */
|
||||
case 851: /* ldsetlh */
|
||||
value = 851; /* --> ldsetlh. */
|
||||
case 976: /* stsetlh */
|
||||
case 901: /* ldsetlh */
|
||||
value = 901; /* --> ldsetlh. */
|
||||
break;
|
||||
case 927: /* stsetl */
|
||||
case 854: /* ldsetl */
|
||||
value = 854; /* --> ldsetl. */
|
||||
case 977: /* stsetl */
|
||||
case 904: /* ldsetl */
|
||||
value = 904; /* --> ldsetl. */
|
||||
break;
|
||||
case 928: /* stsmaxb */
|
||||
case 856: /* ldsmaxb */
|
||||
value = 856; /* --> ldsmaxb. */
|
||||
case 978: /* stsmaxb */
|
||||
case 906: /* ldsmaxb */
|
||||
value = 906; /* --> ldsmaxb. */
|
||||
break;
|
||||
case 929: /* stsmaxh */
|
||||
case 857: /* ldsmaxh */
|
||||
value = 857; /* --> ldsmaxh. */
|
||||
case 979: /* stsmaxh */
|
||||
case 907: /* ldsmaxh */
|
||||
value = 907; /* --> ldsmaxh. */
|
||||
break;
|
||||
case 930: /* stsmax */
|
||||
case 858: /* ldsmax */
|
||||
value = 858; /* --> ldsmax. */
|
||||
case 980: /* stsmax */
|
||||
case 908: /* ldsmax */
|
||||
value = 908; /* --> ldsmax. */
|
||||
break;
|
||||
case 931: /* stsmaxlb */
|
||||
case 860: /* ldsmaxlb */
|
||||
value = 860; /* --> ldsmaxlb. */
|
||||
case 981: /* stsmaxlb */
|
||||
case 910: /* ldsmaxlb */
|
||||
value = 910; /* --> ldsmaxlb. */
|
||||
break;
|
||||
case 932: /* stsmaxlh */
|
||||
case 863: /* ldsmaxlh */
|
||||
value = 863; /* --> ldsmaxlh. */
|
||||
case 982: /* stsmaxlh */
|
||||
case 913: /* ldsmaxlh */
|
||||
value = 913; /* --> ldsmaxlh. */
|
||||
break;
|
||||
case 933: /* stsmaxl */
|
||||
case 866: /* ldsmaxl */
|
||||
value = 866; /* --> ldsmaxl. */
|
||||
case 983: /* stsmaxl */
|
||||
case 916: /* ldsmaxl */
|
||||
value = 916; /* --> ldsmaxl. */
|
||||
break;
|
||||
case 934: /* stsminb */
|
||||
case 868: /* ldsminb */
|
||||
value = 868; /* --> ldsminb. */
|
||||
case 984: /* stsminb */
|
||||
case 918: /* ldsminb */
|
||||
value = 918; /* --> ldsminb. */
|
||||
break;
|
||||
case 935: /* stsminh */
|
||||
case 869: /* ldsminh */
|
||||
value = 869; /* --> ldsminh. */
|
||||
case 985: /* stsminh */
|
||||
case 919: /* ldsminh */
|
||||
value = 919; /* --> ldsminh. */
|
||||
break;
|
||||
case 936: /* stsmin */
|
||||
case 870: /* ldsmin */
|
||||
value = 870; /* --> ldsmin. */
|
||||
case 986: /* stsmin */
|
||||
case 920: /* ldsmin */
|
||||
value = 920; /* --> ldsmin. */
|
||||
break;
|
||||
case 937: /* stsminlb */
|
||||
case 872: /* ldsminlb */
|
||||
value = 872; /* --> ldsminlb. */
|
||||
case 987: /* stsminlb */
|
||||
case 922: /* ldsminlb */
|
||||
value = 922; /* --> ldsminlb. */
|
||||
break;
|
||||
case 938: /* stsminlh */
|
||||
case 875: /* ldsminlh */
|
||||
value = 875; /* --> ldsminlh. */
|
||||
case 988: /* stsminlh */
|
||||
case 925: /* ldsminlh */
|
||||
value = 925; /* --> ldsminlh. */
|
||||
break;
|
||||
case 939: /* stsminl */
|
||||
case 878: /* ldsminl */
|
||||
value = 878; /* --> ldsminl. */
|
||||
case 989: /* stsminl */
|
||||
case 928: /* ldsminl */
|
||||
value = 928; /* --> ldsminl. */
|
||||
break;
|
||||
case 940: /* stumaxb */
|
||||
case 880: /* ldumaxb */
|
||||
value = 880; /* --> ldumaxb. */
|
||||
case 990: /* stumaxb */
|
||||
case 930: /* ldumaxb */
|
||||
value = 930; /* --> ldumaxb. */
|
||||
break;
|
||||
case 941: /* stumaxh */
|
||||
case 881: /* ldumaxh */
|
||||
value = 881; /* --> ldumaxh. */
|
||||
case 991: /* stumaxh */
|
||||
case 931: /* ldumaxh */
|
||||
value = 931; /* --> ldumaxh. */
|
||||
break;
|
||||
case 942: /* stumax */
|
||||
case 882: /* ldumax */
|
||||
value = 882; /* --> ldumax. */
|
||||
case 992: /* stumax */
|
||||
case 932: /* ldumax */
|
||||
value = 932; /* --> ldumax. */
|
||||
break;
|
||||
case 943: /* stumaxlb */
|
||||
case 884: /* ldumaxlb */
|
||||
value = 884; /* --> ldumaxlb. */
|
||||
case 993: /* stumaxlb */
|
||||
case 934: /* ldumaxlb */
|
||||
value = 934; /* --> ldumaxlb. */
|
||||
break;
|
||||
case 944: /* stumaxlh */
|
||||
case 887: /* ldumaxlh */
|
||||
value = 887; /* --> ldumaxlh. */
|
||||
case 994: /* stumaxlh */
|
||||
case 937: /* ldumaxlh */
|
||||
value = 937; /* --> ldumaxlh. */
|
||||
break;
|
||||
case 945: /* stumaxl */
|
||||
case 890: /* ldumaxl */
|
||||
value = 890; /* --> ldumaxl. */
|
||||
case 995: /* stumaxl */
|
||||
case 940: /* ldumaxl */
|
||||
value = 940; /* --> ldumaxl. */
|
||||
break;
|
||||
case 946: /* stuminb */
|
||||
case 892: /* lduminb */
|
||||
value = 892; /* --> lduminb. */
|
||||
case 996: /* stuminb */
|
||||
case 942: /* lduminb */
|
||||
value = 942; /* --> lduminb. */
|
||||
break;
|
||||
case 947: /* stuminh */
|
||||
case 893: /* lduminh */
|
||||
value = 893; /* --> lduminh. */
|
||||
case 997: /* stuminh */
|
||||
case 943: /* lduminh */
|
||||
value = 943; /* --> lduminh. */
|
||||
break;
|
||||
case 948: /* stumin */
|
||||
case 894: /* ldumin */
|
||||
value = 894; /* --> ldumin. */
|
||||
case 998: /* stumin */
|
||||
case 944: /* ldumin */
|
||||
value = 944; /* --> ldumin. */
|
||||
break;
|
||||
case 949: /* stuminlb */
|
||||
case 896: /* lduminlb */
|
||||
value = 896; /* --> lduminlb. */
|
||||
case 999: /* stuminlb */
|
||||
case 946: /* lduminlb */
|
||||
value = 946; /* --> lduminlb. */
|
||||
break;
|
||||
case 950: /* stuminlh */
|
||||
case 899: /* lduminlh */
|
||||
value = 899; /* --> lduminlh. */
|
||||
case 1000: /* stuminlh */
|
||||
case 949: /* lduminlh */
|
||||
value = 949; /* --> lduminlh. */
|
||||
break;
|
||||
case 951: /* stuminl */
|
||||
case 902: /* lduminl */
|
||||
value = 902; /* --> lduminl. */
|
||||
case 1001: /* stuminl */
|
||||
case 952: /* lduminl */
|
||||
value = 952; /* --> lduminl. */
|
||||
break;
|
||||
case 953: /* mov */
|
||||
case 952: /* movn */
|
||||
value = 952; /* --> movn. */
|
||||
case 1003: /* mov */
|
||||
case 1002: /* movn */
|
||||
value = 1002; /* --> movn. */
|
||||
break;
|
||||
case 955: /* mov */
|
||||
case 954: /* movz */
|
||||
value = 954; /* --> movz. */
|
||||
case 1005: /* mov */
|
||||
case 1004: /* movz */
|
||||
value = 1004; /* --> movz. */
|
||||
break;
|
||||
case 966: /* sevl */
|
||||
case 965: /* sev */
|
||||
case 964: /* wfi */
|
||||
case 963: /* wfe */
|
||||
case 962: /* yield */
|
||||
case 961: /* nop */
|
||||
case 960: /* hint */
|
||||
value = 960; /* --> hint. */
|
||||
case 1016: /* sevl */
|
||||
case 1015: /* sev */
|
||||
case 1014: /* wfi */
|
||||
case 1013: /* wfe */
|
||||
case 1012: /* yield */
|
||||
case 1011: /* nop */
|
||||
case 1010: /* hint */
|
||||
value = 1010; /* --> hint. */
|
||||
break;
|
||||
case 975: /* tlbi */
|
||||
case 974: /* ic */
|
||||
case 973: /* dc */
|
||||
case 972: /* at */
|
||||
case 971: /* sys */
|
||||
value = 971; /* --> sys. */
|
||||
case 1025: /* tlbi */
|
||||
case 1024: /* ic */
|
||||
case 1023: /* dc */
|
||||
case 1022: /* at */
|
||||
case 1021: /* sys */
|
||||
value = 1021; /* --> sys. */
|
||||
break;
|
||||
default: return NULL;
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -121,48 +121,48 @@ const struct aarch64_operand aarch64_operands[] =
|
||||
static const unsigned op_enum_table [] =
|
||||
{
|
||||
0,
|
||||
670,
|
||||
671,
|
||||
672,
|
||||
675,
|
||||
676,
|
||||
677,
|
||||
678,
|
||||
679,
|
||||
673,
|
||||
674,
|
||||
680,
|
||||
681,
|
||||
703,
|
||||
704,
|
||||
705,
|
||||
708,
|
||||
709,
|
||||
710,
|
||||
711,
|
||||
712,
|
||||
706,
|
||||
707,
|
||||
713,
|
||||
714,
|
||||
757,
|
||||
720,
|
||||
721,
|
||||
722,
|
||||
725,
|
||||
726,
|
||||
727,
|
||||
728,
|
||||
729,
|
||||
723,
|
||||
724,
|
||||
730,
|
||||
731,
|
||||
753,
|
||||
754,
|
||||
755,
|
||||
758,
|
||||
759,
|
||||
760,
|
||||
761,
|
||||
762,
|
||||
756,
|
||||
757,
|
||||
763,
|
||||
764,
|
||||
807,
|
||||
808,
|
||||
809,
|
||||
810,
|
||||
12,
|
||||
519,
|
||||
520,
|
||||
952,
|
||||
954,
|
||||
956,
|
||||
764,
|
||||
955,
|
||||
953,
|
||||
1002,
|
||||
1004,
|
||||
1006,
|
||||
814,
|
||||
1005,
|
||||
1003,
|
||||
261,
|
||||
507,
|
||||
518,
|
||||
517,
|
||||
762,
|
||||
812,
|
||||
514,
|
||||
511,
|
||||
503,
|
||||
@ -172,13 +172,13 @@ static const unsigned op_enum_table [] =
|
||||
513,
|
||||
515,
|
||||
516,
|
||||
772,
|
||||
822,
|
||||
535,
|
||||
538,
|
||||
541,
|
||||
536,
|
||||
539,
|
||||
636,
|
||||
664,
|
||||
162,
|
||||
163,
|
||||
164,
|
||||
|
||||
@ -259,6 +259,13 @@
|
||||
QLF3(S_S,X,imm_1_64), \
|
||||
}
|
||||
|
||||
/* e.g. SCVTF <Hd>, <Xn>, #<fbits>. */
|
||||
#define QL_FIX2FP_H \
|
||||
{ \
|
||||
QLF3 (S_H, W, imm_1_32), \
|
||||
QLF3 (S_H, X, imm_1_64), \
|
||||
}
|
||||
|
||||
/* e.g. FCVTZS <Wd>, <Dn>, #<fbits>. */
|
||||
#define QL_FP2FIX \
|
||||
{ \
|
||||
@ -268,6 +275,13 @@
|
||||
QLF3(X,S_S,imm_1_64), \
|
||||
}
|
||||
|
||||
/* e.g. FCVTZS <Wd>, <Hn>, #<fbits>. */
|
||||
#define QL_FP2FIX_H \
|
||||
{ \
|
||||
QLF3 (W, S_H, imm_1_32), \
|
||||
QLF3 (X, S_H, imm_1_64), \
|
||||
}
|
||||
|
||||
/* e.g. SCVTF <Dd>, <Wn>. */
|
||||
#define QL_INT2FP \
|
||||
{ \
|
||||
@ -277,6 +291,13 @@
|
||||
QLF2(S_S,X), \
|
||||
}
|
||||
|
||||
/* e.g. SCVTF <Hd>, <Wn>. */
|
||||
#define QL_INT2FP_H \
|
||||
{ \
|
||||
QLF2 (S_H, W), \
|
||||
QLF2 (S_H, X), \
|
||||
}
|
||||
|
||||
/* e.g. FCVTNS <Xd>, <Dn>. */
|
||||
#define QL_FP2INT \
|
||||
{ \
|
||||
@ -286,6 +307,13 @@
|
||||
QLF2(X,S_S), \
|
||||
}
|
||||
|
||||
/* e.g. FCVTNS <Hd>, <Wn>. */
|
||||
#define QL_FP2INT_H \
|
||||
{ \
|
||||
QLF2 (W, S_H), \
|
||||
QLF2 (X, S_H), \
|
||||
}
|
||||
|
||||
/* e.g. FMOV <Xd>, <Vn>.D[1]. */
|
||||
#define QL_XVD1 \
|
||||
{ \
|
||||
@ -504,6 +532,12 @@
|
||||
QLF2(S_D, S_D), \
|
||||
}
|
||||
|
||||
/* FMOV <Hd>, <Hn>. */
|
||||
#define QL_FP2_H \
|
||||
{ \
|
||||
QLF2 (S_H, S_H), \
|
||||
}
|
||||
|
||||
/* e.g. SQADD <V><d>, <V><n>, <V><m>. */
|
||||
#define QL_S_3SAME \
|
||||
{ \
|
||||
@ -540,6 +574,12 @@
|
||||
QLF3(S_D, S_D, S_D), \
|
||||
}
|
||||
|
||||
/* FMUL <Hd>, <Hn>, <Hm>. */
|
||||
#define QL_FP3_H \
|
||||
{ \
|
||||
QLF3 (S_H, S_H, S_H), \
|
||||
}
|
||||
|
||||
/* FMADD <Dd>, <Dn>, <Dm>, <Da>. */
|
||||
#define QL_FP4 \
|
||||
{ \
|
||||
@ -547,6 +587,12 @@
|
||||
QLF4(S_D, S_D, S_D, S_D), \
|
||||
}
|
||||
|
||||
/* FMADD <Hd>, <Hn>, <Hm>, <Ha>. */
|
||||
#define QL_FP4_H \
|
||||
{ \
|
||||
QLF4 (S_H, S_H, S_H, S_H), \
|
||||
}
|
||||
|
||||
/* e.g. FCMP <Dn>, #0.0. */
|
||||
#define QL_DST_SD \
|
||||
{ \
|
||||
@ -554,6 +600,12 @@
|
||||
QLF2(S_D, NIL), \
|
||||
}
|
||||
|
||||
/* e.g. FCMP <Hn>, #0.0. */
|
||||
#define QL_DST_H \
|
||||
{ \
|
||||
QLF2 (S_H, NIL), \
|
||||
}
|
||||
|
||||
/* FCSEL <Sd>, <Sn>, <Sm>, <cond>. */
|
||||
#define QL_FP_COND \
|
||||
{ \
|
||||
@ -561,6 +613,12 @@
|
||||
QLF4(S_D, S_D, S_D, NIL), \
|
||||
}
|
||||
|
||||
/* FCSEL <Hd>, <Hn>, <Hm>, <cond>. */
|
||||
#define QL_FP_COND_H \
|
||||
{ \
|
||||
QLF4 (S_H, S_H, S_H, NIL), \
|
||||
}
|
||||
|
||||
/* e.g. CCMN <Xn>, <Xm>, #<nzcv>, <cond>. */
|
||||
#define QL_CCMP \
|
||||
{ \
|
||||
@ -582,6 +640,12 @@
|
||||
QLF4(S_D, S_D, NIL, NIL), \
|
||||
}
|
||||
|
||||
/* e.g. FCCMP <Sn>, <Sm>, #<nzcv>, <cond>. */
|
||||
#define QL_FCCMP_H \
|
||||
{ \
|
||||
QLF4 (S_H, S_H, NIL, NIL), \
|
||||
}
|
||||
|
||||
/* e.g. DUP <Vd>.<T>, <Vn>.<Ts>[<index>]. */
|
||||
#define QL_DUP_VX \
|
||||
{ \
|
||||
@ -1907,66 +1971,166 @@ struct aarch64_opcode aarch64_opcode_table[] =
|
||||
{"ror", 0x13800000, 0x7fa00000, extract, OP_ROR_IMM, CORE, OP3 (Rd, Rm, IMMS), QL_SHIFT, F_ALIAS | F_CONV},
|
||||
/* Floating-point<->fixed-point conversions. */
|
||||
{"scvtf", 0x1e020000, 0x7f3f0000, float2fix, 0, FP, OP3 (Fd, Rn, FBITS), QL_FIX2FP, F_FPTYPE | F_SF},
|
||||
{"scvtf", 0x1ec20000, 0x7f3f0000, float2fix, 0, FP_F16,
|
||||
OP3 (Fd, Rn, FBITS), QL_FIX2FP_H, F_FPTYPE | F_SF},
|
||||
{"ucvtf", 0x1e030000, 0x7f3f0000, float2fix, 0, FP, OP3 (Fd, Rn, FBITS), QL_FIX2FP, F_FPTYPE | F_SF},
|
||||
{"ucvtf", 0x1ec30000, 0x7f3f0000, float2fix, 0, FP_F16,
|
||||
OP3 (Fd, Rn, FBITS), QL_FIX2FP_H, F_FPTYPE | F_SF},
|
||||
{"fcvtzs", 0x1e180000, 0x7f3f0000, float2fix, 0, FP, OP3 (Rd, Fn, FBITS), QL_FP2FIX, F_FPTYPE | F_SF},
|
||||
{"fcvtzs", 0x1ed80000, 0x7f3f0000, float2fix, 0, FP_F16,
|
||||
OP3 (Rd, Fn, FBITS), QL_FP2FIX_H, F_FPTYPE | F_SF},
|
||||
{"fcvtzu", 0x1e190000, 0x7f3f0000, float2fix, 0, FP, OP3 (Rd, Fn, FBITS), QL_FP2FIX, F_FPTYPE | F_SF},
|
||||
{"fcvtzu", 0x1ed90000, 0x7f3f0000, float2fix, 0, FP_F16,
|
||||
OP3 (Rd, Fn, FBITS), QL_FP2FIX_H, F_FPTYPE | F_SF},
|
||||
/* Floating-point<->integer conversions. */
|
||||
{"fcvtns", 0x1e200000, 0x7f3ffc00, float2int, 0, FP, OP2 (Rd, Fn), QL_FP2INT, F_FPTYPE | F_SF},
|
||||
{"fcvtns", 0x1ee00000, 0x7f3ffc00, float2int, 0, FP_F16,
|
||||
OP2 (Rd, Fn), QL_FP2INT_H, F_FPTYPE | F_SF},
|
||||
{"fcvtnu", 0x1e210000, 0x7f3ffc00, float2int, 0, FP, OP2 (Rd, Fn), QL_FP2INT, F_FPTYPE | F_SF},
|
||||
{"fcvtnu", 0x1ee10000, 0x7f3ffc00, float2int, 0, FP_F16,
|
||||
OP2 (Rd, Fn), QL_FP2INT_H, F_FPTYPE | F_SF},
|
||||
{"scvtf", 0x1e220000, 0x7f3ffc00, float2int, 0, FP, OP2 (Fd, Rn), QL_INT2FP, F_FPTYPE | F_SF},
|
||||
{"scvtf", 0x1ee20000, 0x7f3ffc00, float2int, 0, FP_F16,
|
||||
OP2 (Fd, Rn), QL_INT2FP_H, F_FPTYPE | F_SF},
|
||||
{"ucvtf", 0x1e230000, 0x7f3ffc00, float2int, 0, FP, OP2 (Fd, Rn), QL_INT2FP, F_FPTYPE | F_SF},
|
||||
{"ucvtf", 0x1ee30000, 0x7f3ffc00, float2int, 0, FP_F16,
|
||||
OP2 (Fd, Rn), QL_INT2FP_H, F_FPTYPE | F_SF},
|
||||
{"fcvtas", 0x1e240000, 0x7f3ffc00, float2int, 0, FP, OP2 (Rd, Fn), QL_FP2INT, F_FPTYPE | F_SF},
|
||||
{"fcvtas", 0x1ee40000, 0x7f3ffc00, float2int, 0, FP_F16,
|
||||
OP2 (Rd, Fn), QL_FP2INT_H, F_FPTYPE | F_SF},
|
||||
{"fcvtau", 0x1e250000, 0x7f3ffc00, float2int, 0, FP, OP2 (Rd, Fn), QL_FP2INT, F_FPTYPE | F_SF},
|
||||
{"fcvtau", 0x1ee50000, 0x7f3ffc00, float2int, 0, FP_F16,
|
||||
OP2 (Rd, Fn), QL_FP2INT_H, F_FPTYPE | F_SF},
|
||||
{"fmov", 0x1e260000, 0x7f3ffc00, float2int, 0, FP, OP2 (Rd, Fn), QL_FP2INT, F_FPTYPE | F_SF},
|
||||
{"fmov", 0x1ee60000, 0x7f3ffc00, float2int, 0, FP_F16,
|
||||
OP2 (Rd, Fn), QL_FP2INT_H, F_FPTYPE | F_SF},
|
||||
{"fmov", 0x1e270000, 0x7f3ffc00, float2int, 0, FP, OP2 (Fd, Rn), QL_INT2FP, F_FPTYPE | F_SF},
|
||||
{"fmov", 0x1ee70000, 0x7f3ffc00, float2int, 0, FP_F16,
|
||||
OP2 (Fd, Rn), QL_INT2FP_H, F_FPTYPE | F_SF},
|
||||
{"fcvtps", 0x1e280000, 0x7f3ffc00, float2int, 0, FP, OP2 (Rd, Fn), QL_FP2INT, F_FPTYPE | F_SF},
|
||||
{"fcvtps", 0x1ee80000, 0x7f3ffc00, float2int, 0, FP_F16,
|
||||
OP2 (Rd, Fn), QL_FP2INT_H, F_FPTYPE | F_SF},
|
||||
{"fcvtpu", 0x1e290000, 0x7f3ffc00, float2int, 0, FP, OP2 (Rd, Fn), QL_FP2INT, F_FPTYPE | F_SF},
|
||||
{"fcvtpu", 0x1ee90000, 0x7f3ffc00, float2int, 0, FP_F16,
|
||||
OP2 (Rd, Fn), QL_FP2INT_H, F_FPTYPE | F_SF},
|
||||
{"fcvtms", 0x1e300000, 0x7f3ffc00, float2int, 0, FP, OP2 (Rd, Fn), QL_FP2INT, F_FPTYPE | F_SF},
|
||||
{"fcvtms", 0x1ef00000, 0x7f3ffc00, float2int, 0, FP_F16,
|
||||
OP2 (Rd, Fn), QL_FP2INT_H, F_FPTYPE | F_SF},
|
||||
{"fcvtmu", 0x1e310000, 0x7f3ffc00, float2int, 0, FP, OP2 (Rd, Fn), QL_FP2INT, F_FPTYPE | F_SF},
|
||||
{"fcvtmu", 0x1ef10000, 0x7f3ffc00, float2int, 0, FP_F16,
|
||||
OP2 (Rd, Fn), QL_FP2INT_H, F_FPTYPE | F_SF},
|
||||
{"fcvtzs", 0x1e380000, 0x7f3ffc00, float2int, 0, FP, OP2 (Rd, Fn), QL_FP2INT, F_FPTYPE | F_SF},
|
||||
{"fcvtzs", 0x1ef80000, 0x7f3ffc00, float2int, 0, FP_F16,
|
||||
OP2 (Rd, Fn), QL_FP2INT_H, F_FPTYPE | F_SF},
|
||||
{"fcvtzu", 0x1e390000, 0x7f3ffc00, float2int, 0, FP, OP2 (Rd, Fn), QL_FP2INT, F_FPTYPE | F_SF},
|
||||
{"fcvtzu", 0x1ef90000, 0x7f3ffc00, float2int, 0, FP_F16,
|
||||
OP2 (Rd, Fn), QL_FP2INT_H, F_FPTYPE | F_SF},
|
||||
{"fmov", 0x9eae0000, 0xfffffc00, float2int, 0, FP, OP2 (Rd, VnD1), QL_XVD1, 0},
|
||||
{"fmov", 0x9eaf0000, 0xfffffc00, float2int, 0, FP, OP2 (VdD1, Rn), QL_VD1X, 0},
|
||||
/* Floating-point conditional compare. */
|
||||
{"fccmp", 0x1e200400, 0xff200c10, floatccmp, 0, FP, OP4 (Fn, Fm, NZCV, COND), QL_FCCMP, F_FPTYPE},
|
||||
{"fccmp", 0x1ee00400, 0xff200c10, floatccmp, 0, FP_F16,
|
||||
OP4 (Fn, Fm, NZCV, COND), QL_FCCMP_H, F_FPTYPE},
|
||||
{"fccmpe", 0x1e200410, 0xff200c10, floatccmp, 0, FP, OP4 (Fn, Fm, NZCV, COND), QL_FCCMP, F_FPTYPE},
|
||||
{"fccmpe", 0x1ee00410, 0xff200c10, floatccmp, 0, FP_F16,
|
||||
OP4 (Fn, Fm, NZCV, COND), QL_FCCMP_H, F_FPTYPE},
|
||||
/* Floating-point compare. */
|
||||
{"fcmp", 0x1e202000, 0xff20fc1f, floatcmp, 0, FP, OP2 (Fn, Fm), QL_FP2, F_FPTYPE},
|
||||
{"fcmp", 0x1ee02000, 0xff20fc1f, floatcmp, 0, FP_F16,
|
||||
OP2 (Fn, Fm), QL_FP2_H, F_FPTYPE},
|
||||
{"fcmpe", 0x1e202010, 0xff20fc1f, floatcmp, 0, FP, OP2 (Fn, Fm), QL_FP2, F_FPTYPE},
|
||||
{"fcmpe", 0x1ee02010, 0xff20fc1f, floatcmp, 0, FP_F16,
|
||||
OP2 (Fn, Fm), QL_FP2_H, F_FPTYPE},
|
||||
{"fcmp", 0x1e202008, 0xff20fc1f, floatcmp, 0, FP, OP2 (Fn, FPIMM0), QL_DST_SD, F_FPTYPE},
|
||||
{"fcmp", 0x1ee02008, 0xff20fc1f, floatcmp, 0, FP_F16,
|
||||
OP2 (Fn, FPIMM0), QL_FP2_H, F_FPTYPE},
|
||||
{"fcmpe", 0x1e202018, 0xff20fc1f, floatcmp, 0, FP, OP2 (Fn, FPIMM0), QL_DST_SD, F_FPTYPE},
|
||||
{"fcmpe", 0x1ee02018, 0xff20fc1f, floatcmp, 0, FP_F16,
|
||||
OP2 (Fn, FPIMM0), QL_FP2_H, F_FPTYPE},
|
||||
/* Floating-point data-processing (1 source). */
|
||||
{"fmov", 0x1e204000, 0xff3ffc00, floatdp1, 0, FP, OP2 (Fd, Fn), QL_FP2, F_FPTYPE},
|
||||
{"fmov", 0x1ee04000, 0xff3ffc00, floatdp1, 0, FP_F16,
|
||||
OP2 (Fd, Fn), QL_FP2_H, F_FPTYPE},
|
||||
{"fabs", 0x1e20c000, 0xff3ffc00, floatdp1, 0, FP, OP2 (Fd, Fn), QL_FP2, F_FPTYPE},
|
||||
{"fabs", 0x1ee0c000, 0xff3ffc00, floatdp1, 0, FP_F16,
|
||||
OP2 (Fd, Fn), QL_FP2_H, F_FPTYPE},
|
||||
{"fneg", 0x1e214000, 0xff3ffc00, floatdp1, 0, FP, OP2 (Fd, Fn), QL_FP2, F_FPTYPE},
|
||||
{"fneg", 0x1ee14000, 0xff3ffc00, floatdp1, 0, FP_F16,
|
||||
OP2 (Fd, Fn), QL_FP2_H, F_FPTYPE},
|
||||
{"fsqrt", 0x1e21c000, 0xff3ffc00, floatdp1, 0, FP, OP2 (Fd, Fn), QL_FP2, F_FPTYPE},
|
||||
{"fsqrt", 0x1ee1c000, 0xff3ffc00, floatdp1, 0, FP_F16,
|
||||
OP2 (Fd, Fn), QL_FP2_H, F_FPTYPE},
|
||||
{"fcvt", 0x1e224000, 0xff3e7c00, floatdp1, OP_FCVT, FP, OP2 (Fd, Fn), QL_FCVT, F_FPTYPE | F_MISC},
|
||||
{"frintn", 0x1e244000, 0xff3ffc00, floatdp1, 0, FP, OP2 (Fd, Fn), QL_FP2, F_FPTYPE},
|
||||
{"frintn", 0x1ee44000, 0xff3ffc00, floatdp1, 0, FP_F16,
|
||||
OP2 (Fd, Fn), QL_FP2_H, F_FPTYPE},
|
||||
{"frintp", 0x1e24c000, 0xff3ffc00, floatdp1, 0, FP, OP2 (Fd, Fn), QL_FP2, F_FPTYPE},
|
||||
{"frintp", 0x1ee4c000, 0xff3ffc00, floatdp1, 0, FP_F16,
|
||||
OP2 (Fd, Fn), QL_FP2_H, F_FPTYPE},
|
||||
{"frintm", 0x1e254000, 0xff3ffc00, floatdp1, 0, FP, OP2 (Fd, Fn), QL_FP2, F_FPTYPE},
|
||||
{"frintm", 0x1ee54000, 0xff3ffc00, floatdp1, 0, FP_F16,
|
||||
OP2 (Fd, Fn), QL_FP2_H, F_FPTYPE},
|
||||
{"frintz", 0x1e25c000, 0xff3ffc00, floatdp1, 0, FP, OP2 (Fd, Fn), QL_FP2, F_FPTYPE},
|
||||
{"frintz", 0x1ee5c000, 0xff3ffc00, floatdp1, 0, FP_F16,
|
||||
OP2 (Fd, Fn), QL_FP2_H, F_FPTYPE},
|
||||
{"frinta", 0x1e264000, 0xff3ffc00, floatdp1, 0, FP, OP2 (Fd, Fn), QL_FP2, F_FPTYPE},
|
||||
{"frinta", 0x1ee64000, 0xff3ffc00, floatdp1, 0, FP_F16,
|
||||
OP2 (Fd, Fn), QL_FP2_H, F_FPTYPE},
|
||||
{"frintx", 0x1e274000, 0xff3ffc00, floatdp1, 0, FP, OP2 (Fd, Fn), QL_FP2, F_FPTYPE},
|
||||
{"frintx", 0x1ee74000, 0xff3ffc00, floatdp1, 0, FP_F16,
|
||||
OP2 (Fd, Fn), QL_FP2_H, F_FPTYPE},
|
||||
{"frinti", 0x1e27c000, 0xff3ffc00, floatdp1, 0, FP, OP2 (Fd, Fn), QL_FP2, F_FPTYPE},
|
||||
{"frinti", 0x1ee7c000, 0xff3ffc00, floatdp1, 0, FP_F16,
|
||||
OP2 (Fd, Fn), QL_FP2_H, F_FPTYPE},
|
||||
/* Floating-point data-processing (2 source). */
|
||||
{"fmul", 0x1e200800, 0xff20fc00, floatdp2, 0, FP, OP3 (Fd, Fn, Fm), QL_FP3, F_FPTYPE},
|
||||
{"fmul", 0x1ee00800, 0xff20fc00, floatdp2, 0, FP_F16,
|
||||
OP3 (Fd, Fn, Fm), QL_FP3_H, F_FPTYPE},
|
||||
{"fdiv", 0x1e201800, 0xff20fc00, floatdp2, 0, FP, OP3 (Fd, Fn, Fm), QL_FP3, F_FPTYPE},
|
||||
{"fdiv", 0x1ee01800, 0xff20fc00, floatdp2, 0, FP_F16,
|
||||
OP3 (Fd, Fn, Fm), QL_FP3_H, F_FPTYPE},
|
||||
{"fadd", 0x1e202800, 0xff20fc00, floatdp2, 0, FP, OP3 (Fd, Fn, Fm), QL_FP3, F_FPTYPE},
|
||||
{"fadd", 0x1ee02800, 0xff20fc00, floatdp2, 0, FP_F16,
|
||||
OP3 (Fd, Fn, Fm), QL_FP3_H, F_FPTYPE},
|
||||
{"fsub", 0x1e203800, 0xff20fc00, floatdp2, 0, FP, OP3 (Fd, Fn, Fm), QL_FP3, F_FPTYPE},
|
||||
{"fsub", 0x1ee03800, 0xff20fc00, floatdp2, 0, FP_F16,
|
||||
OP3 (Fd, Fn, Fm), QL_FP3_H, F_FPTYPE},
|
||||
{"fmax", 0x1e204800, 0xff20fc00, floatdp2, 0, FP, OP3 (Fd, Fn, Fm), QL_FP3, F_FPTYPE},
|
||||
{"fmax", 0x1ee04800, 0xff20fc00, floatdp2, 0, FP_F16,
|
||||
OP3 (Fd, Fn, Fm), QL_FP3_H, F_FPTYPE},
|
||||
{"fmin", 0x1e205800, 0xff20fc00, floatdp2, 0, FP, OP3 (Fd, Fn, Fm), QL_FP3, F_FPTYPE},
|
||||
{"fmin", 0x1ee05800, 0xff20fc00, floatdp2, 0, FP_F16,
|
||||
OP3 (Fd, Fn, Fm), QL_FP3_H, F_FPTYPE},
|
||||
{"fmaxnm", 0x1e206800, 0xff20fc00, floatdp2, 0, FP, OP3 (Fd, Fn, Fm), QL_FP3, F_FPTYPE},
|
||||
{"fmaxnm", 0x1ee06800, 0xff20fc00, floatdp2, 0, FP_F16,
|
||||
OP3 (Fd, Fn, Fm), QL_FP3_H, F_FPTYPE},
|
||||
{"fminnm", 0x1e207800, 0xff20fc00, floatdp2, 0, FP, OP3 (Fd, Fn, Fm), QL_FP3, F_FPTYPE},
|
||||
{"fminnm", 0x1ee07800, 0xff20fc00, floatdp2, 0, FP_F16,
|
||||
OP3 (Fd, Fn, Fm), QL_FP3_H, F_FPTYPE},
|
||||
{"fnmul", 0x1e208800, 0xff20fc00, floatdp2, 0, FP, OP3 (Fd, Fn, Fm), QL_FP3, F_FPTYPE},
|
||||
{"fnmul", 0x1ee08800, 0xff20fc00, floatdp2, 0, FP_F16,
|
||||
OP3 (Fd, Fn, Fm), QL_FP3_H, F_FPTYPE},
|
||||
/* Floating-point data-processing (3 source). */
|
||||
{"fmadd", 0x1f000000, 0xff208000, floatdp3, 0, FP, OP4 (Fd, Fn, Fm, Fa), QL_FP4, F_FPTYPE},
|
||||
{"fmadd", 0x1fc00000, 0xff208000, floatdp3, 0, FP_F16,
|
||||
OP4 (Fd, Fn, Fm, Fa), QL_FP4_H, F_FPTYPE},
|
||||
{"fmsub", 0x1f008000, 0xff208000, floatdp3, 0, FP, OP4 (Fd, Fn, Fm, Fa), QL_FP4, F_FPTYPE},
|
||||
{"fmsub", 0x1fc08000, 0xff208000, floatdp3, 0, FP_F16,
|
||||
OP4 (Fd, Fn, Fm, Fa), QL_FP4_H, F_FPTYPE},
|
||||
{"fnmadd", 0x1f200000, 0xff208000, floatdp3, 0, FP, OP4 (Fd, Fn, Fm, Fa), QL_FP4, F_FPTYPE},
|
||||
{"fnmadd", 0x1fe00000, 0xff208000, floatdp3, 0, FP_F16,
|
||||
OP4 (Fd, Fn, Fm, Fa), QL_FP4_H, F_FPTYPE},
|
||||
{"fnmsub", 0x1f208000, 0xff208000, floatdp3, 0, FP, OP4 (Fd, Fn, Fm, Fa), QL_FP4, F_FPTYPE},
|
||||
{"fnmsub", 0x1fe08000, 0xff208000, floatdp3, 0, FP_F16,
|
||||
OP4 (Fd, Fn, Fm, Fa), QL_FP4_H, F_FPTYPE},
|
||||
/* Floating-point immediate. */
|
||||
{"fmov", 0x1e201000, 0xff201fe0, floatimm, 0, FP, OP2 (Fd, FPIMM), QL_DST_SD, F_FPTYPE},
|
||||
{"fmov", 0x1ee01000, 0xff201fe0, floatimm, 0, FP_F16,
|
||||
OP2 (Fd, FPIMM), QL_DST_H, F_FPTYPE},
|
||||
/* Floating-point conditional select. */
|
||||
{"fcsel", 0x1e200c00, 0xff200c00, floatsel, 0, FP, OP4 (Fd, Fn, Fm, COND), QL_FP_COND, F_FPTYPE},
|
||||
{"fcsel", 0x1ee00c00, 0xff200c00, floatsel, 0, FP_F16,
|
||||
OP4 (Fd, Fn, Fm, COND), QL_FP_COND_H, F_FPTYPE},
|
||||
/* Load/store register (immediate indexed). */
|
||||
{"strb", 0x38000400, 0xffe00400, ldst_imm9, 0, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W8, 0},
|
||||
{"ldrb", 0x38400400, 0xffe00400, ldst_imm9, 0, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W8, 0},
|
||||
|
||||
Loading…
Reference in New Issue
Block a user