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* config/obj-coff.h: Fix formatting.

Browse Source 
* config/tc-mcore.c: Likewise.
	* config/tc-mn10300.c: Likewise.
	* config/tc-openrisc.c: Likewise.
	* config/tc-or32.c: Likewise.
	* config/tc-pdp11.c: Likewise.
	* config/tc-ppc.c: Likewise.
	* config/tc-ppc.h: Likewise.
	* config/tc-sh64.c: Likewise.
	* config/tc-sh.c: Likewise.
	* config/tc-tic54x.c: Likewise.
	* config/tc-xstormy16.c: Likewise.
	* config/tc-xstormy16.h: Likewise.
This commit is contained in:
Kazu Hirata 2002-05-11 09:53:52 +00:00
parent 690cc98be9
commit 5d6255fea6
14 changed files with 156 additions and 140 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
gas/ChangeLog
View File

@ -1,3 +1,19 @@
2002-05-11 Kazu Hirata <kazu@cs.umass.edu>
* config/obj-coff.h: Fix formatting.
* config/tc-mcore.c: Likewise.
* config/tc-mn10300.c: Likewise.
* config/tc-openrisc.c: Likewise.
* config/tc-or32.c: Likewise.
* config/tc-pdp11.c: Likewise.
* config/tc-ppc.c: Likewise.
* config/tc-ppc.h: Likewise.
* config/tc-sh64.c: Likewise.
* config/tc-sh.c: Likewise.
* config/tc-tic54x.c: Likewise.
* config/tc-xstormy16.c: Likewise.
* config/tc-xstormy16.h: Likewise.
2002-05-09 Kazu Hirata <kazu@cs.umass.edu>
* config/obj-coff.c: Fix formatting.

8
gas/config/obj-coff.h
View File

@ -294,9 +294,9 @@ extern void SA_SET_SYM_ENDNDX PARAMS ((symbolS *, symbolS *));
#define SA_SET_SCN_NLINNO(s,v) (SYM_AUXENT (s)->x_scn.x_nlinno=(v))
/* Internal use only definitions. SF_ stands for symbol flags.
These values can be assigned to sy_symbol.ost_flags field of a symbolS.
You'll break i960 if you shift the SYSPROC bits anywhere else. for
more on the balname/callname hack, see tc-i960.h. b.out is done
differently. */
@ -582,9 +582,9 @@ typedef struct
#define SA_SET_SCN_NLINNO(s,v) (SYM_AUXENT (s)->x_scn.x_nlinno=(v))
/* Internal use only definitions. SF_ stands for symbol flags.
These values can be assigned to sy_symbol.ost_flags field of a symbolS.
You'll break i960 if you shift the SYSPROC bits anywhere else. for
more on the balname/callname hack, see tc-i960.h. b.out is done
differently. */

8
gas/config/tc-mcore.c
View File

@ -1,5 +1,5 @@
/* tc-mcore.c -- Assemble code for M*Core
Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@ -124,9 +124,9 @@ const relax_typeS md_relax_table[] = {
{ 0, 0, C32_LEN, 0 }, /* UNDEF_WORD_DISP */
/* UNCD_JUMP */
{ 0, 0, 0, 0 }, /* UNDEF_DISP */
{ 2048, -2046, U12_LEN, C(UNCD_JUMP, DISP32) }, /* DISP12 */
{ 0, 0, U32_LEN, 0 }, /* DISP32 */
{ 0, 0, 0, 0 }, /* UNDEF_DISP */
{ 2048, -2046, U12_LEN, C(UNCD_JUMP, DISP32) }, /* DISP12 */
{ 0, 0, U32_LEN, 0 }, /* DISP32 */
{ 0, 0, U32_LEN, 0 } /* UNDEF_WORD_DISP */
};

4
gas/config/tc-mn10300.c
View File

@ -1806,7 +1806,7 @@ tc_gen_reloc (seg, fixp)
reloc->howto = bfd_reloc_type_lookup (stdoutput,
BFD_RELOC_8_PCREL);
return reloc;
case BFD_RELOC_16:
reloc->howto = bfd_reloc_type_lookup (stdoutput,
BFD_RELOC_16_PCREL);
@ -1846,7 +1846,7 @@ tc_gen_reloc (seg, fixp)
case BFD_RELOC_8:
md_number_to_chars (fixpos, reloc->addend, 1);
break;
case BFD_RELOC_16:
md_number_to_chars (fixpos, reloc->addend, 2);
break;

12
gas/config/tc-openrisc.c
View File

@ -1,5 +1,5 @@
/* tc-openrisc.c -- Assembler for the OpenRISC family.
Copyright (C) 2001 Free Software Foundation.
Copyright (C) 2001, 2002 Free Software Foundation.
Contributed by Johan Rydberg, jrydberg@opencores.org
This file is part of GAS, the GNU Assembler.
@ -370,12 +370,12 @@ md_cgen_lookup_reloc (insn, operand, fixP)
switch (operand->type)
{
case OPENRISC_OPERAND_ABS_26:
fixP->fx_pcrel = 0;
case OPENRISC_OPERAND_ABS_26:
fixP->fx_pcrel = 0;
type = BFD_RELOC_OPENRISC_ABS_26;
goto emit;
case OPENRISC_OPERAND_DISP_26:
fixP->fx_pcrel = 1;
case OPENRISC_OPERAND_DISP_26:
fixP->fx_pcrel = 1;
type = BFD_RELOC_OPENRISC_REL_26;
goto emit;
@ -493,7 +493,7 @@ openrisc_fix_adjustable (fixP)
/* We need the symbol name for the VTABLE entries */
if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
return 0;
return 0;
return 1;
}

114
gas/config/tc-or32.c
View File

@ -28,7 +28,7 @@
#include "opcode/or32.h"
#ifdef BFD_ASSEMBLER
#include "elf/or32.h"
#include "elf/or32.h"
#endif
#define DEBUG 0
@ -64,7 +64,7 @@ const pseudo_typeS md_pseudo_table[] =
{
{"align", s_align_bytes, 4 },
{"space", s_space, 0 },
{"cputype", s_ignore, 0 },
{"cputype", s_ignore, 0 },
{"reg", s_lsym, 0 }, /* Register equate, same as equ. */
{"sect", s_ignore, 0 }, /* Creation of coff sections. */
{"proc", s_ignore, 0 }, /* Start of a function. */
@ -122,9 +122,9 @@ static char * parse_operand PARAMS ((char *, expressionS *, int));
#endif
/* Set bits in machine opcode according to insn->encoding
description and passed operand. */
description and passed operand. */
static void
static void
encode (insn, opcode, param_val, param_ch)
const struct machine_opcode *insn;
unsigned long *opcode;
@ -152,7 +152,7 @@ encode (insn, opcode, param_val, param_ch)
for (enc = insn->encoding; *enc != '\0';)
{
if ((*enc == '0') && (*(enc + 1) == 'x'))
if ((*enc == '0') && (*(enc + 1) == 'x'))
{
int tmp = strtol (enc, NULL, 16);
@ -160,25 +160,25 @@ encode (insn, opcode, param_val, param_ch)
*opcode |= tmp << opc_pos;
enc += 3;
}
else if ((*enc == '0') || (*enc == '-'))
else if ((*enc == '0') || (*enc == '-'))
{
opc_pos--;
enc++;
}
else if (*enc == '1')
else if (*enc == '1')
{
opc_pos--;
*opcode |= 1 << opc_pos;
enc++;
}
else if (*enc == param_ch)
else if (*enc == param_ch)
{
opc_pos--;
param_pos--;
*opcode |= ((param_val >> param_pos) & 0x1) << opc_pos;
enc++;
}
else if (ISALPHA (*enc))
else if (ISALPHA (*enc))
{
opc_pos--;
enc++;
@ -186,7 +186,7 @@ encode (insn, opcode, param_val, param_ch)
else
enc++;
}
#if DEBUG
printf (" opcode=%.8lx\n", *opcode);
#endif
@ -318,14 +318,14 @@ parse_operand (s, operandp, opt)
if ((*s == '(') && (*(s+1) == 'r'))
s++;
if ((*s == 'r') && ISDIGIT (*(s + 1)))
if ((*s == 'r') && ISDIGIT (*(s + 1)))
{
operandp->X_add_number = strtol (s + 1, NULL, 10);
operandp->X_op = O_register;
for (; (*s != ',') && (*s != '\0');)
s++;
s++;
input_line_pointer = save;
return s;
return s;
}
expression (operandp);
@ -340,10 +340,10 @@ parse_operand (s, operandp, opt)
operandp->X_op = O_constant;
}
}
new = input_line_pointer;
input_line_pointer = save;
#if DEBUG
printf (" %s=parse_operand(%s): operandp->X_op = %u\n", new, s, operandp->X_op);
#endif
@ -396,11 +396,11 @@ parse_operand (s, operandp, opt)
operandp->X_op = O_constant;
}
}
new = input_line_pointer;
input_line_pointer = save;
if ((operandp->X_op == O_symbol) && (*s != '_'))
if ((operandp->X_op == O_symbol) && (*s != '_'))
{
#if DEBUG
printf ("symbol: '%s'\n", save);
@ -410,7 +410,7 @@ parse_operand (s, operandp, opt)
if ((*s == REGISTER_PREFIX) && (*(s + 1) == 'r')) /* Register prefix. */
s++;
if ((*s == 'r') && ISDIGIT (*(s + 1)))
if ((*s == 'r') && ISDIGIT (*(s + 1)))
{
operandp->X_add_number = strtol (s + 1, NULL, 10);
operandp->X_op = O_register;
@ -483,7 +483,7 @@ machine_ip (str)
/* Build the opcode, checking as we go to make sure that the
operands match.
If an operand matches, we modify the_insn or opcode appropriately,
and do a "continue". If an operand fails to match, we "break". */
if (insn->args[0] != '\0')
@ -509,7 +509,7 @@ machine_ip (str)
/* We are truly done. */
the_insn.opcode = opcode;
if (check_invalid_opcode (opcode))
as_bad (_("instruction not allowed: %s"), str);
as_bad (_("instruction not allowed: %s"), str);
return;
}
as_bad (_("too many operands: %s"), s);
@ -525,7 +525,7 @@ machine_ip (str)
#if DEBUG
printf (" ',' case: operand->X_add_number = %d, *args = %s, *s = %s\n",
operand->X_add_number, args, s);
#endif
#endif
continue;
}
break;
@ -533,7 +533,7 @@ machine_ip (str)
case '(': /* Must match a (. */
s = parse_operand (s, operand, args[1] == 'I');
continue;
case ')': /* Must match a ). */
continue;
@ -542,7 +542,7 @@ machine_ip (str)
if (operand->X_op != O_register)
break; /* Only registers. */
know (operand->X_add_symbol == 0);
know (operand->X_op_symbol == 0);
regno = operand->X_add_number;
@ -555,7 +555,7 @@ machine_ip (str)
default:
/* if (! ISALPHA (*args))
break; */ /* Only immediate values. */
if (mask_or_shift)
{
#if DEBUG
@ -564,23 +564,23 @@ machine_ip (str)
reloc = mask_or_shift;
}
mask_or_shift = 0;
if (strncasecmp (args, "LO(", 3) == 0)
if (strncasecmp (args, "LO(", 3) == 0)
{
#if DEBUG
printf ("reloc_const\n");
#endif
reloc = BFD_RELOC_LO16;
}
else if (strncasecmp (args, "HI(", 3) == 0)
else if (strncasecmp (args, "HI(", 3) == 0)
{
#if DEBUG
printf ("reloc_consth\n");
#endif
reloc = BFD_RELOC_HI16;
}
if (*s == '(')
if (*s == '(')
{
operand->X_op = O_constant;
#if 0
@ -611,7 +611,7 @@ machine_ip (str)
the_insn.pcrel = 0;
encode (insn, &opcode, operand->X_add_number, *args);
/* the_insn.reloc = BFD_RELOC_NONE; */
continue;
continue;
}
if (reloc == BFD_RELOC_NONE)
@ -625,7 +625,7 @@ machine_ip (str)
printf (" BFD_RELOC_NONE=%d\n", BFD_RELOC_NONE);
#endif
the_insn.exp = *operand;
/* the_insn.reloc_offset = 1; */
the_insn.pcrel = 1; /* Assume PC-relative jump. */
@ -637,7 +637,7 @@ machine_ip (str)
encode (insn, &opcode, operand->X_add_number, *args);
continue;
}
/* Types or values of args don't match. */
as_bad (_("invalid operands"));
return;
@ -698,11 +698,11 @@ machine_ip (str)
/* Build the opcode, checking as we go to make sure that the
operands match.
If an operand matches, we modify the_insn or opcode appropriately,
and do a "continue". If an operand fails to match, we "break". */
if (insn->args[0] != '\0')
/* Prime the pump. */
/* Prime the pump. */
s = parse_operand (s, operand,
insn->args[0] == 'I'
|| strcmp (insn->name, "l.nop") == 0);
@ -724,7 +724,7 @@ machine_ip (str)
/* We are truly done. */
the_insn.opcode = opcode;
if (check_invalid_opcode (opcode))
as_bad (_("instruction not allowed: %s"), str);
as_bad (_("instruction not allowed: %s"), str);
return;
}
as_bad (_("too many operands: %s"), s);
@ -740,7 +740,7 @@ machine_ip (str)
#if DEBUG
printf (" ',' case: operand->X_add_number = %d, *args = %s, *s = %s\n",
operand->X_add_number, args, s);
#endif
#endif
continue;
}
break;
@ -748,7 +748,7 @@ machine_ip (str)
case '(': /* Must match a (. */
s = parse_operand (s, operand, args[1] == 'I');
continue;
case ')': /* Must match a ). */
continue;
@ -757,7 +757,7 @@ machine_ip (str)
if (operand->X_op != O_register)
break; /* Only registers. */
know (operand->X_add_symbol == 0);
know (operand->X_op_symbol == 0);
regno = operand->X_add_number;
@ -770,7 +770,7 @@ machine_ip (str)
default:
/* if (! ISALPHA (*args))
break; */ /* Only immediate values. */
if (mask_or_shift)
{
#if DEBUG
@ -779,23 +779,23 @@ machine_ip (str)
reloc = mask_or_shift;
}
mask_or_shift = 0;
if (strncasecmp (args, "LO(", 3) == 0)
if (strncasecmp (args, "LO(", 3) == 0)
{
#if DEBUG
printf ("reloc_const\n");
#endif
reloc = RELOC_CONST;
}
else if (strncasecmp (args, "HI(", 3) == 0)
else if (strncasecmp (args, "HI(", 3) == 0)
{
#if DEBUG
printf ("reloc_consth\n");
#endif
reloc = RELOC_CONSTH;
}
if (*s == '(')
if (*s == '(')
{
operand->X_op = O_constant;
#if 0
@ -827,7 +827,7 @@ machine_ip (str)
the_insn.pcrel = 0;
encode (insn, &opcode, operand->X_add_number, *args);
/* the_insn.reloc = NO_RELOC; */
continue;
continue;
}
if (reloc == NO_RELOC)
@ -839,7 +839,7 @@ machine_ip (str)
printf (" NO_RELOC=%d\n", NO_RELOC);
#endif
the_insn.exp = *operand;
/* the_insn.reloc_offset = 1; */
the_insn.pcrel = 1; /* Assume PC-relative jump. */
@ -851,7 +851,7 @@ machine_ip (str)
encode (insn, &opcode, operand->X_add_number, *args);
continue;
}
/* Types or values of args don't match. */
as_bad (_("invalid operands"));
return;
@ -1250,7 +1250,7 @@ md_convert_frag (headers, seg, fragP)
fragS * fragP ATTRIBUTE_UNUSED;
{
as_fatal ("or32_convert_frag\n");
}
}
#endif
/* Should never be called for or32. */
@ -1296,7 +1296,7 @@ tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
#if DEBUG
printf ("tc_aout_fix_to_chars\n");
#endif
#endif
know (fixP->fx_r_type < BFD_RELOC_NONE);
know (fixP->fx_addsy != NULL);
@ -1404,8 +1404,8 @@ tc_aout_pre_write_hook ()
#if DEBUG
printf ("In tc_aout_pre_write_hook()\n");
#endif
}
*/
}
*/
#endif
/* Default the values of symbols known that should be "predefined". We
@ -1425,8 +1425,8 @@ md_undefined_symbol (name)
#endif
/* Register name. */
if (name[0] == 'r' || name[0] == 'R' || name[0] == 'a' || name[0] == 'b')
{
if (name[0] == 'r' || name[0] == 'R' || name[0] == 'a' || name[0] == 'b')
{
long maxreg;
/* Parse the number, make sure it has no extra zeroes or
@ -1489,7 +1489,7 @@ md_operand (expressionP)
long lab;
char *name;
symbolS *sym;
/* This is a local label. */
++input_line_pointer;
lab = (long) get_absolute_expression ();
@ -1541,7 +1541,7 @@ md_operand (expressionP)
type = 'x';
fieldlimit = 4;
}
else
else
return;
if (ISDIGIT (*s))
@ -1570,7 +1570,7 @@ md_operand (expressionP)
SKIP_WHITESPACE ();
input_line_pointer = s;
expressionP->X_op = O_constant;
expressionP->X_op = O_constant;
expressionP->X_unsigned = 1;
expressionP->X_add_number = ((floatbuf[fieldnum * 2]
<< LITTLENUM_NUMBER_OF_BITS)

6
gas/config/tc-pdp11.c
View File

@ -368,7 +368,7 @@ parse_expression (char *str, struct pdp11_code *operand)
#if 0
/* FIXME: what follows is broken badly. You can't deal with differences
in radix conventions this way, because of symbolic constants, constant
expressions made up of pieces of differing radix, etc. The only
expressions made up of pieces of differing radix, etc. The only
choices are to change ../expr.c to know about pdp11 conventions, or
to accept the fact that gas will use consistent conventions that differ
from those of traditional pdp11 assemblers. For now, I've
@ -446,7 +446,7 @@ parse_op_no_deferred (char *str, struct pdp11_code *operand)
operand->error = "Error in expression";
break;
}
/* it's a floating literal... */
/* it's a floating literal... */
know (operand->reloc.exp.X_add_number < 0);
flonum_gen2vax ('f', &generic_floating_point_number, literal_float);
operand->word = literal_float[0];
@ -579,7 +579,7 @@ parse_op (char *str, struct pdp11_code *operand)
operand->error = "Float AC not legal as integer operand";
return str;
}
return parse_op_noreg (str, operand);
}

10
gas/config/tc-ppc.c
View File

@ -921,7 +921,7 @@ md_parse_option (c, arg)
/* -mbooke64 means enable 64-bit BookE support. */
else if (strcmp (arg, "booke64") == 0)
{
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE |
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE |
PPC_OPCODE_BOOKE64 | PPC_OPCODE_64;
ppc_size = PPC_OPCODE_64;
}
@ -3214,7 +3214,7 @@ ppc_function (ignore)
/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
with the correct line number */
static symbolS *saved_bi_sym = 0;
static void
@ -3235,12 +3235,12 @@ ppc_bf (ignore)
SA_SET_SYM_LNNO (sym, coff_line_base);
/* Line number for bi. */
if (saved_bi_sym)
if (saved_bi_sym)
{
S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
saved_bi_sym = 0;
}
symbol_get_tc (sym)->output = 1;
@ -3307,7 +3307,7 @@ ppc_biei (ei)
symbol_get_tc (sym)->output = 1;
/* Save bi. */
if (ei)
if (ei)
saved_bi_sym = 0;
else
saved_bi_sym = sym;

4
gas/config/tc-ppc.h
View File

@ -1,5 +1,5 @@
/* tc-ppc.h -- Header file for tc-ppc.c.
Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support.
@ -245,7 +245,7 @@ extern int ppc_section_flags PARAMS ((int, int, int));
#define md_elf_section_flags(FLAGS, ATTR, TYPE) ppc_section_flags (FLAGS, ATTR, TYPE)
#if BFD_DEFAULT_TARGET_SIZE == 64
/* Extra sections for 64-bit ELF PPC. */
/* Extra sections for 64-bit ELF PPC. */
#define ELF_TC_SPECIAL_SECTIONS \
{ ".toc", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE}, \
{ ".tocbss", SHT_NOBITS, SHF_ALLOC + SHF_WRITE},

40
gas/config/tc-sh.c
View File

@ -433,7 +433,7 @@ const relax_typeS md_relax_table[C (END, 0)] = {
{ SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) },
/* C (SH64PCREL16PT_64, SH64PCREL32) */
{ SH64PCREL32_F,
SH64PCREL32_M,
SH64PCREL32_M,
SH64PCREL32_LENGTH,
C (SH64PCREL16PT_64, SH64PCREL48) },
/* C (SH64PCREL16PT_64, SH64PCREL48) */
@ -554,12 +554,12 @@ sh_check_fixup (main_exp, r_type_p)
plus/minus a symbol. However, gas' parser gives us:
O_subtract (O_add (f@PLT, .), .LPCS#+2)
so we attempt to transform this into:
O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
which we can handle simply below. */
which we can handle simply below. */
if (exp->X_op == O_subtract)
{
if (sh_PIC_related_p (exp->X_op_symbol))
@ -620,7 +620,7 @@ sh_check_fixup (main_exp, r_type_p)
case BFD_RELOC_UNUSED:
*r_type_p = BFD_RELOC_SH_GOTPC;
break;
default:
abort ();
}
@ -654,15 +654,15 @@ sh_check_fixup (main_exp, r_type_p)
case BFD_RELOC_32_GOTOFF:
*r_type_p = BFD_RELOC_SH_GOTOFF_LOW16;
break;
case BFD_RELOC_SH_GOTPLT32:
*r_type_p = BFD_RELOC_SH_GOTPLT_LOW16;
break;
case BFD_RELOC_32_GOT_PCREL:
*r_type_p = BFD_RELOC_SH_GOT_LOW16;
break;
case BFD_RELOC_32_PLT_PCREL:
*r_type_p = BFD_RELOC_SH_PLT_LOW16;
break;
@ -678,15 +678,15 @@ sh_check_fixup (main_exp, r_type_p)
case BFD_RELOC_32_GOTOFF:
*r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16;
break;
case BFD_RELOC_SH_GOTPLT32:
*r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16;
break;
case BFD_RELOC_32_GOT_PCREL:
*r_type_p = BFD_RELOC_SH_GOT_MEDLOW16;
break;
case BFD_RELOC_32_PLT_PCREL:
*r_type_p = BFD_RELOC_SH_PLT_MEDLOW16;
break;
@ -702,15 +702,15 @@ sh_check_fixup (main_exp, r_type_p)
case BFD_RELOC_32_GOTOFF:
*r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16;
break;
case BFD_RELOC_SH_GOTPLT32:
*r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16;
break;
case BFD_RELOC_32_GOT_PCREL:
*r_type_p = BFD_RELOC_SH_GOT_MEDHI16;
break;
case BFD_RELOC_32_PLT_PCREL:
*r_type_p = BFD_RELOC_SH_PLT_MEDHI16;
break;
@ -726,15 +726,15 @@ sh_check_fixup (main_exp, r_type_p)
case BFD_RELOC_32_GOTOFF:
*r_type_p = BFD_RELOC_SH_GOTOFF_HI16;
break;
case BFD_RELOC_SH_GOTPLT32:
*r_type_p = BFD_RELOC_SH_GOTPLT_HI16;
break;
case BFD_RELOC_32_GOT_PCREL:
*r_type_p = BFD_RELOC_SH_GOT_HI16;
break;
case BFD_RELOC_32_PLT_PCREL:
*r_type_p = BFD_RELOC_SH_PLT_HI16;
break;
@ -808,7 +808,7 @@ sh_cons_fix_new (frag, off, size, exp)
as_bad (_("unsupported BFD relocation size %u"), size);
r_type = BFD_RELOC_UNUSED;
}
fix_new_exp (frag, off, size, exp, 0, r_type);
}
@ -1582,7 +1582,7 @@ get_specific (opcode, operands)
{
if (nLastDestReg == user->reg)
as_warn (_("destination register is same for parallel insns"));
bIsPPI = false;
}
}
@ -3956,7 +3956,7 @@ sh_end_of_match (cont, what)
return cont + len;
return NULL;
}
}
int
sh_parse_name (name, exprP, nextcharP)
@ -4003,7 +4003,7 @@ sh_parse_name (name, exprP, nextcharP)
}
exprP->X_add_symbol = symbol_find_or_make (name);
if (*nextcharP != '@')
goto no_suffix;
else if ((next_end = sh_end_of_match (next + 1, "GOTOFF")))

30
gas/config/tc-sh64.c
View File

@ -230,12 +230,12 @@ shmedia_md_end ()
copy_symbol_attributes (symp, mainsym);
/* Unset the BranchTarget mark that can be set at
attribute-copying. */
attribute-copying. */
S_SET_OTHER (symp,
S_GET_OTHER (symp) & ~STO_SH5_ISA32);
S_GET_OTHER (symp) & ~STO_SH5_ISA32);
/* The GLOBAL and WEAK attributes are not copied
over by copy_symbol_attributes. Do it here. */
over by copy_symbol_attributes. Do it here. */
if (S_IS_WEAK (mainsym))
S_SET_WEAK (symp);
else if (S_IS_EXTERNAL (mainsym))
@ -471,7 +471,7 @@ sh64_adjust_symtab ()
if (main_symbol)
{
char *sym_name = (char *) S_GET_NAME (symp);
/* All datalabels not used in relocs should be gone by now.
We change those remaining to have the name of the main
@ -1095,7 +1095,7 @@ shmedia_md_convert_frag (output_bfd, seg, fragP, final)
reloctype = BFD_RELOC_32_GOTOFF;
reloc_needed = 1;
/* Fall through. */
case C (MOVI_IMM_64, UNDEF_MOVI):
case C (MOVI_IMM_64, MOVI_64):
{
@ -1155,7 +1155,7 @@ shmedia_md_convert_frag (output_bfd, seg, fragP, final)
reloctype = BFD_RELOC_32_GOTOFF;
reloc_needed = 1;
/* Fall through. */
case C (MOVI_IMM_32, UNDEF_MOVI):
case C (MOVI_IMM_32, MOVI_32):
{
@ -1329,7 +1329,7 @@ shmedia_md_convert_frag (output_bfd, seg, fragP, final)
movi_imm_64_pcrel_reloc_needed:
reloc_needed = 1;
/* Fall through. */
case C (MOVI_IMM_32_PCREL, MOVI_64):
case C (MOVI_IMM_64_PCREL, MOVI_64):
{
@ -2202,7 +2202,7 @@ shmedia_md_estimate_size_before_relax (fragP, segment_type)
case C (MOVI_IMM_64_PCREL, MOVI_GOTPC):
fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length;
break;
default:
abort ();
}
@ -2628,7 +2628,7 @@ shmedia_build_Mytes (opcode, operands)
opjp->reloctype = BFD_RELOC_SH_GOT_LOW16;
else if (opjp->reloctype == BFD_RELOC_SH_GOTPLT32)
opjp->reloctype = BFD_RELOC_SH_GOTPLT_LOW16;
if ((opjp->reloctype == BFD_RELOC_NONE
|| opjp->reloctype == BFD_RELOC_32_GOTOFF
|| opjp->reloctype == BFD_RELOC_32_PLT_PCREL
@ -2717,7 +2717,7 @@ shmedia_build_Mytes (opcode, operands)
opjp->reloctype == BFD_RELOC_NONE
? BFD_RELOC_SH_PT_16
: opjp->reloctype);
j++;
break;
}
@ -2757,7 +2757,7 @@ shmedia_build_Mytes (opcode, operands)
opjp->reloctype == BFD_RELOC_NONE
? SHMEDIA_BFD_RELOC_PT
: opjp->reloctype);
j++;
break;
}
@ -3098,7 +3098,7 @@ sh64_emit_crange (startsym, endsym, cr_type)
exp.X_op_symbol = startsym;
emit_expr (&exp, 4);
/* Emit the cr_size part. */
/* Emit the cr_size part. */
exp.X_op = O_constant;
exp.X_add_number = cr_type;
exp.X_add_symbol = NULL;
@ -3299,11 +3299,11 @@ sh64_consume_datalabel (name, exp, cp, operandf)
exp->X_add_symbol = dl_symp;
/* Unset the BranchTarget mark that can be set at symbol
creation or attributes copying. */
creation or attributes copying. */
S_SET_OTHER (dl_symp, S_GET_OTHER (dl_symp) & ~STO_SH5_ISA32);
/* The GLOBAL and WEAK attributes are not copied over by
copy_symbol_attributes. Do it here. */
copy_symbol_attributes. Do it here. */
if (S_IS_WEAK (symp))
S_SET_WEAK (dl_symp);
else if (S_IS_EXTERNAL (symp))
@ -3470,7 +3470,7 @@ sh64_flag_output ()
}
/* Vtables don't need "datalabel" but we allow it by simply deleting
any we find. */
any we find. */
static char *
strip_datalabels ()

4
gas/config/tc-tic54x.c
View File

@ -1712,7 +1712,7 @@ tic54x_float_cons (type)
/* The argument is capitalized if it should be zero-terminated
's' is normal string with upper 8-bits zero-filled, 'p' is packed.
Code copied from stringer, and slightly modified so that strings are packed
Code copied from stringer, and slightly modified so that strings are packed
and encoded into the correct octets. */
static void
@ -3325,7 +3325,7 @@ md_begin ()
tm->name, hash_err);
}
parop_hash = hash_new ();
for (tm = (template *) tic54x_paroptab; tm->name; tm++)
for (tm = (template *) tic54x_paroptab; tm->name; tm++)
{
if (hash_find (parop_hash, tm->name))
continue;

38
gas/config/tc-xstormy16.c
View File

@ -20,7 +20,7 @@
#include <stdio.h>
#include "as.h"
#include "subsegs.h"
#include "subsegs.h"
#include "symcat.h"
#include "opcodes/xstormy16-desc.h"
#include "opcodes/xstormy16-opc.h"
@ -78,7 +78,7 @@ md_show_usage (stream)
FILE * stream;
{
fprintf (stream, _(" XSTORMY16 specific command line options:\n"));
}
}
/* The target specific pseudo-ops which we support. */
const pseudo_typeS md_pseudo_table[] =
@ -92,7 +92,7 @@ void
md_begin ()
{
/* Initialize the `cgen' interface. */
/* Set the machine number and endian. */
gas_cgen_cpu_desc = xstormy16_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
CGEN_CPU_OPEN_ENDIAN,
@ -116,7 +116,7 @@ md_assemble (str)
insn.insn = xstormy16_cgen_assemble_insn
(gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
if (!insn.insn)
{
as_bad (errmsg);
@ -128,7 +128,7 @@ md_assemble (str)
CGEN_FIELDS_BITSIZE (& insn.fields), 0, NULL);
}
void
void
md_operand (e)
expressionS * e;
{
@ -204,7 +204,7 @@ xstormy16_cons_fix_new (f, where, nbytes, exp)
fix = fix_new_exp (f, where, nbytes, exp, 0, code);
}
/* Called while parsing an instruction to create a fixup.
/* Called while parsing an instruction to create a fixup.
Create BFD_RELOC_XSTORMY16_FPTR16 relocations. */
fixS *
@ -219,7 +219,7 @@ xstormy16_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp
{
fixS *fixP;
operatorT op = exp->X_op;
if (op == O_fptr_symbol)
exp->X_op = O_symbol;
@ -274,7 +274,7 @@ md_estimate_size_before_relax (fragP, segment)
{
/* No assembler relaxation is defined (or necessary) for this port. */
abort ();
}
}
/* *fragP has been relaxed to its final size, and now needs to have
the bytes inside it modified to conform to the new size.
@ -334,11 +334,11 @@ md_cgen_lookup_reloc (insn, operand, fixP)
case XSTORMY16_OPERAND_IMM12:
case XSTORMY16_OPERAND_HMEM8:
return BFD_RELOC_NONE;
case XSTORMY16_OPERAND_IMM8:
case XSTORMY16_OPERAND_LMEM8:
return fixP->fx_pcrel ? BFD_RELOC_8_PCREL : BFD_RELOC_8;
case XSTORMY16_OPERAND_IMM16:
fixP->fx_where += 2;
return fixP->fx_pcrel ? BFD_RELOC_16_PCREL : BFD_RELOC_16;
@ -353,7 +353,7 @@ md_cgen_lookup_reloc (insn, operand, fixP)
case XSTORMY16_OPERAND_REL12:
fixP->fx_where += 2;
/* Fall through... */
/* Fall through... */
case XSTORMY16_OPERAND_REL12A:
fixP->fx_pcrel = 1;
return BFD_RELOC_XSTORMY16_REL_12;
@ -392,14 +392,14 @@ xstormy16_fix_adjustable (fixP)
{
if (fixP->fx_addsy == NULL)
return 1;
/* Prevent all adjustments to global symbols. */
/* Prevent all adjustments to global symbols. */
if (S_IS_EXTERN (fixP->fx_addsy))
return 0;
if (S_IS_WEAK (fixP->fx_addsy))
return 0;
/* We need the symbol name for the VTABLE entries. */
if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
@ -446,7 +446,7 @@ xstormy16_md_apply_fix3 (fixP, valueP, seg)
default:
break;
}
/* FIXME FIXME FIXME: The value we are passed in *valuep includes
the symbol values. Since we are using BFD_ASSEMBLER, if we are
doing this relocation the code in write.c is going to call
@ -571,9 +571,9 @@ xstormy16_md_apply_fix3 (fixP, valueP, seg)
/* This is a RELA port. Thus, it does not need to store a
value if it is going to make a reloc. What's more, when
assembling a line like
.byte global-0x7f00
we'll get a spurious error message if we try to stuff 0x7f00 into
the byte. */
if (! fixP->fx_done)
@ -648,6 +648,6 @@ md_atof (type, litP, sizeP)
md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
litP += sizeof (LITTLENUM_TYPE);
}
return 0;
}

2
gas/config/tc-xstormy16.h
View File

@ -16,7 +16,7 @@
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
Boston, MA 02111-1307, USA. */
#define TC_XSTORMY16