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aarch64: rcpc3: add support in general_constraint_met_p
Given the introduction of the new address operand types for rcpc3 instructions, this patch adds the necessary logic to teach `general_constraint_met_p` how to proper handle these.
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@ -2114,6 +2114,19 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
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return 0;
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}
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break;
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case rcpc3:
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if (opnd->addr.writeback)
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if ((type == AARCH64_OPND_RCPC3_ADDR_PREIND_WB
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&& !opnd->addr.preind)
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|| (type == AARCH64_OPND_RCPC3_ADDR_POSTIND
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&& !opnd->addr.postind))
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{
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set_syntax_error (mismatch_detail, idx,
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_("unexpected address writeback"));
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return 0;
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}
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break;
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default:
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assert (opnd->addr.writeback == 0);
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break;
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@ -2493,6 +2506,33 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
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modifiers = 1 << AARCH64_MOD_UXTW;
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goto sve_zz_operand;
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case AARCH64_OPND_RCPC3_ADDR_OPT_PREIND_WB:
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case AARCH64_OPND_RCPC3_ADDR_OPT_POSTIND:
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case AARCH64_OPND_RCPC3_ADDR_PREIND_WB:
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case AARCH64_OPND_RCPC3_ADDR_POSTIND:
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{
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int num_bytes = calc_ldst_datasize (opnds);
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int abs_offset = (type == AARCH64_OPND_RCPC3_ADDR_OPT_PREIND_WB
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|| type == AARCH64_OPND_RCPC3_ADDR_PREIND_WB)
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? opnd->addr.offset.imm * -1
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: opnd->addr.offset.imm;
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if ((int) num_bytes != abs_offset
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&& opnd->addr.offset.imm != 0)
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{
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set_other_error (mismatch_detail, idx,
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_("invalid increment amount"));
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return 0;
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}
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}
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break;
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case AARCH64_OPND_RCPC3_ADDR_OFFSET:
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if (!value_in_range_p (opnd->addr.offset.imm, -256, 255))
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{
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set_imm_out_of_range_error (mismatch_detail, idx, -256, 255);
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return 0;
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}
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default:
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break;
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}
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