opcodes: add new sub-mnemonic disassembler style

When adding libopcodes disassembler styling support for AArch64, it
feels like the results would be improved by having a new sub-mnemonic
style.  This will be used in cases like:

  add    w16, w7, w1, uxtb #2
                      ^^^^----- Here

And:

  cinc   w0, w1, ne
                 ^^----- Here

This commit just adds the new style, and prepares objdump to handle
the style.  A later commit will add AArch64 styling, and will actually
make use of the style.

As this style is currently unused, there should be no user visible
changes after this commit.
This commit is contained in:
Andrew Burgess 2022-07-04 17:45:25 +01:00
parent 2cb10f02b0
commit 4f46c0bc36
2 changed files with 9 additions and 0 deletions

View File

@ -2167,6 +2167,7 @@ objdump_color_for_disassembler_style (enum disassembler_style style)
{
case dis_style_symbol: color = 32; break;
case dis_style_assembler_directive:
case dis_style_sub_mnemonic:
case dis_style_mnemonic: color = 33; break;
case dis_style_register: color = 34; break;
case dis_style_address:
@ -2185,6 +2186,7 @@ objdump_color_for_disassembler_style (enum disassembler_style style)
{
case dis_style_symbol: color = 40; break;
case dis_style_assembler_directive:
case dis_style_sub_mnemonic:
case dis_style_mnemonic: color = 142; break;
case dis_style_register: color = 27; break;
case dis_style_address:

View File

@ -62,6 +62,13 @@ enum disassembler_style
instructions. */
dis_style_mnemonic,
/* Some architectures include additional mnemonic like fields within the
instruction operands, e.g. on aarch64 'add w16, w7, w1, lsl #2' where
the 'lsl' is an additional piece of text that describes how the
instruction should behave. This sub-mnemonic style can be used for
these pieces of text. */
dis_style_sub_mnemonic,
/* For things that aren't real machine instructions, but rather
assembler directives, e.g. .byte, etc. */
dis_style_assembler_directive,