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2007-05-10 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (ShortForm): Redefined. (Jump): Likewise. (JumpDword): Likewise. (JumpByte): Likewise. (JumpInterSegment): Likewise. (FloatMF): Likewise. (FloatR): Likewise. (FloatD): Likewise. (Size16): Likewise. (Size32): Likewise. (Size64): Likewise. (IgnoreSize): Likewise. (DefaultSize): Likewise. (No_bSuf): Likewise. (No_wSuf): Likewise. (No_lSuf): Likewise. (No_sSuf): Likewise. (No_qSuf): Likewise. (No_xSuf): Likewise. (FWait): Likewise. (IsString): Likewise. (regKludge): Likewise. (IsPrefix): Likewise. (ImmExt): Likewise. (NoRex64): Likewise. (Rex64): Likewise. (Ugh): Likewise.
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2007-05-10 H.J. Lu <hongjiu.lu@intel.com>
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* i386-opc.h (ShortForm): Redefined.
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(Jump): Likewise.
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(JumpDword): Likewise.
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(JumpByte): Likewise.
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(JumpInterSegment): Likewise.
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(FloatMF): Likewise.
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(FloatR): Likewise.
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(FloatD): Likewise.
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(Size16): Likewise.
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(Size32): Likewise.
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(Size64): Likewise.
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(IgnoreSize): Likewise.
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(DefaultSize): Likewise.
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(No_bSuf): Likewise.
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(No_wSuf): Likewise.
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(No_lSuf): Likewise.
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(No_sSuf): Likewise.
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(No_qSuf): Likewise.
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(No_xSuf): Likewise.
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(FWait): Likewise.
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(IsString): Likewise.
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(regKludge): Likewise.
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(IsPrefix): Likewise.
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(ImmExt): Likewise.
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(NoRex64): Likewise.
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(Rex64): Likewise.
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(Ugh): Likewise.
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2007-05-07 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries
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@ -95,35 +95,35 @@ typedef struct template
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#define W 0x2 /* set if operands can be words or dwords
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encoded the canonical way */
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#define Modrm 0x4 /* insn has a modrm byte. */
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#define ShortForm 0x10 /* register is in low 3 bits of opcode */
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#define Jump 0x40 /* special case for jump insns. */
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#define JumpDword 0x80 /* call and jump */
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#define JumpByte 0x100 /* loop and jecxz */
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#define JumpInterSegment 0x200 /* special case for intersegment leaps/calls */
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#define FloatMF 0x400 /* FP insn memory format bit, sized by 0x4 */
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#define FloatR 0x800 /* src/dest swap for floats. */
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#define FloatD 0x1000 /* has float insn direction bit. */
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#define Size16 0x2000 /* needs size prefix if in 32-bit mode */
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#define Size32 0x4000 /* needs size prefix if in 16-bit mode */
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#define Size64 0x8000 /* needs size prefix if in 64-bit mode */
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#define IgnoreSize 0x10000 /* instruction ignores operand size prefix */
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#define DefaultSize 0x20000 /* default insn size depends on mode */
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#define No_bSuf 0x40000 /* b suffix on instruction illegal */
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#define No_wSuf 0x80000 /* w suffix on instruction illegal */
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#define No_lSuf 0x100000 /* l suffix on instruction illegal */
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#define No_sSuf 0x200000 /* s suffix on instruction illegal */
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#define No_qSuf 0x400000 /* q suffix on instruction illegal */
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#define No_xSuf 0x800000 /* x suffix on instruction illegal */
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#define FWait 0x1000000 /* instruction needs FWAIT */
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#define IsString 0x2000000 /* quick test for string instructions */
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#define regKludge 0x4000000 /* fake an extra reg operand for clr, imul
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#define ShortForm 0x8 /* register is in low 3 bits of opcode */
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#define Jump 0x10 /* special case for jump insns. */
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#define JumpDword 0x20 /* call and jump */
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#define JumpByte 0x40 /* loop and jecxz */
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#define JumpInterSegment 0x80 /* special case for intersegment leaps/calls */
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#define FloatMF 0x100 /* FP insn memory format bit, sized by 0x4 */
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#define FloatR 0x200 /* src/dest swap for floats. */
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#define FloatD 0x400 /* has float insn direction bit. */
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#define Size16 0x800 /* needs size prefix if in 32-bit mode */
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#define Size32 0x1000 /* needs size prefix if in 16-bit mode */
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#define Size64 0x2000 /* needs size prefix if in 64-bit mode */
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#define IgnoreSize 0x4000 /* instruction ignores operand size prefix */
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#define DefaultSize 0x8000 /* default insn size depends on mode */
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#define No_bSuf 0x10000 /* b suffix on instruction illegal */
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#define No_wSuf 0x20000 /* w suffix on instruction illegal */
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#define No_lSuf 0x40000 /* l suffix on instruction illegal */
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#define No_sSuf 0x80000 /* s suffix on instruction illegal */
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#define No_qSuf 0x100000 /* q suffix on instruction illegal */
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#define No_xSuf 0x200000 /* x suffix on instruction illegal */
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#define FWait 0x400000 /* instruction needs FWAIT */
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#define IsString 0x800000 /* quick test for string instructions */
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#define regKludge 0x1000000 /* fake an extra reg operand for clr, imul
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and special register processing for
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some instructions. */
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#define IsPrefix 0x8000000 /* opcode is a prefix */
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#define ImmExt 0x10000000 /* instruction has extension in 8 bit imm */
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#define NoRex64 0x20000000 /* instruction don't need Rex64 prefix. */
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#define Rex64 0x40000000 /* instruction require Rex64 prefix. */
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#define Ugh 0x80000000 /* deprecated fp insn, gets a warning */
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#define IsPrefix 0x2000000 /* opcode is a prefix */
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#define ImmExt 0x4000000 /* instruction has extension in 8 bit imm */
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#define NoRex64 0x8000000 /* instruction don't need Rex64 prefix. */
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#define Rex64 0x10000000 /* instruction require Rex64 prefix. */
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#define Ugh 0x20000000 /* deprecated fp insn, gets a warning */
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/* operand_types[i] describes the type of operand i. This is made
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by OR'ing together all of the possible type masks. (e.g.
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