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[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.

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bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g0_nc.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g0_nc.d: New.
	* gas/aarch64/reloc-tlsgd_g0_nc.s: New.
This commit is contained in:
Renlin Li 2015-10-02 16:28:49 +01:00
parent 94facae337
commit 3e8286c0d2
10 changed files with 69 additions and 0 deletions
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8
bfd/ChangeLog
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@ -1,3 +1,11 @@
2015-10-02 Renlin Li <renlin.li@arm.com>
* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC): New entry.
* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC.
* libbfd.h: Regenerate.
* bfd-in2.h: Likewise
2015-10-02 Renlin Li <renlin.li@arm.com>
* elfnn-aarch64.c (aarch64_reloc_got_type): Add

3
bfd/bfd-in2.h
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@ -5786,6 +5786,9 @@ tls_index structure. Used in conjunction with
BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21. */
BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC,
/* AArch64 TLS General Dynamic relocation. */
BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC,
/* AArch64 TLS General Dynamic relocation. */
BFD_RELOC_AARCH64_TLSGD_MOVW_G1,

16
bfd/elfnn-aarch64.c
View File

@ -168,6 +168,7 @@
((R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PREL21 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G1 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC \
@ -1007,6 +1008,21 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
/* Lower 16 bits of GOT offset to tls_index. */
HOWTO64 (AARCH64_R (TLSGD_MOVW_G0_NC), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSGD_MOVW_G0_NC), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* Higher 16 bits of GOT offset to tls_index. */
HOWTO64 (AARCH64_R (TLSGD_MOVW_G1), /* type */
16, /* rightshift */

1
bfd/libbfd.h
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@ -2755,6 +2755,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21",
"BFD_RELOC_AARCH64_TLSGD_ADR_PREL21",
"BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC",
"BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC",
"BFD_RELOC_AARCH64_TLSGD_MOVW_G1",
"BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1",
"BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC",

4
bfd/reloc.c
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@ -6829,6 +6829,10 @@ ENUMDOC
Unsigned 12 bit byte offset to global offset table entry for a symbols
tls_index structure. Used in conjunction with
BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
ENUM
BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC
ENUMDOC
AArch64 TLS General Dynamic relocation.
ENUM
BFD_RELOC_AARCH64_TLSGD_MOVW_G1
ENUMDOC

7
gas/ChangeLog
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@ -1,3 +1,10 @@
2015-10-02 Renlin Li <renlin.li@arm.com>
* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g0_nc.
(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
(md_apply_fix): Likewise.
(aarch64_force_relocation): Likewise.
2015-10-02 Renlin Li <renlin.li@arm.com>
* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g1.

12
gas/config/tc-aarch64.c
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@ -2500,6 +2500,15 @@ static struct reloc_table_entry reloc_table[] = {
0,
0},
/* Lower 16 bits address/value: MOVk. */
{"tlsgd_g0_nc", 0,
0, /* adr_type */
0,
BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC,
0,
0,
0},
/* Most significant bits 16-31 of address/value: MOVZ. */
{"tlsgd_g1", 0,
0, /* adr_type */
@ -4696,6 +4705,7 @@ process_movw_reloc_info (void)
case BFD_RELOC_AARCH64_MOVW_G0_NC:
case BFD_RELOC_AARCH64_MOVW_G0_S:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
@ -6926,6 +6936,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
@ -7155,6 +7166,7 @@ aarch64_force_relocation (struct fix *fixp)
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:

5
gas/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2015-10-02 Renlin Li <renlin.li@arm.com>
* gas/aarch64/reloc-tlsgd_g0_nc.d: New.
* gas/aarch64/reloc-tlsgd_g0_nc.s: New.
2015-10-02 Renlin Li <renlin.li@arm.com>
* gas/aarch64/reloc-tlsgd_g1.s: New.

9
gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d Normal file
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@ -0,0 +1,9 @@
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0000000000000000 <.*>:
0: f280001c movk x28, #0x0
0: R_AARCH64_TLSGD_MOVW_G0_NC var

4
gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.s Normal file
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@ -0,0 +1,4 @@
func:
// R_AARCH64_TLSGD_MOVW_G0_NC var
movk x28, #:tlsgd_g0_nc:var