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* alpha-opc.c (alpha_opcodes): Add wh64en.

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Richard Henderson 2001-12-06 18:29:22 +00:00
parent 08ea399688
commit 3793abc306
2 changed files with 7 additions and 2 deletions
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4
opcodes/ChangeLog
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@ -1,3 +1,7 @@
2001-12-06 Richard Henderson <rth@redhat.com>
* alpha-opc.c (alpha_opcodes): Add wh64en.
2001-12-04 Alexandre Oliva <aoliva@redhat.com> 2001-12-04 Alexandre Oliva <aoliva@redhat.com>
* d10v-opc.c (d10v_predefined_registers): Remove warnings * d10v-opc.c (d10v_predefined_registers): Remove warnings

5
opcodes/alpha-opc.c
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@ -30,10 +30,10 @@
almost all of the extended instruction mnemonics. This permits the almost all of the extended instruction mnemonics. This permits the
disassembler to use them, and simplifies the assembler logic, at the disassembler to use them, and simplifies the assembler logic, at the
cost of increasing the table size. The table is strictly constant cost of increasing the table size. The table is strictly constant
data, so the compiler should be able to put it in the .text section. data, so the compiler should be able to put it in the text segment.
This file also holds the operand table. All knowledge about inserting This file also holds the operand table. All knowledge about inserting
operands into instructions and vice-versa is kept in this file. and extracting operands from instructions is kept in this file.
The information for the base instruction set was compiled from the The information for the base instruction set was compiled from the
_Alpha Architecture Handbook_, Digital Order Number EC-QD2KB-TE, _Alpha Architecture Handbook_, Digital Order Number EC-QD2KB-TE,
@ -1103,6 +1103,7 @@ const struct alpha_opcode alpha_opcodes[] = {
{ "ecb", MFC(0x18,0xE800), BASE, { ZA, PRB } }, /* ev56 una */ { "ecb", MFC(0x18,0xE800), BASE, { ZA, PRB } }, /* ev56 una */
{ "rs", MFC(0x18,0xF000), BASE, { RA } }, { "rs", MFC(0x18,0xF000), BASE, { RA } },
{ "wh64", MFC(0x18,0xF800), BASE, { ZA, PRB } }, /* ev56 una */ { "wh64", MFC(0x18,0xF800), BASE, { ZA, PRB } }, /* ev56 una */
{ "wh64en", MFC(0x18,0xFC00), BASE, { ZA, PRB } }, /* ev7 una */
{ "hw_mfpr", OPR(0x19,0x00), EV4, { RA, RBA, EV4EXTHWINDEX } }, { "hw_mfpr", OPR(0x19,0x00), EV4, { RA, RBA, EV4EXTHWINDEX } },
{ "hw_mfpr", OP(0x19), OP_MASK, EV5, { RA, RBA, EV5HWINDEX } }, { "hw_mfpr", OP(0x19), OP_MASK, EV5, { RA, RBA, EV5HWINDEX } },