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cpu,opcodes,gas: fix explicit arguments to eBPF ldabs instructions
This patch fixes the eBPF CPU description in order to reflect the
right explicit arguments passed to the ldabs{b,h,w,dw} instructions,
updates the corresponding GAS tests, and updates the BPF section of
the GAS manual.
cpu/ChangeLog:
2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
* bpf.cpu (dlabs): New pmacro.
(dlind): Likewise.
opcodes/ChangeLog:
2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
* bpf-desc.c: Regenerate.
* bpf-opc.c: Likewise.
* bpf-opc.h: Likewise.
gas/ChangeLog:
2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
* testsuite/gas/bpf/mem.s: ldabs instructions do not take a `src'
register as an argument.
* testsuite/gas/bpf/mem.d: Updated accordingly.
* testsuite/gas/bpf/mem-be.d: Likewise.
* doc/c-bpf.texi (BPF Opcodes): Update to reflect the correct
explicit arguments to ldabs and ldind instructions.
This commit is contained in:
Jose E. Marchesi
parent
5b9d7a9a64
commit
3719fd55b6
@ -1,3 +1,8 @@
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2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
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* bpf.cpu (dlabs): New pmacro.
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(dlind): Likewise.
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2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
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* bpf.cpu (dlsi): ldabs and ldind instructions do not take an
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61
cpu/bpf.cpu
61
cpu/bpf.cpu
@ -466,36 +466,49 @@
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(define-lddw le)
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(define-lddw be)
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;; The absolute/indirect load instructions are non-generic loads
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;; designed to be used in socket filters. They come in several
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;; variants:
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;; The absolute load instructions are non-generic loads designed to be
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;; used in socket filters. They come in several variants:
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;;
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;; LD{abs,ind}{w,h,b,dw}le for the little-endian ISA
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;; LD{abs,ind}[w,h,b,dw}be for the big-endian ISA
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;; LDABS{w,h,b,dw}
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(define-pmacro (dlsi x-basename x-suffix x-class x-size x-mode x-endian)
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(dni (.sym x-basename x-suffix x-endian)
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(.str x-basename x-suffix)
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(define-pmacro (dlabs x-suffix x-size)
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(dni (.sym "ldabs" x-suffix)
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(.str "ldabs" x-suffix)
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(all-isas)
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(.str "ldabs" x-suffix " $imm32")
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(+ imm32 (f-offset16 0) (f-regs 0)
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OP_CLASS_LD OP_MODE_ABS (.sym OP_SIZE_ x-size))
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() ()))
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(dlabs "w" W)
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(dlabs "h" H)
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(dlabs "b" B)
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(dlabs "dw" DW)
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;; The indirect load instructions are non-generic loads designed to be
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;; used in socket filters. They come in several variants:
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;;
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;; LDIND{w,h,b,dw}le for the little-endian ISA
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;; LDIND[w,h,b,dw}be for the big-endian ISA
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(define-pmacro (dlind x-suffix x-size x-endian)
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(dni (.sym "ldind" x-suffix x-endian)
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(.str "ldind" x-suffix)
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((ISA (.sym ebpf x-endian)))
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(.str x-basename x-suffix " $src" x-endian ",$imm32")
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(.str "ldind" x-suffix " $src" x-endian ",$imm32")
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(+ imm32 (f-offset16 0) ((.sym f-dst x-endian) 0) (.sym src x-endian)
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(.sym OP_CLASS_ x-class) (.sym OP_SIZE_ x-size)
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(.sym OP_MODE_ x-mode)) () ()))
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OP_CLASS_LD OP_MODE_IND (.sym OP_SIZE_ x-size))
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() ()))
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(define-pmacro (define-ldabsind x-endian)
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(begin
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(dlsi "ldabs" "w" LD W ABS x-endian)
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(dlsi "ldabs" "h" LD H ABS x-endian)
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(dlsi "ldabs" "b" LD B ABS x-endian)
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(dlsi "ldabs" "dw" LD DW ABS x-endian)
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(dlsi "ldind" "w" LD W IND x-endian)
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(dlsi "ldind" "h" LD H IND x-endian)
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(dlsi "ldind" "b" LD B IND x-endian)
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(dlsi "ldind" "dw" LD DW IND x-endian)))
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(define-pmacro (define-ldind x-endian)
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(begin
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(dlind "w" W x-endian)
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(dlind "h" H x-endian)
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(dlind "b" B x-endian)
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(dlind "dw" DW x-endian)))
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(define-ldabsind le)
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(define-ldabsind be)
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(define-ldind le)
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(define-ldind be)
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;; Generic load and store instructions are provided for several word
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;; sizes. They come in several variants:
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@ -1,3 +1,12 @@
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2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
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* testsuite/gas/bpf/mem.s: ldabs instructions do not take a `src'
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register as an argument.
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* testsuite/gas/bpf/mem.d: Updated accordingly.
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* testsuite/gas/bpf/mem-be.d: Likewise.
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* doc/c-bpf.texi (BPF Opcodes): Update to reflect the correct
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explicit arguments to ldabs and ldind instructions.
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2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
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* testsuite/gas/bpf/mem.s: Do not use explicit arguments for
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@ -234,26 +234,26 @@ tree for more information.
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Absolute loads:
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@table @code
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@item ldabsdw %d, %s, imm32
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@item ldabsdw imm32
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Absolute 64-bit load.
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@item ldabsw %d, %s, imm32
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@item ldabsw imm32
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Absolute 32-bit load.
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@item ldabsh %d, %s, imm32
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@item ldabsh imm32
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Absolute 16-bit load.
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@item ldabsb %d, %s, imm32
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@item ldabsb imm32
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Absolute 8-bit load.
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@end table
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Indirect loads:
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@table @code
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@item ldinddw %d, %s, imm32
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@item ldinddw %s, imm32
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Indirect 64-bit load.
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@item ldindw %d, %s, imm32
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@item ldindw %s, imm32
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Indirect 32-bit load.
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@item ldindh %d, %s, imm32
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@item ldindh %s, imm32
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Indirect 16-bit load.
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@item ldindb %d, %s, imm32
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@item ldindb %s, imm32
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Indirect 8-bit load.
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@end table
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@ -8,10 +8,10 @@
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Disassembly of section .text:
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0+ <.text>:
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0: 20 03 00 00 00 00 be ef ldabsw %r3,0xbeef
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8: 28 05 00 00 00 00 be ef ldabsh %r5,0xbeef
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10: 30 07 00 00 00 00 be ef ldabsb %r7,0xbeef
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18: 38 09 00 00 00 00 be ef ldabsdw %r9,0xbeef
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0: 20 00 00 00 00 00 be ef ldabsw 0xbeef
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8: 28 00 00 00 00 00 be ef ldabsh 0xbeef
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10: 30 00 00 00 00 00 be ef ldabsb 0xbeef
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18: 38 00 00 00 00 00 be ef ldabsdw 0xbeef
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20: 40 03 00 00 00 00 be ef ldindw %r3,0xbeef
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28: 48 05 00 00 00 00 be ef ldindh %r5,0xbeef
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30: 50 07 00 00 00 00 be ef ldindb %r7,0xbeef
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@ -7,10 +7,10 @@
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Disassembly of section .text:
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0+ <.text>:
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0: 20 30 00 00 ef be 00 00 ldabsw %r3,0xbeef
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8: 28 50 00 00 ef be 00 00 ldabsh %r5,0xbeef
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10: 30 70 00 00 ef be 00 00 ldabsb %r7,0xbeef
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18: 38 90 00 00 ef be 00 00 ldabsdw %r9,0xbeef
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0: 20 00 00 00 ef be 00 00 ldabsw 0xbeef
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8: 28 00 00 00 ef be 00 00 ldabsh 0xbeef
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10: 30 00 00 00 ef be 00 00 ldabsb 0xbeef
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18: 38 00 00 00 ef be 00 00 ldabsdw 0xbeef
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20: 40 30 00 00 ef be 00 00 ldindw %r3,0xbeef
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28: 48 50 00 00 ef be 00 00 ldindh %r5,0xbeef
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30: 50 70 00 00 ef be 00 00 ldindb %r7,0xbeef
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@ -2,10 +2,10 @@
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.text
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ldabsw %r3, 0xbeef
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ldabsh %r5, 0xbeef
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ldabsb %r7, 0xbeef
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ldabsdw %r9, 0xbeef
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ldabsw 0xbeef
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ldabsh 0xbeef
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ldabsb 0xbeef
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ldabsdw 0xbeef
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ldindw %r3, 0xbeef
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ldindh %r5, 0xbeef
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ldindb %r7, 0xbeef
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@ -1,3 +1,9 @@
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2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
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* bpf-desc.c: Regenerate.
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* bpf-opc.c: Likewise.
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* bpf-opc.h: Likewise.
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2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
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* bpf-desc.c: Regenerate.
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@ -824,25 +824,25 @@ static const CGEN_IBASE bpf_cgen_insn_table[MAX_INSNS] =
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BPF_INSN_LDDWBE, "lddwbe", "lddw", 128,
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{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
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},
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/* ldabsw $srcle,$imm32 */
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/* ldabsw $imm32 */
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{
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BPF_INSN_LDABSWLE, "ldabswle", "ldabsw", 64,
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{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
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BPF_INSN_LDABSW, "ldabsw", "ldabsw", 64,
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{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }
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},
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/* ldabsh $srcle,$imm32 */
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/* ldabsh $imm32 */
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{
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BPF_INSN_LDABSHLE, "ldabshle", "ldabsh", 64,
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{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
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BPF_INSN_LDABSH, "ldabsh", "ldabsh", 64,
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{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }
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},
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/* ldabsb $srcle,$imm32 */
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/* ldabsb $imm32 */
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{
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BPF_INSN_LDABSBLE, "ldabsble", "ldabsb", 64,
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{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
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BPF_INSN_LDABSB, "ldabsb", "ldabsb", 64,
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{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }
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},
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/* ldabsdw $srcle,$imm32 */
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/* ldabsdw $imm32 */
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{
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BPF_INSN_LDABSDWLE, "ldabsdwle", "ldabsdw", 64,
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{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
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BPF_INSN_LDABSDW, "ldabsdw", "ldabsdw", 64,
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{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }
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},
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/* ldindw $srcle,$imm32 */
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{
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@ -864,26 +864,6 @@ static const CGEN_IBASE bpf_cgen_insn_table[MAX_INSNS] =
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BPF_INSN_LDINDDWLE, "ldinddwle", "ldinddw", 64,
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{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
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},
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/* ldabsw $srcbe,$imm32 */
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{
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BPF_INSN_LDABSWBE, "ldabswbe", "ldabsw", 64,
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{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
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},
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/* ldabsh $srcbe,$imm32 */
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{
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BPF_INSN_LDABSHBE, "ldabshbe", "ldabsh", 64,
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{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
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},
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/* ldabsb $srcbe,$imm32 */
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{
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BPF_INSN_LDABSBBE, "ldabsbbe", "ldabsb", 64,
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{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
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},
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/* ldabsdw $srcbe,$imm32 */
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{
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BPF_INSN_LDABSDWBE, "ldabsdwbe", "ldabsdw", 64,
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{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
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},
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/* ldindw $srcbe,$imm32 */
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{
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BPF_INSN_LDINDWBE, "ldindwbe", "ldindw", 64,
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@ -89,11 +89,15 @@ static const CGEN_IFMT ifmt_lddwbe ATTRIBUTE_UNUSED = {
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8, 128, 0xff, { { F (F_IMM64) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_SRCBE) }, { F (F_OP_CLASS) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_ldabswle ATTRIBUTE_UNUSED = {
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static const CGEN_IFMT ifmt_ldabsw ATTRIBUTE_UNUSED = {
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8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_REGS) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_OP_CLASS) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_ldindwle ATTRIBUTE_UNUSED = {
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8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_DSTLE) }, { F (F_OP_CLASS) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_ldabswbe ATTRIBUTE_UNUSED = {
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static const CGEN_IFMT ifmt_ldindwbe ATTRIBUTE_UNUSED = {
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8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_SRCBE) }, { F (F_OP_CLASS) }, { 0 } }
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};
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@ -792,101 +796,77 @@ static const CGEN_OPCODE bpf_cgen_insn_opcode_table[MAX_INSNS] =
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{ { MNEM, ' ', OP (DSTBE), ',', OP (IMM64), 0 } },
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& ifmt_lddwbe, { 0x18 }
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},
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/* ldabsw $srcle,$imm32 */
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/* ldabsw $imm32 */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
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& ifmt_ldabswle, { 0x20 }
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{ { MNEM, ' ', OP (IMM32), 0 } },
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& ifmt_ldabsw, { 0x20 }
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},
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/* ldabsh $srcle,$imm32 */
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/* ldabsh $imm32 */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
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& ifmt_ldabswle, { 0x28 }
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{ { MNEM, ' ', OP (IMM32), 0 } },
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& ifmt_ldabsw, { 0x28 }
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},
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/* ldabsb $srcle,$imm32 */
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/* ldabsb $imm32 */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
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& ifmt_ldabswle, { 0x30 }
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{ { MNEM, ' ', OP (IMM32), 0 } },
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& ifmt_ldabsw, { 0x30 }
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},
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/* ldabsdw $srcle,$imm32 */
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/* ldabsdw $imm32 */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
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& ifmt_ldabswle, { 0x38 }
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{ { MNEM, ' ', OP (IMM32), 0 } },
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& ifmt_ldabsw, { 0x38 }
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},
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/* ldindw $srcle,$imm32 */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
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& ifmt_ldabswle, { 0x40 }
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& ifmt_ldindwle, { 0x40 }
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},
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/* ldindh $srcle,$imm32 */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
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& ifmt_ldabswle, { 0x48 }
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& ifmt_ldindwle, { 0x48 }
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},
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/* ldindb $srcle,$imm32 */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
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& ifmt_ldabswle, { 0x50 }
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& ifmt_ldindwle, { 0x50 }
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},
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/* ldinddw $srcle,$imm32 */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
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& ifmt_ldabswle, { 0x58 }
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},
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/* ldabsw $srcbe,$imm32 */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
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& ifmt_ldabswbe, { 0x20 }
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},
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/* ldabsh $srcbe,$imm32 */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
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& ifmt_ldabswbe, { 0x28 }
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},
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/* ldabsb $srcbe,$imm32 */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
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& ifmt_ldabswbe, { 0x30 }
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},
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/* ldabsdw $srcbe,$imm32 */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
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& ifmt_ldabswbe, { 0x38 }
|
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& ifmt_ldindwle, { 0x58 }
|
||||
},
|
||||
/* ldindw $srcbe,$imm32 */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
|
||||
& ifmt_ldabswbe, { 0x40 }
|
||||
& ifmt_ldindwbe, { 0x40 }
|
||||
},
|
||||
/* ldindh $srcbe,$imm32 */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
|
||||
& ifmt_ldabswbe, { 0x48 }
|
||||
& ifmt_ldindwbe, { 0x48 }
|
||||
},
|
||||
/* ldindb $srcbe,$imm32 */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
|
||||
& ifmt_ldabswbe, { 0x50 }
|
||||
& ifmt_ldindwbe, { 0x50 }
|
||||
},
|
||||
/* ldinddw $srcbe,$imm32 */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
|
||||
& ifmt_ldabswbe, { 0x58 }
|
||||
& ifmt_ldindwbe, { 0x58 }
|
||||
},
|
||||
/* ldxw $dstle,[$srcle+$offset16] */
|
||||
{
|
||||
|
||||
@ -74,10 +74,9 @@ typedef enum cgen_insn_type {
|
||||
, BPF_INSN_MOVRBE, BPF_INSN_MOV32IBE, BPF_INSN_MOV32RBE, BPF_INSN_ARSHIBE
|
||||
, BPF_INSN_ARSHRBE, BPF_INSN_ARSH32IBE, BPF_INSN_ARSH32RBE, BPF_INSN_NEGBE
|
||||
, BPF_INSN_NEG32BE, BPF_INSN_ENDLELE, BPF_INSN_ENDBELE, BPF_INSN_ENDLEBE
|
||||
, BPF_INSN_ENDBEBE, BPF_INSN_LDDWLE, BPF_INSN_LDDWBE, BPF_INSN_LDABSWLE
|
||||
, BPF_INSN_LDABSHLE, BPF_INSN_LDABSBLE, BPF_INSN_LDABSDWLE, BPF_INSN_LDINDWLE
|
||||
, BPF_INSN_LDINDHLE, BPF_INSN_LDINDBLE, BPF_INSN_LDINDDWLE, BPF_INSN_LDABSWBE
|
||||
, BPF_INSN_LDABSHBE, BPF_INSN_LDABSBBE, BPF_INSN_LDABSDWBE, BPF_INSN_LDINDWBE
|
||||
, BPF_INSN_ENDBEBE, BPF_INSN_LDDWLE, BPF_INSN_LDDWBE, BPF_INSN_LDABSW
|
||||
, BPF_INSN_LDABSH, BPF_INSN_LDABSB, BPF_INSN_LDABSDW, BPF_INSN_LDINDWLE
|
||||
, BPF_INSN_LDINDHLE, BPF_INSN_LDINDBLE, BPF_INSN_LDINDDWLE, BPF_INSN_LDINDWBE
|
||||
, BPF_INSN_LDINDHBE, BPF_INSN_LDINDBBE, BPF_INSN_LDINDDWBE, BPF_INSN_LDXWLE
|
||||
, BPF_INSN_LDXHLE, BPF_INSN_LDXBLE, BPF_INSN_LDXDWLE, BPF_INSN_STXWLE
|
||||
, BPF_INSN_STXHLE, BPF_INSN_STXBLE, BPF_INSN_STXDWLE, BPF_INSN_LDXWBE
|
||||
|
||||
Loading…
Reference in New Issue
Block a user