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aarch64: rcpc3: Create implicit load/store size calc function

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The allowed immediate offsets in integer rcpc3 load store instructions
are not encoded explicitly in the instruction itself, being rather
implicitly equivalent to the amount of data loaded/stored by the
instruction.

This leads to the requirement that this quantity be calculated based on
the number of registers involved in the transfer, either as data
source or destination registers and their respective qualifiers.

This is done via `calc_ldst_datasize (const aarch64_opnd_info *opnds)'
implemented here, using a cumulative sum of qualifier sizes preceding
the address operand in the OPNDS operand list argument.
This commit is contained in:
Victor Do Nascimento 2024-01-09 16:22:07 +00:00
parent 9e263f69a7
commit 2f8890efc5
2 changed files with 25 additions and 0 deletions
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3
include/opcode/aarch64.h
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@ -1858,6 +1858,9 @@ aarch64_sve_dupm_mov_immediate_p (uint64_t, int);
extern bool
aarch64_cpu_supports_inst_p (aarch64_feature_set, aarch64_inst *);
extern int
calc_ldst_datasize (const aarch64_opnd_info *opnds);
#ifdef DEBUG_AARCH64
extern int debug_dump;

22
opcodes/aarch64-opc.c
View File

@ -1668,6 +1668,28 @@ check_za_access (const aarch64_opnd_info *opnd,
return true;
}
/* Given a load/store operation, calculate the size of transferred data via a
cumulative sum of qualifier sizes preceding the address operand in the
OPNDS operand list argument. */
int
calc_ldst_datasize (const aarch64_opnd_info *opnds)
{
unsigned num_bytes = 0; /* total number of bytes transferred. */
enum aarch64_operand_class opnd_class;
enum aarch64_opnd type;
for (int i = 0; i < AARCH64_MAX_OPND_NUM; i++)
{
type = opnds[i].type;
opnd_class = aarch64_operands[type].op_class;
if (opnd_class == AARCH64_OPND_CLASS_ADDRESS)
break;
num_bytes += aarch64_get_qualifier_esize (opnds[i].qualifier);
}
return num_bytes;
}
/* General constraint checking based on operand code.
Return 1 if OPNDS[IDX] meets the general constraint of operand code TYPE