2
0
mirror of https://sourceware.org/git/binutils-gdb.git synced 2025-02-23 13:21:43 +08:00

Fix for PR18233, emit a NOP after a relaxable 16 bit insn so that optimised

insns will start on a 32 bit boundary.
This commit is contained in:
Nick Clifton 1998-12-21 12:42:28 +00:00
parent 6535b1df92
commit 29388c2520
2 changed files with 29 additions and 2 deletions

View File

@ -1,3 +1,9 @@
1998-12-21 Nick Clifton <nickc@cygnus.com>
* config/tc-m32r.c (md_assemble): Emit a NOP after a relaxable 16
bit insn when optimizing, so that parallelised instructions will
start on a 32 bit boundary.
1998-12-19 Gavin Romig-Koch <gavin@cygnus.com>
* config/tc-mips.c (mips_eabi64): New.

View File

@ -731,6 +731,7 @@ target_make_parallel (buffer)
/* Assemble two instructions with an explicit parallel operation (||) or
sequential operation (->). */
static void
assemble_two_insns (str, str2, parallel_p)
char * str;
@ -761,7 +762,14 @@ assemble_two_insns (str, str2, parallel_p)
return;
}
if (! enable_special
/* Check it. */
if (CGEN_FIELDS_BITSIZE (&first.fields) != 16)
{
/* xgettext:c-format */
as_bad (_("not a 16 bit instruction '%s'"), str);
return;
}
else if (! enable_special
&& CGEN_INSN_ATTR (first.insn, CGEN_INSN_SPECIAL))
{
/* xgettext:c-format */
@ -838,7 +846,13 @@ assemble_two_insns (str, str2, parallel_p)
}
/* Check it. */
if (! enable_special
if (CGEN_FIELDS_BITSIZE (&second.fields) != 16)
{
/* xgettext:c-format */
as_bad (_("not a 16 bit instruction '%s'"), str);
return;
}
else if (! enable_special
&& CGEN_INSN_ATTR (second.insn, CGEN_INSN_SPECIAL))
{
/* xgettext:c-format */
@ -1040,6 +1054,13 @@ md_assemble (str)
insn.orig_insn = insn.insn;
/* start-sanitize-m32rx */
/* If the previous insn was relaxable, then it may be expanded
to fill the current 16 bit slot. Emit a NOP here to occupy
this slot, so that we can start at optimizing at a 32 bit
boundary. */
if (prev_insn.insn && seen_relaxable_p && optimize)
fill_insn (0);
if (enable_m32rx)
{
/* Get the indices of the operands of the instruction.