x86: avoid attaching suffix to register-only CRC32

Just like other insns with GPR operands, CRC32 with only register
operands should not get a suffix added unless in suffix-always mode.
Do away with CRC32_Fixup() altogether, using other more generic logic
instead.
This commit is contained in:
Jan Beulich 2020-07-14 10:25:43 +02:00
parent e184e6110e
commit 2875b28aa8
35 changed files with 171 additions and 750 deletions

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@ -1,3 +1,34 @@
2020-07-14 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/crc32-suffix.d,
testsuite/gas/i386/x86-64-crc32-suffix.d: New.
* testsuite/gas/i386/i386.exp: Run new tests.
* testsuite/gas/i386/arch-10-bdver1.d,
testsuite/gas/i386/arch-10-bdver2.d,
testsuite/gas/i386/arch-10-bdver3.d,
testsuite/gas/i386/arch-10-bdver4.d,
testsuite/gas/i386/arch-10-btver1.d,
testsuite/gas/i386/arch-10-btver2.d,
testsuite/gas/i386/arch-10-lzcnt.d,
testsuite/gas/i386/arch-10-prefetchw.d,
testsuite/gas/i386/arch-10.d, testsuite/gas/i386/arch-2.d,
testsuite/gas/i386/arch-3.d, testsuite/gas/i386/arch-5.d,
testsuite/gas/i386/arch-6.d, testsuite/gas/i386/crc32.d,
testsuite/gas/i386/sse-noavx.d, testsuite/gas/i386/sse4_2.d,
testsuite/gas/i386/x86-64-arch-2-bdver1.d,
testsuite/gas/i386/x86-64-arch-2-bdver2.d,
testsuite/gas/i386/x86-64-arch-2-bdver3.d,
testsuite/gas/i386/x86-64-arch-2-bdver4.d,
testsuite/gas/i386/x86-64-arch-2-btver1.d,
testsuite/gas/i386/x86-64-arch-2-btver2.d,
testsuite/gas/i386/x86-64-arch-2-lzcnt.d,
testsuite/gas/i386/x86-64-arch-2-prefetchw.d,
testsuite/gas/i386/x86-64-arch-2.d,
testsuite/gas/i386/x86-64-crc32.d,
testsuite/gas/i386/x86-64-pseudos.d,
testsuite/gas/i386/x86-64-sse-noavx.d,
testsuite/gas/i386/x86-64-sse4_2.d: Adjust expectations.
2020-07-14 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/x86-64-pseudos.s: Add empty-REX tests for

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@ -2,41 +2,4 @@
#as: -march=bdver1+vmx+smx+xsaveopt+fma+movbe+ept+padlock+bmi+tbm
#objdump: -dw
#name: i386 arch 10 (bdver1)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: arch-10.d

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@ -2,41 +2,4 @@
#as: -march=bdver2+vmx+smx+xsaveopt+movbe+ept+padlock
#objdump: -dw
#name: i386 arch 10 (bdver2)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: arch-10.d

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@ -2,41 +2,4 @@
#as: -march=bdver3+vmx+smx+movbe+ept+padlock
#objdump: -dw
#name: i386 arch 10 (bdver3)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: arch-10.d

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@ -2,41 +2,4 @@
#as: -march=bdver4+vmx+smx+ept+padlock
#objdump: -dw
#name: i386 arch 10 (bdver4)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: arch-10.d

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@ -2,41 +2,4 @@
#as: -march=btver1+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+padlock+fma+bmi+tbm
#objdump: -dw
#name: i386 arch 10 (btver1)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: arch-10.d

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@ -2,41 +2,4 @@
#as: -march=btver2+smx+vmx+ept+padlock+fma+tbm
#objdump: -dw
#name: i386 arch 10 (btver2)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: arch-10.d

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@ -2,41 +2,4 @@
#as: -march=i686+nop+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+lzcnt+padlock+bmi+tbm
#objdump: -dw
#name: i386 arch 10 (lzcnt)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: arch-10.d

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@ -2,41 +2,4 @@
#as: -march=i686+mmx+nop+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+sse4a+svme+lzcnt+padlock+bmi+tbm+prfchw
#objdump: -dw
#name: i386 arch 10 (prefetchw)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: arch-10.d

View File

@ -16,7 +16,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec

View File

@ -11,5 +11,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 0f 3a 08 c1 00 roundps \$0x0,%xmm1,%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 0b c1 00 roundsd \$0x0,%xmm1,%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 0a c1 00 roundss \$0x0,%xmm1,%xmm0
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 %ecx,%ebx
#pass

View File

@ -1,15 +1,3 @@
#objdump: -dw
#name: i386 arch 3
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 66 0f 38 17 c1 ptest %xmm1,%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 09 c1 00 roundpd \$0x0,%xmm1,%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 08 c1 00 roundps \$0x0,%xmm1,%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 0b c1 00 roundsd \$0x0,%xmm1,%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 0a c1 00 roundss \$0x0,%xmm1,%xmm0
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
#pass
#dump: arch-2.d

View File

@ -7,5 +7,5 @@ Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: f3 0f b8 d9 popcnt %ecx,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 %ecx,%ebx
#pass

View File

@ -7,5 +7,5 @@ Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: f3 0f b8 d9 popcnt %ecx,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 %ecx,%ebx
#pass

View File

@ -0,0 +1,25 @@
#objdump: -dwMsuffix
#name: i386 crc32 w/ suffix
#source: crc32.s
.*: file format .*
Disassembly of section .text:
0+ <foo>:
[ ]*[a-f0-9]+: f2 0f 38 f0 06 crc32b \(%esi\),%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 06 crc32w \(%esi\),%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 06 crc32l \(%esi\),%eax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32b %al,%eax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32b %al,%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32w %ax,%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32w %ax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32l %eax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32l %eax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f0 06 crc32b \(%esi\),%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 06 crc32w \(%esi\),%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 06 crc32l \(%esi\),%eax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32b %al,%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32w %ax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32l %eax,%eax
#pass

View File

@ -9,16 +9,16 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: f2 0f 38 f0 06 crc32b \(%esi\),%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 06 crc32w \(%esi\),%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 06 crc32l \(%esi\),%eax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32b %al,%eax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32b %al,%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32w %ax,%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32w %ax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32l %eax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32l %eax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32 %al,%eax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32 %al,%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32 %ax,%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32 %ax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32 %eax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32 %eax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f0 06 crc32b \(%esi\),%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 06 crc32w \(%esi\),%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 06 crc32l \(%esi\),%eax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32b %al,%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32w %ax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32l %eax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32 %al,%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32 %ax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32 %eax,%eax
#pass

View File

@ -149,6 +149,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "sse4_2-intel"
run_dump_test "crc32"
run_dump_test "crc32-intel"
run_dump_test "crc32-suffix"
run_list_test "inval-crc32" "-al"
run_dump_test "simd"
run_dump_test "simd-intel"
@ -777,6 +778,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-sse4_2-intel"
run_dump_test "x86-64-crc32"
run_dump_test "x86-64-crc32-intel"
run_dump_test "x86-64-crc32-suffix"
run_list_test "x86-64-inval-crc32" "-al"
run_dump_test "x86-64-simd"
run_dump_test "x86-64-simd-intel"

View File

@ -7,7 +7,7 @@
Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32b %cl,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32 %cl,%ebx
[ ]*[a-f0-9]+: 66 0f 2d d3 cvtpd2pi %xmm3,%mm2
[ ]*[a-f0-9]+: 66 0f 2a d3 cvtpi2pd %mm3,%xmm2
[ ]*[a-f0-9]+: 0f 2a d3 cvtpi2ps %mm3,%xmm2

View File

@ -6,15 +6,15 @@
Disassembly of section .text:
0+000 <foo>:
[ ]*[0-9a-f]+: f2 0f 38 f0 d9 crc32b %cl,%ebx
[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9 crc32w %cx,%ebx
[ ]*[0-9a-f]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[0-9a-f]+: f2 0f 38 f0 d9 crc32 %cl,%ebx
[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9 crc32 %cx,%ebx
[ ]*[0-9a-f]+: f2 0f 38 f1 d9 crc32 %ecx,%ebx
[ ]*[0-9a-f]+: f2 0f 38 f0 19 crc32b \(%ecx\),%ebx
[ ]*[0-9a-f]+: 66 f2 0f 38 f1 19 crc32w \(%ecx\),%ebx
[ ]*[0-9a-f]+: f2 0f 38 f1 19 crc32l \(%ecx\),%ebx
[ ]*[0-9a-f]+: f2 0f 38 f0 d9 crc32b %cl,%ebx
[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9 crc32w %cx,%ebx
[ ]*[0-9a-f]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[0-9a-f]+: f2 0f 38 f0 d9 crc32 %cl,%ebx
[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9 crc32 %cx,%ebx
[ ]*[0-9a-f]+: f2 0f 38 f1 d9 crc32 %ecx,%ebx
[ ]*[0-9a-f]+: 66 0f 38 37 01 pcmpgtq \(%ecx\),%xmm0
[ ]*[0-9a-f]+: 66 0f 38 37 c1 pcmpgtq %xmm1,%xmm0
[ ]*[0-9a-f]+: 66 0f 3a 61 01 00 pcmpestri \$0x0,\(%ecx\),%xmm0
@ -33,15 +33,15 @@ Disassembly of section .text:
[ ]*[0-9a-f]+: f3 0f b8 d9 popcnt %ecx,%ebx
[ ]*[0-9a-f]+: 66 f3 0f b8 d9 popcnt %cx,%bx
[ ]*[0-9a-f]+: f3 0f b8 d9 popcnt %ecx,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32b %cl,%ebx
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9 crc32w %cx,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32 %cl,%ebx
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9 crc32 %cx,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 %ecx,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f0 19 crc32b \(%ecx\),%ebx
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 19 crc32w \(%ecx\),%ebx
[ ]*[a-f0-9]+: f2 0f 38 f1 19 crc32l \(%ecx\),%ebx
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32b %cl,%ebx
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9 crc32w %cx,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32 %cl,%ebx
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9 crc32 %cx,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 %ecx,%ebx
[ ]*[a-f0-9]+: 66 0f 38 37 01 pcmpgtq \(%ecx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq %xmm1,%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 61 01 00 pcmpestri \$0x0,\(%ecx\),%xmm0

View File

@ -2,41 +2,4 @@
#as: -march=bdver1+vmx+smx+xsaveopt+fma+movbe+ept+padlock+bmi+tbm
#objdump: -dw
#name: x86-64 arch 2 (bdver1)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%rcx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx
[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: x86-64-arch-2.d

View File

@ -2,41 +2,4 @@
#as: -march=bdver2+vmx+smx+xsaveopt+movbe+ept+padlock
#objdump: -dw
#name: x86-64 arch 2 (bdver2)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%rcx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx
[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: x86-64-arch-2.d

View File

@ -2,41 +2,4 @@
#as: -march=bdver3+vmx+smx+movbe+ept+padlock
#objdump: -dw
#name: x86-64 arch 2 (bdver3)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%rcx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx
[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: x86-64-arch-2.d

View File

@ -2,41 +2,4 @@
#as: -march=bdver4+vmx+smx+ept+padlock
#objdump: -dw
#name: x86-64 arch 2 (bdver4)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%rcx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx
[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: x86-64-arch-2.d

View File

@ -2,41 +2,4 @@
#as: -march=btver1+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+padlock+fma+bmi+tbm
#objdump: -dw
#name: x86-64 arch 2 (btver1)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%rcx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx
[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: x86-64-arch-2.d

View File

@ -2,41 +2,4 @@
#as: -march=btver2+smx+vmx+ept+padlock+fma+tbm
#objdump: -dw
#name: x86-64 arch 2 (btver2)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%rcx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx
[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: x86-64-arch-2.d

View File

@ -2,41 +2,4 @@
#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+lzcnt+padlock+bmi+tbm
#objdump: -dw
#name: x86-64 arch 2 (lzcnt)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%rcx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx
[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: x86-64-arch-2.d

View File

@ -2,41 +2,4 @@
#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+sse4a+svme+lzcnt+padlock+bmi+tbm+prfchw
#objdump: -dw
#name: x86-64 arch 2 (prefetchw)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec
[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%rcx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx
[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
#dump: x86-64-arch-2.d

View File

@ -16,7 +16,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 %ecx,%ebx
[ ]*[a-f0-9]+: c5 fc 77 vzeroall
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
[ ]*[a-f0-9]+: 0f 37 getsec

View File

@ -0,0 +1,35 @@
#objdump: -dwMsuffix
#name: x86-64 crc32 w/ suffix
#source: x86-64-crc32.s
.*: file format .*
Disassembly of section .text:
0+ <foo>:
[ ]*[a-f0-9]+: f2 0f 38 f0 06 crc32b \(%rsi\),%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f0 06 crc32b \(%rsi\),%rax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 06 crc32w \(%rsi\),%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 06 crc32l \(%rsi\),%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f1 06 crc32q \(%rsi\),%rax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32b %al,%eax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32b %al,%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0 crc32b %al,%rax
[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0 crc32b %al,%rax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32w %ax,%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32w %ax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32l %eax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32l %eax,%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0 crc32q %rax,%rax
[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0 crc32q %rax,%rax
[ ]*[a-f0-9]+: f2 48 0f 38 f0 06 crc32b \(%rsi\),%rax
[ ]*[a-f0-9]+: f2 0f 38 f0 06 crc32b \(%rsi\),%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 06 crc32w \(%rsi\),%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 06 crc32l \(%rsi\),%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f1 06 crc32q \(%rsi\),%rax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32b %al,%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0 crc32b %al,%rax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32w %ax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32l %eax,%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0 crc32q %rax,%rax
#pass

View File

@ -11,24 +11,24 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 06 crc32w \(%rsi\),%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 06 crc32l \(%rsi\),%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f1 06 crc32q \(%rsi\),%rax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32b %al,%eax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32b %al,%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0 crc32b %al,%rax
[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0 crc32b %al,%rax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32w %ax,%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32w %ax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32l %eax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32l %eax,%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0 crc32q %rax,%rax
[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0 crc32q %rax,%rax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32 %al,%eax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32 %al,%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0 crc32 %al,%rax
[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0 crc32 %al,%rax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32 %ax,%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32 %ax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32 %eax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32 %eax,%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0 crc32 %rax,%rax
[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0 crc32 %rax,%rax
[ ]*[a-f0-9]+: f2 48 0f 38 f0 06 crc32b \(%rsi\),%rax
[ ]*[a-f0-9]+: f2 0f 38 f0 06 crc32b \(%rsi\),%eax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 06 crc32w \(%rsi\),%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 06 crc32l \(%rsi\),%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f1 06 crc32q \(%rsi\),%rax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32b %al,%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0 crc32b %al,%rax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32w %ax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32l %eax,%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0 crc32q %rax,%rax
[ ]*[a-f0-9]+: f2 0f 38 f0 c0 crc32 %al,%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0 crc32 %al,%rax
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0 crc32 %ax,%eax
[ ]*[a-f0-9]+: f2 0f 38 f1 c0 crc32 %eax,%eax
[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0 crc32 %rax,%rax
#pass

View File

@ -305,7 +305,7 @@ Disassembly of section .text:
+[a-f0-9]+: 40 a0 01 00 00 00 00 00 00 00 rex movabs 0x1,%al
+[a-f0-9]+: 40 38 ca rex cmp %cl,%dl
+[a-f0-9]+: 40 b3 01 rex mov \$(0x)?1,%bl
+[a-f0-9]+: f2 40 0f 38 f0 c1 rex crc32b? %cl,%eax
+[a-f0-9]+: f2 40 0f 38 f0 c1 rex crc32 %cl,%eax
+[a-f0-9]+: 40 89 c3 rex mov %eax,%ebx
+[a-f0-9]+: 41 89 c6 mov %eax,%r14d
+[a-f0-9]+: 41 89 00 mov %eax,\(%r8\)

View File

@ -8,7 +8,7 @@ Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: 48 0f c7 08 cmpxchg16b \(%rax\)
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32b %cl,%ebx
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32 %cl,%ebx
[ ]*[a-f0-9]+: 66 0f 2d d3 cvtpd2pi %xmm3,%mm2
[ ]*[a-f0-9]+: 66 0f 2a d3 cvtpi2pd %mm3,%xmm2
[ ]*[a-f0-9]+: 0f 2a d3 cvtpi2ps %mm3,%xmm2

View File

@ -6,20 +6,20 @@
Disassembly of section .text:
0+000 <foo>:
[ ]*[0-9a-f]+: f2 0f 38 f0 d9 crc32b %cl,%ebx
[ ]*[0-9a-f]+: f2 48 0f 38 f0 d9 crc32b %cl,%rbx
[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9 crc32w %cx,%ebx
[ ]*[0-9a-f]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[0-9a-f]+: f2 48 0f 38 f1 d9 crc32q %rcx,%rbx
[ ]*[0-9a-f]+: f2 0f 38 f0 d9 crc32 %cl,%ebx
[ ]*[0-9a-f]+: f2 48 0f 38 f0 d9 crc32 %cl,%rbx
[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9 crc32 %cx,%ebx
[ ]*[0-9a-f]+: f2 0f 38 f1 d9 crc32 %ecx,%ebx
[ ]*[0-9a-f]+: f2 48 0f 38 f1 d9 crc32 %rcx,%rbx
[ ]*[0-9a-f]+: f2 0f 38 f0 19 crc32b \(%rcx\),%ebx
[ ]*[0-9a-f]+: 66 f2 0f 38 f1 19 crc32w \(%rcx\),%ebx
[ ]*[0-9a-f]+: f2 0f 38 f1 19 crc32l \(%rcx\),%ebx
[ ]*[0-9a-f]+: f2 48 0f 38 f1 19 crc32q \(%rcx\),%rbx
[ ]*[0-9a-f]+: f2 0f 38 f0 d9 crc32b %cl,%ebx
[ ]*[0-9a-f]+: f2 48 0f 38 f0 d9 crc32b %cl,%rbx
[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9 crc32w %cx,%ebx
[ ]*[0-9a-f]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
[ ]*[0-9a-f]+: f2 48 0f 38 f1 d9 crc32q %rcx,%rbx
[ ]*[0-9a-f]+: f2 0f 38 f0 d9 crc32 %cl,%ebx
[ ]*[0-9a-f]+: f2 48 0f 38 f0 d9 crc32 %cl,%rbx
[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9 crc32 %cx,%ebx
[ ]*[0-9a-f]+: f2 0f 38 f1 d9 crc32 %ecx,%ebx
[ ]*[0-9a-f]+: f2 48 0f 38 f1 d9 crc32 %rcx,%rbx
[ ]*[0-9a-f]+: 66 0f 38 37 01 pcmpgtq \(%rcx\),%xmm0
[ ]*[0-9a-f]+: 66 0f 38 37 c1 pcmpgtq %xmm1,%xmm0
[ ]*[0-9a-f]+: 66 0f 3a 61 01 00 pcmpestril? \$0x0,\(%rcx\),%xmm0

View File

@ -1,3 +1,8 @@
2020-07-14 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (CRC32_Fixup): Delete.
(prefix_table): Use Eb/Ev for crc32 entries.
2020-07-14 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):

View File

@ -115,7 +115,6 @@ static void HLE_Fixup2 (int, int);
static void HLE_Fixup3 (int, int);
static void CMPXCHG8B_Fixup (int, int);
static void XMM_Fixup (int, int);
static void CRC32_Fixup (int, int);
static void FXSAVE_Fixup (int, int);
static void PCMPESTR_Fixup (int, int);
@ -4426,7 +4425,7 @@ static const struct dis386 prefix_table[][4] = {
{ "movbeS", { Gv, { MOVBE_Fixup, v_mode } }, PREFIX_OPCODE },
{ Bad_Opcode },
{ "movbeS", { Gv, { MOVBE_Fixup, v_mode } }, PREFIX_OPCODE },
{ "crc32", { Gdq, { CRC32_Fixup, b_mode } }, PREFIX_OPCODE },
{ "crc32A", { Gdq, Eb }, PREFIX_OPCODE },
},
/* PREFIX_0F38F1 */
@ -4434,7 +4433,7 @@ static const struct dis386 prefix_table[][4] = {
{ "movbeS", { { MOVBE_Fixup, v_mode }, Gv }, PREFIX_OPCODE },
{ Bad_Opcode },
{ "movbeS", { { MOVBE_Fixup, v_mode }, Gv }, PREFIX_OPCODE },
{ "crc32", { Gdq, { CRC32_Fixup, v_mode } }, PREFIX_OPCODE },
{ "crc32Q", { Gdq, Ev }, PREFIX_OPCODE },
},
/* PREFIX_0F38F5 */
@ -16369,78 +16368,6 @@ XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
oappend (names[reg]);
}
static void
CRC32_Fixup (int bytemode, int sizeflag)
{
/* Add proper suffix to "crc32". */
char *p = mnemonicendp;
switch (bytemode)
{
case b_mode:
if (intel_syntax)
goto skip;
*p++ = 'b';
break;
case v_mode:
if (intel_syntax)
goto skip;
USED_REX (REX_W);
if (rex & REX_W)
*p++ = 'q';
else
{
if (sizeflag & DFLAG)
*p++ = 'l';
else
*p++ = 'w';
used_prefixes |= (prefixes & PREFIX_DATA);
}
break;
default:
oappend (INTERNAL_DISASSEMBLER_ERROR);
break;
}
mnemonicendp = p;
*p = '\0';
skip:
if (modrm.mod == 3)
{
int add;
/* Skip mod/rm byte. */
MODRM_CHECK;
codep++;
USED_REX (REX_B);
add = (rex & REX_B) ? 8 : 0;
if (bytemode == b_mode)
{
if (modrm.rm & 4)
USED_REX (0);
if (rex)
oappend (names8rex[modrm.rm + add]);
else
oappend (names8[modrm.rm + add]);
}
else
{
USED_REX (REX_W);
if (rex & REX_W)
oappend (names64[modrm.rm + add]);
else if ((prefixes & PREFIX_DATA))
oappend (names16[modrm.rm + add]);
else
oappend (names32[modrm.rm + add]);
}
}
else
OP_E (bytemode, sizeflag);
}
static void
FXSAVE_Fixup (int bytemode, int sizeflag)
{