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GAS/MIPS: Add `-mfix-r5900' option for the R5900 short loop erratum
`-march=r5900' already enables the R5900 short loop workaround. However, the R5900 ISA and most other MIPS ISAs are mutually exclusive since R5900-specific instructions are generated as well. The `-mfix-r5900' option can be used in combination with e.g. `-mips2' or `-mips3' to generate generic MIPS binaries that also work with the R5900 target. This change has been tested with `make RUNTESTFLAGS=mips.exp check-gas' for the targets `mipsr5900el-unknown-linux-gnu', `mipsr5900el-elf' and `mips3-unknown-linux-gnu'. gas/ * config/tc-mips.c (mips_fix_r5900, mips_fix_r5900_explicit): New variables. (options): Add OPTION_FIX_R5900 and OPTION_NO_FIX_R5900 enumeration constants. (md_longopts): Add "mfix-r5900" and "mno-fix-r5900" options. (can_swap_branch_p, md_parse_option, mips_after_parse_args): Handle the new options. (md_show_usage): Document the `-mfix-r5900' option. * doc/as.texi: Likewise. * doc/c-mips.texi: Likewise. * testsuite/gas/mips/mips.exp: Run R5900 dump tests. * testsuite/gas/mips/r5900-fix.d: Test `-mfix-r5900' option. * testsuite/gas/mips/r5900-fix.s: Likewise. * testsuite/gas/mips/r5900-no-fix.d: Test `-mno-fix-r5900'. * testsuite/gas/mips/r5900-no-fix.s: Likewise.
This commit is contained in:
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@ -1,3 +1,21 @@
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2018-11-30 Fredrik Noring <noring@nocrew.org>
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* config/tc-mips.c (mips_fix_r5900, mips_fix_r5900_explicit):
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New variables.
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(options): Add OPTION_FIX_R5900 and OPTION_NO_FIX_R5900
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enumeration constants.
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(md_longopts): Add "mfix-r5900" and "mno-fix-r5900" options.
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(can_swap_branch_p, md_parse_option, mips_after_parse_args):
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Handle the new options.
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(md_show_usage): Document the `-mfix-r5900' option.
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* doc/as.texi: Likewise.
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* doc/c-mips.texi: Likewise.
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* testsuite/gas/mips/mips.exp: Run R5900 dump tests.
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* testsuite/gas/mips/r5900-fix.d: Test `-mfix-r5900' option.
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* testsuite/gas/mips/r5900-fix.s: Likewise.
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* testsuite/gas/mips/r5900-no-fix.d: Test `-mno-fix-r5900'.
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* testsuite/gas/mips/r5900-no-fix.s: Likewise.
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2018-11-27 Jim Wilson <jimw@sifive.com>
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* config/tc-riscv.c (validate_riscv_insn) <'F'>: Add support for CF6
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@ -939,6 +939,10 @@ static int mips_fix_rm7000;
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/* ...likewise -mfix-cn63xxp1 */
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static bfd_boolean mips_fix_cn63xxp1;
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/* ...likewise -mfix-r5900 */
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static bfd_boolean mips_fix_r5900;
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static bfd_boolean mips_fix_r5900_explicit;
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/* We don't relax branches by default, since this causes us to expand
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`la .l2 - .l1' if there's a branch between .l1 and .l2, because we
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fail to compute the offset before expanding the macro to the most
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@ -1488,6 +1492,8 @@ enum options
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OPTION_NO_FIX_VR4130,
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OPTION_FIX_CN63XXP1,
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OPTION_NO_FIX_CN63XXP1,
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OPTION_FIX_R5900,
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OPTION_NO_FIX_R5900,
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OPTION_TRAP,
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OPTION_BREAK,
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OPTION_EB,
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@ -1636,6 +1642,8 @@ struct option md_longopts[] =
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{"mno-fix-rm7000", no_argument, NULL, OPTION_NO_FIX_RM7000},
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{"mfix-cn63xxp1", no_argument, NULL, OPTION_FIX_CN63XXP1},
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{"mno-fix-cn63xxp1", no_argument, NULL, OPTION_NO_FIX_CN63XXP1},
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{"mfix-r5900", no_argument, NULL, OPTION_FIX_R5900},
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{"mno-fix-r5900", no_argument, NULL, OPTION_NO_FIX_R5900},
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/* Miscellaneous options. */
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{"trap", no_argument, NULL, OPTION_TRAP},
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@ -6997,7 +7005,7 @@ can_swap_branch_p (struct mips_cl_insn *ip, expressionS *address_expr,
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- a branch delay slot of the loop is not NOP (EE 2.9 or later).
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We need to do this because of a hardware bug in the R5900 chip. */
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if (mips_opts.arch == CPU_R5900
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if (mips_fix_r5900
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/* Check if instruction has a parameter, ignore "j $31". */
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&& (address_expr != NULL)
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/* Parameter must be 16 bit. */
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@ -14763,6 +14771,16 @@ md_parse_option (int c, const char *arg)
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mips_fix_cn63xxp1 = FALSE;
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break;
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case OPTION_FIX_R5900:
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mips_fix_r5900 = TRUE;
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mips_fix_r5900_explicit = TRUE;
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break;
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case OPTION_NO_FIX_R5900:
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mips_fix_r5900 = FALSE;
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mips_fix_r5900_explicit = TRUE;
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break;
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case OPTION_RELAX_BRANCH:
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mips_relax_branch = 1;
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break;
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@ -15036,6 +15054,10 @@ mips_after_parse_args (void)
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/* Set up initial mips_opts state. */
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mips_opts = file_mips_opts;
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/* For the R5900 default to `-mfix-r5900' unless the user told otherwise. */
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if (!mips_fix_r5900_explicit)
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mips_fix_r5900 = file_mips_opts.arch == CPU_R5900;
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/* The register size inference code is now placed in
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file_mips_check_options. */
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@ -20125,6 +20147,7 @@ MIPS options:\n\
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-mfix-vr4130 work around VR4130 mflo/mfhi errata\n\
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-mfix-24k insert a nop after ERET and DERET instructions\n\
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-mfix-cn63xxp1 work around CN63XXP1 PREF errata\n\
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-mfix-r5900 work around R5900 short loop errata\n\
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-mgp32 use 32-bit GPRs, regardless of the chosen ISA\n\
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-mfp32 use 32-bit FPRs, regardless of the chosen ISA\n\
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-msym32 assume all symbols have 32-bit values\n\
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@ -453,6 +453,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
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[@b{-mfix-rm7000}] [@b{-mno-fix-rm7000}]
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[@b{-mfix-vr4120}] [@b{-mno-fix-vr4120}]
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[@b{-mfix-vr4130}] [@b{-mno-fix-vr4130}]
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[@b{-mfix-r5900}] [@b{-mno-fix-r5900}]
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[@b{-mdebug}] [@b{-no-mdebug}]
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[@b{-mpdr}] [@b{-mno-pdr}]
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@end ifset
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@ -1444,6 +1445,14 @@ of an mfhi or mflo instruction occurs in the following two instructions.
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Cause nops to be inserted if a dmult or dmultu instruction is
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followed by a load instruction.
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@item -mfix-r5900
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@itemx -mno-fix-r5900
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Do not attempt to schedule the preceding instruction into the delay slot
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of a branch instruction placed at the end of a short loop of six
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instructions or fewer and always schedule a @code{nop} instruction there
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instead. The short loop bug under certain conditions causes loops to
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execute only once or twice, due to a hardware bug in the R5900 chip.
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@item -mdebug
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@itemx -no-mdebug
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Cause stabs-style debugging output to go into an ECOFF-style .mdebug
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@ -327,6 +327,14 @@ Insert nops to work around the 24K @samp{eret}/@samp{deret} errata.
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Replace @code{pref} hints 0 - 4 and 6 - 24 with hint 28 to work around
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certain CN63XXP1 errata.
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@item -mfix-r5900
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@itemx -mno-fix-r5900
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Do not attempt to schedule the preceding instruction into the delay slot
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of a branch instruction placed at the end of a short loop of six
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instructions or fewer and always schedule a @code{nop} instruction there
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instead. The short loop bug under certain conditions causes loops to
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execute only once or twice, due to a hardware bug in the R5900 chip.
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@item -m4010
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@itemx -no-m4010
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Generate code for the LSI R4010 chip. This tells the assembler to
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@ -1560,6 +1560,8 @@ if { [istarget mips*-*-vxworks*] } {
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run_dump_test_arches "break-error" [mips_arch_list_all]
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run_dump_test "r5900"
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run_dump_test "r5900-fix"
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run_dump_test "r5900-no-fix"
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run_dump_test "r5900-full"
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run_list_test "r5900-nollsc" "-mabi=o64 -march=r5900"
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run_dump_test "r5900-vu0"
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30
gas/testsuite/gas/mips/r5900-fix.d
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30
gas/testsuite/gas/mips/r5900-fix.d
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@ -0,0 +1,30 @@
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#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric -mmips:5900
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#name: MIPS R5900 workarounds (-mips3 -mfix-r5900)
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#as: -mips3 -mfix-r5900
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.*: +file format .*mips.*
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Disassembly of section \.text:
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[0-9a-f]+ <[^>]*> 2403012c li \$3,300
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[0-9a-f]+ <[^>]*> 2063ffff addi \$3,\$3,-1
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[0-9a-f]+ <[^>]*> 2084ffff addi \$4,\$4,-1
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[0-9a-f]+ <[^>]*> 1460fffd bnez \$3,[0-9a-f]+ <short_loop3>
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 2403012c li \$3,300
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[0-9a-f]+ <[^>]*> 2063ffff addi \$3,\$3,-1
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[0-9a-f]+ <[^>]*> 2084ffff addi \$4,\$4,-1
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[0-9a-f]+ <[^>]*> 20a5ffff addi \$5,\$5,-1
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[0-9a-f]+ <[^>]*> 20c6ffff addi \$6,\$6,-1
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[0-9a-f]+ <[^>]*> 20e7ffff addi \$7,\$7,-1
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[0-9a-f]+ <[^>]*> 1460fffa bnez \$3,[0-9a-f]+ <short_loop6>
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 2403012c li \$3,300
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[0-9a-f]+ <[^>]*> 2063ffff addi \$3,\$3,-1
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[0-9a-f]+ <[^>]*> 2084ffff addi \$4,\$4,-1
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[0-9a-f]+ <[^>]*> 20a5ffff addi \$5,\$5,-1
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[0-9a-f]+ <[^>]*> 20c6ffff addi \$6,\$6,-1
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[0-9a-f]+ <[^>]*> 20e7ffff addi \$7,\$7,-1
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[0-9a-f]+ <[^>]*> 1460fffa bnez \$3,[0-9a-f]+ <short_loop7>
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[0-9a-f]+ <[^>]*> 2108ffff addi \$8,\$8,-1
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[0-9a-f]+ <[^>]*> 24040003 li \$4,3
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\.\.\.
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40
gas/testsuite/gas/mips/r5900-fix.s
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40
gas/testsuite/gas/mips/r5900-fix.s
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@ -0,0 +1,40 @@
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.text
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.ent test_mfix_r5900
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test_mfix_r5900:
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# Test the short loop fix with 3 loop instructions.
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li $3, 300
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short_loop3:
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addi $3, -1
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addi $4, -1
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# A NOP will be inserted in the branch delay slot.
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bne $3, $0, short_loop3
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# Test the short loop fix with 6 loop instructions.
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li $3, 300
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short_loop6:
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addi $3, -1
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addi $4, -1
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addi $5, -1
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addi $6, -1
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addi $7, -1
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# A NOP will be inserted in the branch delay slot.
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bne $3, $0, short_loop6
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# Test the short loop fix with 7 loop instructions.
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li $3, 300
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short_loop7:
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addi $3, -1
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addi $4, -1
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addi $5, -1
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addi $6, -1
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addi $7, -1
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addi $8, -1
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# The short loop fix does not apply for loops with
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# more than 6 instructions.
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bne $3, $0, short_loop7
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li $4, 3
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.space 8
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.end test_mfix_r5900
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gas/testsuite/gas/mips/r5900-no-fix.d
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13
gas/testsuite/gas/mips/r5900-no-fix.d
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#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric -mmips:5900
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#name: MIPS R5900 workarounds disabled (-mno-fix-r5900)
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#as: -march=r5900 -mtune=r5900 -mno-fix-r5900
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.*: +file format .*mips.*
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Disassembly of section \.text:
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[0-9a-f]+ <[^>]*> 2403012c li \$3,300
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[0-9a-f]+ <[^>]*> 2063ffff addi \$3,\$3,-1
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[0-9a-f]+ <[^>]*> 1460fffe bnez \$3,[0-9a-f]+ <short_loop_no_mfix_r5900>
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[0-9a-f]+ <[^>]*> 2084ffff addi \$4,\$4,-1
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[0-9a-f]+ <[^>]*> 24040003 li \$4,3
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\.\.\.
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17
gas/testsuite/gas/mips/r5900-no-fix.s
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17
gas/testsuite/gas/mips/r5900-no-fix.s
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@ -0,0 +1,17 @@
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.text
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.ent test_no_mfix_r5900
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test_no_mfix_r5900:
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# Test that the short loop fix with 3 loop instructions
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# is not applied with `-mno-fix-r5900'.
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li $3, 300
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short_loop_no_mfix_r5900:
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addi $3, -1
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addi $4, -1
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# A NOP will not be inserted in the branch delay slot.
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bne $3, $0, short_loop_no_mfix_r5900
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li $4, 3
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.space 8
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.end test_no_mfix_r5900
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