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* config/tc-mips.c (append_insn): Cope with a complex reloc
sequence containing an unsupported reloc type.
(enum options): Replace computed #define's constants for option
numbers with this enum.
(struct md_longopts): Use the enum. Allow OPTION_32 in a non-ELF
environment.
(md_parse_option): Allow -32 in a non-ELF environment.
* gas/lib/gas-defs.exp: Update description of run_dump_test proc.
* gas/mips/dli.d: Pass -64 to gas.
* gas/mips/mips64-mips3d-incl.d: Likewise.
* gas/mips/octeon.d: Likewise.
* gas/mips/sb1-ext-mdmx.d: Likewise.
* gas/mips/sb1-ext-ps.d: Likewise.
* gas/mips/e32el-rel2.s: Pass -march=mips3 to gas.
Update expected relocs.
* gas/mips/ld-ilocks-addr32.d: Do not run for tx39 targets.
* gas/mips/mips.exp: Remove 'ilocks' variable.
Add ecoff targets to 'addr32' variable.
Set 'no_mips16' for ecoff targets.
Do not run div-ilocks or mul-ilocks test variants.
* gas/mips/mips16-intermix.d: Use nm instead of objdump so that
the symbol table output is sorted. Update expecetd output.
This commit is contained in:
Nick Clifton
parent
09f00d9a9c
commit
23fce1e311
@ -1,3 +1,13 @@
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2009-01-27 Nick Clifton <nickc@redhat.com>
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* config/tc-mips.c (append_insn): Cope with a complex reloc
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sequence containing an unsupported reloc type.
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(enum options): Replace computed #define's constants for option
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numbers with this enum.
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(struct md_longopts): Use the enum. Allow OPTION_32 in a non-ELF
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environment.
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(md_parse_option): Allow -32 in a non-ELF environment.
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2009-01-26 Andrew Stubbs <ams@codesourcery.com>
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* config/tc-arm.c (attributes_set_explicitly): New array.
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@ -1,6 +1,6 @@
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/* tc-mips.c -- assemble code for a MIPS chip.
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Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
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2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
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2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
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Contributed by the OSF and Ralph Campbell.
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Written by Keith Knowles and Ralph Campbell, working independently.
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Modified for ECOFF and R4000 support by Ian Lance Taylor of Cygnus
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@ -2964,6 +2964,15 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
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break;
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howto = bfd_reloc_type_lookup (stdoutput, reloc_type[i - 1]);
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if (howto == NULL)
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{
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/* To reproduce this failure try assembling gas/testsuites/
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gas/mips/mips16-intermix.s with a mips-ecoff targeted
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assembler. */
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as_bad (_("Unsupported MIPS relocation number %d"), reloc_type[i - 1]);
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howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_16);
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}
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ip->fixp[0] = fix_new_exp (ip->frag, ip->where,
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bfd_get_reloc_size (howto),
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address_expr,
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@ -11092,174 +11101,180 @@ static int support_64bit_objects(void)
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const char *md_shortopts = "O::g::G:";
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enum options
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{
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OPTION_MARCH = OPTION_MD_BASE,
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OPTION_MTUNE,
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OPTION_MIPS1,
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OPTION_MIPS2,
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OPTION_MIPS3,
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OPTION_MIPS4,
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OPTION_MIPS5,
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OPTION_MIPS32,
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OPTION_MIPS64,
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OPTION_MIPS32R2,
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OPTION_MIPS64R2,
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OPTION_MIPS16,
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OPTION_NO_MIPS16,
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OPTION_MIPS3D,
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OPTION_NO_MIPS3D,
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OPTION_MDMX,
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OPTION_NO_MDMX,
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OPTION_DSP,
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OPTION_NO_DSP,
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OPTION_MT,
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OPTION_NO_MT,
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OPTION_SMARTMIPS,
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OPTION_NO_SMARTMIPS,
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OPTION_DSPR2,
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OPTION_NO_DSPR2,
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OPTION_COMPAT_ARCH_BASE,
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OPTION_M4650,
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OPTION_NO_M4650,
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OPTION_M4010,
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OPTION_NO_M4010,
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OPTION_M4100,
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OPTION_NO_M4100,
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OPTION_M3900,
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OPTION_NO_M3900,
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OPTION_M7000_HILO_FIX,
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OPTION_MNO_7000_HILO_FIX,
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OPTION_FIX_VR4120,
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OPTION_NO_FIX_VR4120,
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OPTION_FIX_VR4130,
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OPTION_NO_FIX_VR4130,
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OPTION_TRAP,
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OPTION_BREAK,
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OPTION_EB,
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OPTION_EL,
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OPTION_FP32,
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OPTION_GP32,
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OPTION_CONSTRUCT_FLOATS,
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OPTION_NO_CONSTRUCT_FLOATS,
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OPTION_FP64,
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OPTION_GP64,
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OPTION_RELAX_BRANCH,
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OPTION_NO_RELAX_BRANCH,
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OPTION_MSHARED,
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OPTION_MNO_SHARED,
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OPTION_MSYM32,
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OPTION_MNO_SYM32,
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OPTION_SOFT_FLOAT,
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OPTION_HARD_FLOAT,
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OPTION_SINGLE_FLOAT,
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OPTION_DOUBLE_FLOAT,
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OPTION_32,
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#ifdef OBJ_ELF
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OPTION_CALL_SHARED,
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OPTION_CALL_NONPIC,
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OPTION_NON_SHARED,
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OPTION_XGOT,
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OPTION_MABI,
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OPTION_N32,
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OPTION_64,
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OPTION_MDEBUG,
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OPTION_NO_MDEBUG,
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OPTION_PDR,
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OPTION_NO_PDR,
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OPTION_MVXWORKS_PIC,
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#endif /* OBJ_ELF */
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OPTION_END_OF_ENUM
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};
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struct option md_longopts[] =
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{
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/* Options which specify architecture. */
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#define OPTION_ARCH_BASE (OPTION_MD_BASE)
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#define OPTION_MARCH (OPTION_ARCH_BASE + 0)
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{"march", required_argument, NULL, OPTION_MARCH},
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#define OPTION_MTUNE (OPTION_ARCH_BASE + 1)
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{"mtune", required_argument, NULL, OPTION_MTUNE},
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#define OPTION_MIPS1 (OPTION_ARCH_BASE + 2)
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{"mips0", no_argument, NULL, OPTION_MIPS1},
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{"mips1", no_argument, NULL, OPTION_MIPS1},
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#define OPTION_MIPS2 (OPTION_ARCH_BASE + 3)
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{"mips2", no_argument, NULL, OPTION_MIPS2},
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#define OPTION_MIPS3 (OPTION_ARCH_BASE + 4)
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{"mips3", no_argument, NULL, OPTION_MIPS3},
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#define OPTION_MIPS4 (OPTION_ARCH_BASE + 5)
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{"mips4", no_argument, NULL, OPTION_MIPS4},
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#define OPTION_MIPS5 (OPTION_ARCH_BASE + 6)
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{"mips5", no_argument, NULL, OPTION_MIPS5},
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#define OPTION_MIPS32 (OPTION_ARCH_BASE + 7)
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{"mips32", no_argument, NULL, OPTION_MIPS32},
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#define OPTION_MIPS64 (OPTION_ARCH_BASE + 8)
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{"mips64", no_argument, NULL, OPTION_MIPS64},
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#define OPTION_MIPS32R2 (OPTION_ARCH_BASE + 9)
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{"mips32r2", no_argument, NULL, OPTION_MIPS32R2},
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#define OPTION_MIPS64R2 (OPTION_ARCH_BASE + 10)
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{"mips64r2", no_argument, NULL, OPTION_MIPS64R2},
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/* Options which specify Application Specific Extensions (ASEs). */
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#define OPTION_ASE_BASE (OPTION_ARCH_BASE + 11)
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#define OPTION_MIPS16 (OPTION_ASE_BASE + 0)
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{"mips16", no_argument, NULL, OPTION_MIPS16},
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#define OPTION_NO_MIPS16 (OPTION_ASE_BASE + 1)
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{"no-mips16", no_argument, NULL, OPTION_NO_MIPS16},
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#define OPTION_MIPS3D (OPTION_ASE_BASE + 2)
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{"mips3d", no_argument, NULL, OPTION_MIPS3D},
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#define OPTION_NO_MIPS3D (OPTION_ASE_BASE + 3)
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{"no-mips3d", no_argument, NULL, OPTION_NO_MIPS3D},
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#define OPTION_MDMX (OPTION_ASE_BASE + 4)
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{"mdmx", no_argument, NULL, OPTION_MDMX},
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#define OPTION_NO_MDMX (OPTION_ASE_BASE + 5)
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{"no-mdmx", no_argument, NULL, OPTION_NO_MDMX},
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#define OPTION_DSP (OPTION_ASE_BASE + 6)
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{"mdsp", no_argument, NULL, OPTION_DSP},
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#define OPTION_NO_DSP (OPTION_ASE_BASE + 7)
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{"mno-dsp", no_argument, NULL, OPTION_NO_DSP},
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#define OPTION_MT (OPTION_ASE_BASE + 8)
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{"mmt", no_argument, NULL, OPTION_MT},
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#define OPTION_NO_MT (OPTION_ASE_BASE + 9)
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{"mno-mt", no_argument, NULL, OPTION_NO_MT},
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#define OPTION_SMARTMIPS (OPTION_ASE_BASE + 10)
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{"msmartmips", no_argument, NULL, OPTION_SMARTMIPS},
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#define OPTION_NO_SMARTMIPS (OPTION_ASE_BASE + 11)
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{"mno-smartmips", no_argument, NULL, OPTION_NO_SMARTMIPS},
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#define OPTION_DSPR2 (OPTION_ASE_BASE + 12)
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{"mdspr2", no_argument, NULL, OPTION_DSPR2},
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#define OPTION_NO_DSPR2 (OPTION_ASE_BASE + 13)
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{"mno-dspr2", no_argument, NULL, OPTION_NO_DSPR2},
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/* Old-style architecture options. Don't add more of these. */
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#define OPTION_COMPAT_ARCH_BASE (OPTION_ASE_BASE + 14)
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#define OPTION_M4650 (OPTION_COMPAT_ARCH_BASE + 0)
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{"m4650", no_argument, NULL, OPTION_M4650},
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#define OPTION_NO_M4650 (OPTION_COMPAT_ARCH_BASE + 1)
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{"no-m4650", no_argument, NULL, OPTION_NO_M4650},
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#define OPTION_M4010 (OPTION_COMPAT_ARCH_BASE + 2)
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{"m4010", no_argument, NULL, OPTION_M4010},
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#define OPTION_NO_M4010 (OPTION_COMPAT_ARCH_BASE + 3)
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{"no-m4010", no_argument, NULL, OPTION_NO_M4010},
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#define OPTION_M4100 (OPTION_COMPAT_ARCH_BASE + 4)
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{"m4100", no_argument, NULL, OPTION_M4100},
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#define OPTION_NO_M4100 (OPTION_COMPAT_ARCH_BASE + 5)
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{"no-m4100", no_argument, NULL, OPTION_NO_M4100},
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#define OPTION_M3900 (OPTION_COMPAT_ARCH_BASE + 6)
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{"m3900", no_argument, NULL, OPTION_M3900},
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#define OPTION_NO_M3900 (OPTION_COMPAT_ARCH_BASE + 7)
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{"no-m3900", no_argument, NULL, OPTION_NO_M3900},
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/* Options which enable bug fixes. */
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#define OPTION_FIX_BASE (OPTION_COMPAT_ARCH_BASE + 8)
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#define OPTION_M7000_HILO_FIX (OPTION_FIX_BASE + 0)
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{"mfix7000", no_argument, NULL, OPTION_M7000_HILO_FIX},
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#define OPTION_MNO_7000_HILO_FIX (OPTION_FIX_BASE + 1)
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{"no-fix-7000", no_argument, NULL, OPTION_MNO_7000_HILO_FIX},
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{"mno-fix7000", no_argument, NULL, OPTION_MNO_7000_HILO_FIX},
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#define OPTION_FIX_VR4120 (OPTION_FIX_BASE + 2)
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#define OPTION_NO_FIX_VR4120 (OPTION_FIX_BASE + 3)
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{"mfix-vr4120", no_argument, NULL, OPTION_FIX_VR4120},
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{"mno-fix-vr4120", no_argument, NULL, OPTION_NO_FIX_VR4120},
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#define OPTION_FIX_VR4130 (OPTION_FIX_BASE + 4)
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#define OPTION_NO_FIX_VR4130 (OPTION_FIX_BASE + 5)
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{"mfix-vr4130", no_argument, NULL, OPTION_FIX_VR4130},
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{"mno-fix-vr4130", no_argument, NULL, OPTION_NO_FIX_VR4130},
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/* Miscellaneous options. */
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#define OPTION_MISC_BASE (OPTION_FIX_BASE + 6)
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#define OPTION_TRAP (OPTION_MISC_BASE + 0)
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{"trap", no_argument, NULL, OPTION_TRAP},
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{"no-break", no_argument, NULL, OPTION_TRAP},
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#define OPTION_BREAK (OPTION_MISC_BASE + 1)
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{"break", no_argument, NULL, OPTION_BREAK},
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{"no-trap", no_argument, NULL, OPTION_BREAK},
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#define OPTION_EB (OPTION_MISC_BASE + 2)
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{"EB", no_argument, NULL, OPTION_EB},
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#define OPTION_EL (OPTION_MISC_BASE + 3)
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{"EL", no_argument, NULL, OPTION_EL},
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#define OPTION_FP32 (OPTION_MISC_BASE + 4)
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{"mfp32", no_argument, NULL, OPTION_FP32},
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#define OPTION_GP32 (OPTION_MISC_BASE + 5)
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{"mgp32", no_argument, NULL, OPTION_GP32},
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#define OPTION_CONSTRUCT_FLOATS (OPTION_MISC_BASE + 6)
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{"construct-floats", no_argument, NULL, OPTION_CONSTRUCT_FLOATS},
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#define OPTION_NO_CONSTRUCT_FLOATS (OPTION_MISC_BASE + 7)
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{"no-construct-floats", no_argument, NULL, OPTION_NO_CONSTRUCT_FLOATS},
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#define OPTION_FP64 (OPTION_MISC_BASE + 8)
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{"mfp64", no_argument, NULL, OPTION_FP64},
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#define OPTION_GP64 (OPTION_MISC_BASE + 9)
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{"mgp64", no_argument, NULL, OPTION_GP64},
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#define OPTION_RELAX_BRANCH (OPTION_MISC_BASE + 10)
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#define OPTION_NO_RELAX_BRANCH (OPTION_MISC_BASE + 11)
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{"relax-branch", no_argument, NULL, OPTION_RELAX_BRANCH},
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{"no-relax-branch", no_argument, NULL, OPTION_NO_RELAX_BRANCH},
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#define OPTION_MSHARED (OPTION_MISC_BASE + 12)
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#define OPTION_MNO_SHARED (OPTION_MISC_BASE + 13)
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{"mshared", no_argument, NULL, OPTION_MSHARED},
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{"mno-shared", no_argument, NULL, OPTION_MNO_SHARED},
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#define OPTION_MSYM32 (OPTION_MISC_BASE + 14)
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#define OPTION_MNO_SYM32 (OPTION_MISC_BASE + 15)
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{"msym32", no_argument, NULL, OPTION_MSYM32},
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{"mno-sym32", no_argument, NULL, OPTION_MNO_SYM32},
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#define OPTION_SOFT_FLOAT (OPTION_MISC_BASE + 16)
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#define OPTION_HARD_FLOAT (OPTION_MISC_BASE + 17)
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{"msoft-float", no_argument, NULL, OPTION_SOFT_FLOAT},
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{"mhard-float", no_argument, NULL, OPTION_HARD_FLOAT},
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#define OPTION_SINGLE_FLOAT (OPTION_MISC_BASE + 18)
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#define OPTION_DOUBLE_FLOAT (OPTION_MISC_BASE + 19)
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{"msingle-float", no_argument, NULL, OPTION_SINGLE_FLOAT},
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{"mdouble-float", no_argument, NULL, OPTION_DOUBLE_FLOAT},
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/* Strictly speaking this next option is ELF specific,
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but we allow it for other ports as well in order to
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make testing easier. */
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{"32", no_argument, NULL, OPTION_32},
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/* ELF-specific options. */
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#ifdef OBJ_ELF
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#define OPTION_ELF_BASE (OPTION_MISC_BASE + 20)
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#define OPTION_CALL_SHARED (OPTION_ELF_BASE + 0)
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{"KPIC", no_argument, NULL, OPTION_CALL_SHARED},
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{"call_shared", no_argument, NULL, OPTION_CALL_SHARED},
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#define OPTION_CALL_NONPIC (OPTION_ELF_BASE + 1)
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{"call_nonpic", no_argument, NULL, OPTION_CALL_NONPIC},
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#define OPTION_NON_SHARED (OPTION_ELF_BASE + 2)
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{"non_shared", no_argument, NULL, OPTION_NON_SHARED},
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#define OPTION_XGOT (OPTION_ELF_BASE + 3)
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{"xgot", no_argument, NULL, OPTION_XGOT},
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#define OPTION_MABI (OPTION_ELF_BASE + 4)
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{"mabi", required_argument, NULL, OPTION_MABI},
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#define OPTION_32 (OPTION_ELF_BASE + 5)
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{"32", no_argument, NULL, OPTION_32},
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#define OPTION_N32 (OPTION_ELF_BASE + 6)
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{"n32", no_argument, NULL, OPTION_N32},
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#define OPTION_64 (OPTION_ELF_BASE + 7)
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{"64", no_argument, NULL, OPTION_64},
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#define OPTION_MDEBUG (OPTION_ELF_BASE + 8)
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{"mdebug", no_argument, NULL, OPTION_MDEBUG},
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#define OPTION_NO_MDEBUG (OPTION_ELF_BASE + 9)
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{"no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG},
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#define OPTION_PDR (OPTION_ELF_BASE + 10)
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{"mpdr", no_argument, NULL, OPTION_PDR},
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#define OPTION_NO_PDR (OPTION_ELF_BASE + 11)
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{"mno-pdr", no_argument, NULL, OPTION_NO_PDR},
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#define OPTION_MVXWORKS_PIC (OPTION_ELF_BASE + 12)
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{"mvxworks-pic", no_argument, NULL, OPTION_MVXWORKS_PIC},
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#endif /* OBJ_ELF */
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@ -11556,18 +11571,16 @@ md_parse_option (int c, char *arg)
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g_switch_seen = 1;
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break;
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#ifdef OBJ_ELF
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/* The -32, -n32 and -64 options are shortcuts for -mabi=32, -mabi=n32
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and -mabi=64. */
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case OPTION_32:
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if (!IS_ELF)
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{
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as_bad (_("-32 is supported for ELF format only"));
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return 0;
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}
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mips_abi = O32_ABI;
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if (IS_ELF)
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mips_abi = O32_ABI;
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/* We silently ignore -32 for non-ELF targets. This greatly
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simplifies the construction of the MIPS GAS test cases. */
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break;
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#ifdef OBJ_ELF
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case OPTION_N32:
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if (!IS_ELF)
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{
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@ -1,3 +1,22 @@
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2009-01-27 Nick Clifton <nickc@redhat.com>
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|
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* gas/lib/gas-defs.exp: Update description of run_dump_test proc.
|
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|
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* gas/mips/dli.d: Pass -64 to gas.
|
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* gas/mips/mips64-mips3d-incl.d: Likewise.
|
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* gas/mips/octeon.d: Likewise.
|
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* gas/mips/sb1-ext-mdmx.d: Likewise.
|
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* gas/mips/sb1-ext-ps.d: Likewise.
|
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* gas/mips/e32el-rel2.s: Pass -march=mips3 to gas.
|
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Update expected relocs.
|
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* gas/mips/ld-ilocks-addr32.d: Do not run for tx39 targets.
|
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* gas/mips/mips.exp: Remove 'ilocks' variable.
|
||||
Add ecoff targets to 'addr32' variable.
|
||||
Set 'no_mips16' for ecoff targets.
|
||||
Do not run div-ilocks or mul-ilocks test variants.
|
||||
* gas/mips/mips16-intermix.d: Use nm instead of objdump so that
|
||||
the symbol table output is sorted. Update expecetd output.
|
||||
|
||||
2009-01-26 Andrew Stubbs <ams@codesourcery.com>
|
||||
|
||||
* gas/arm/attr-cpu-directive.d: New file.
|
||||
@ -78,7 +97,7 @@
|
||||
2009-01-26 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
* gas/arm/attr-order.d: Do not run this test for non-ELF based ARM
|
||||
targets.
|
||||
targets.
|
||||
|
||||
2009-01-24 Andreas Schwab <schwab@suse.de>
|
||||
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
#objdump: -dr --prefix-addresses
|
||||
#name: MIPS dli
|
||||
#as: -64
|
||||
|
||||
# Test the dli macro.
|
||||
|
||||
|
||||
@ -1,6 +1,7 @@
|
||||
#objdump: -sr -j .text
|
||||
#name: MIPS ELF reloc 2 (32-bit)
|
||||
#source: elf-rel2.s
|
||||
#as: -32 -march=mips3
|
||||
|
||||
# Test the GPREL and LITERAL generation.
|
||||
# FIXME: really this should check that the contents of .sdata, .lit4,
|
||||
@ -13,18 +14,15 @@ OFFSET [ ]+ TYPE VALUE
|
||||
0+0000000 R_MIPS_LITERAL \.lit8\+0x0+0004000
|
||||
0+0000004 R_MIPS_LITERAL \.lit8\+0x0+0004000
|
||||
0+0000008 R_MIPS_LITERAL \.lit8\+0x0+0004000
|
||||
0+000000c R_MIPS_LITERAL \.lit8\+0x0+0004000
|
||||
0+0000010 R_MIPS_LITERAL \.lit8\+0x0+0004000
|
||||
0+0000014 R_MIPS_LITERAL \.lit8\+0x0+0004000
|
||||
0+0000018 R_MIPS_LITERAL \.lit4\+0x0+0004000
|
||||
0+000001c R_MIPS_LITERAL \.lit4\+0x0+0004000
|
||||
0+0000020 R_MIPS_LITERAL \.lit4\+0x0+0004000
|
||||
0+0000024 R_MIPS_GPREL16 \.sdata\+0x0+0004000
|
||||
0+0000028 R_MIPS_GPREL16 \.sdata\+0x0+0004000
|
||||
0+000002c R_MIPS_GPREL16 \.sdata\+0x0+0004000
|
||||
0+000000c R_MIPS_LITERAL \.lit4\+0x0+0004000
|
||||
0+0000010 R_MIPS_LITERAL \.lit4\+0x0+0004000
|
||||
0+0000014 R_MIPS_LITERAL \.lit4\+0x0+0004000
|
||||
0+0000018 R_MIPS_GPREL16 \.sdata\+0x0+0004000
|
||||
0+000001c R_MIPS_GPREL16 \.sdata\+0x0+0004000
|
||||
0+0000020 R_MIPS_GPREL16 \.sdata\+0x0+0004000
|
||||
|
||||
|
||||
Contents of section \.text:
|
||||
0000 00c082c7 04c083c7 08c082c7 0cc083c7 .*
|
||||
0010 10c082c7 14c083c7 00c082c7 04c082c7 .*
|
||||
0020 08c082c7 00c0828f 04c0828f 08c0828f .*
|
||||
0000 00c082d7 08c082d7 10c082d7 00c082c7 .*
|
||||
0010 04c082c7 08c082c7 00c0828f 04c0828f .*
|
||||
0020 08c0828f .*
|
||||
|
||||
@ -2,6 +2,7 @@
|
||||
#as: -mips3 -mtune=r4000 -march=r4000
|
||||
#name: MIPS ld-ilocks
|
||||
#source: ld.s
|
||||
#not-target: mipstx39-*-*
|
||||
|
||||
# Test the ld macro.
|
||||
|
||||
|
||||
@ -379,9 +379,8 @@ if { [istarget mips*-*-vxworks*] } {
|
||||
set elf [expr [istarget *-*-elf*] || [istarget *-*-irix5*] || [istarget *-*-irix6* ] || [istarget *-*-linux*] || [istarget *-*-netbsd*] ]
|
||||
set ecoff [expr [istarget *-*-ecoff*] || [istarget *-*-ultrix*] || [istarget *-*-irix\[1-4\]*] ]
|
||||
set aout [expr [istarget *-*-bsd*] || [istarget *-*-openbsd*] ]
|
||||
set ilocks [istarget mipstx39*-*-*]
|
||||
set gpr_ilocks [expr [istarget mipstx39*-*-*]]
|
||||
set addr32 [expr [istarget mipstx39*-*-*] || [istarget mips-*-linux*] || [istarget mipsel-*-linux*]]
|
||||
set addr32 [expr [istarget mipstx39*-*-*] || [istarget mips-*-linux*] || [istarget mipsel-*-linux*] || [istarget mips*-*-ecoff]]
|
||||
set has_newabi [expr [istarget *-*-irix6*] || [istarget mips64*-*-linux*]]
|
||||
|
||||
if { [istarget "mips*-*-*linux*"] || [istarget "mips*-sde-elf*"] } then {
|
||||
@ -394,7 +393,10 @@ if { [istarget mips*-*-vxworks*] } {
|
||||
} {
|
||||
set el ""
|
||||
}
|
||||
|
||||
if { $ecoff } {
|
||||
set no_mips16 1
|
||||
}
|
||||
|
||||
run_dump_test_arches "abs" [mips_arch_list_matching mips1]
|
||||
run_dump_test_arches "add" [mips_arch_list_matching mips1]
|
||||
run_dump_test_arches "and" [mips_arch_list_matching mips1]
|
||||
@ -422,12 +424,8 @@ if { [istarget mips*-*-vxworks*] } {
|
||||
run_dump_test_arches "branch-misc-2pic-64" [mips_arch_list_matching mips3]
|
||||
run_dump_test "branch-misc-3"
|
||||
run_dump_test "branch-swap"
|
||||
run_dump_test "div"
|
||||
|
||||
if $ilocks {
|
||||
run_dump_test "div-ilocks"
|
||||
} else {
|
||||
run_dump_test "div"
|
||||
}
|
||||
if { !$addr32 } {
|
||||
run_dump_test_arches "dli" [mips_arch_list_matching mips3]
|
||||
}
|
||||
@ -482,11 +480,7 @@ if { [istarget mips*-*-vxworks*] } {
|
||||
run_list_test_arches "mips4-fp" "-32 -msoft-float" \
|
||||
[mips_arch_list_matching mips4]
|
||||
run_dump_test_arches "mips5" [mips_arch_list_matching mips5]
|
||||
if $ilocks {
|
||||
run_dump_test "mul-ilocks"
|
||||
} else {
|
||||
run_dump_test "mul"
|
||||
}
|
||||
run_dump_test "mul"
|
||||
|
||||
run_dump_test_arches "rol" [mips_arch_list_matching !ror]
|
||||
run_dump_test_arches "rol-hw" [mips_arch_list_matching ror]
|
||||
|
||||
@ -1,164 +1,121 @@
|
||||
#objdump: -t
|
||||
#PROG: nm
|
||||
#as: -mips32r2 -32
|
||||
#name: MIPS16 intermix
|
||||
|
||||
.*: +file format .*mips.*
|
||||
|
||||
SYMBOL TABLE:
|
||||
#...
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_l
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_l
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_l
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_l
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_l
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_l
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_l
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_l
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_d 0+[0-9a-f]+ .mips16.fn.m16_d
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_d 0+[0-9a-f]+ __fn_stub_m16_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_d
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static_d 0+[0-9a-f]+ .mips16.fn.m16_static_d
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static_d 0+[0-9a-f]+ __fn_stub_m16_static_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_d
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static1_d 0+[0-9a-f]+ .mips16.fn.m16_static1_d
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static1_d 0+[0-9a-f]+ __fn_stub_m16_static1_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_d
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static32_d 0+[0-9a-f]+ .mips16.fn.m16_static32_d
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static32_d 0+[0-9a-f]+ __fn_stub_m16_static32_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_d
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static16_d 0+[0-9a-f]+ .mips16.fn.m16_static16_d
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static16_d 0+[0-9a-f]+ __fn_stub_m16_static16_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_ld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_ld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_ld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_ld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_ld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_ld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_ld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_ld
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_dl 0+[0-9a-f]+ .mips16.fn.m16_dl
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_dl 0+[0-9a-f]+ __fn_stub_m16_dl
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_dl
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_dl
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static_dl 0+[0-9a-f]+ .mips16.fn.m16_static_dl
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static_dl 0+[0-9a-f]+ __fn_stub_m16_static_dl
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_dl
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_dl
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static1_dl 0+[0-9a-f]+ .mips16.fn.m16_static1_dl
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static1_dl 0+[0-9a-f]+ __fn_stub_m16_static1_dl
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_dl
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_dl
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static32_dl 0+[0-9a-f]+ .mips16.fn.m16_static32_dl
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static32_dl 0+[0-9a-f]+ __fn_stub_m16_static32_dl
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_dl
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_dl
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static16_dl 0+[0-9a-f]+ .mips16.fn.m16_static16_dl
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static16_dl 0+[0-9a-f]+ __fn_stub_m16_static16_dl
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_dlld 0+[0-9a-f]+ .mips16.fn.m16_dlld
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_dlld 0+[0-9a-f]+ __fn_stub_m16_dlld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_dlld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_dlld
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static_dlld 0+[0-9a-f]+ .mips16.fn.m16_static_dlld
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static_dlld 0+[0-9a-f]+ __fn_stub_m16_static_dlld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_dlld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_dlld
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static1_dlld 0+[0-9a-f]+ .mips16.fn.m16_static1_dlld
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static1_dlld 0+[0-9a-f]+ __fn_stub_m16_static1_dlld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_dlld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_dlld
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static32_dlld 0+[0-9a-f]+ .mips16.fn.m16_static32_dlld
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static32_dlld 0+[0-9a-f]+ __fn_stub_m16_static32_dlld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_dlld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_dlld
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static16_dlld 0+[0-9a-f]+ .mips16.fn.m16_static16_dlld
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static16_dlld 0+[0-9a-f]+ __fn_stub_m16_static16_dlld
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_d_l
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_d_l
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_d_l
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_d_l
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_d_l
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_d_l
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_d_l
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_d_l
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_d_d 0+[0-9a-f]+ .mips16.fn.m16_d_d
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_d_d 0+[0-9a-f]+ __fn_stub_m16_d_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_d_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_d_d
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static_d_d 0+[0-9a-f]+ .mips16.fn.m16_static_d_d
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static_d_d 0+[0-9a-f]+ __fn_stub_m16_static_d_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_d_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_d_d
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static1_d_d 0+[0-9a-f]+ .mips16.fn.m16_static1_d_d
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static1_d_d 0+[0-9a-f]+ __fn_stub_m16_static1_d_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_d_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_d_d
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static32_d_d 0+[0-9a-f]+ .mips16.fn.m16_static32_d_d
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static32_d_d 0+[0-9a-f]+ __fn_stub_m16_static32_d_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_d_d
|
||||
0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_d_d
|
||||
0+[0-9a-f]+ l d .mips16.fn.m16_static16_d_d 0+[0-9a-f]+ .mips16.fn.m16_static16_d_d
|
||||
0+[0-9a-f]+ l F .mips16.fn.m16_static16_d_d 0+[0-9a-f]+ __fn_stub_m16_static16_d_d
|
||||
0+[0-9a-f]+ l d .mips16.call.m32_static1_d 0+[0-9a-f]+ .mips16.call.m32_static1_d
|
||||
0+[0-9a-f]+ l F .mips16.call.m32_static1_d 0+[0-9a-f]+ __call_stub_m32_static1_d
|
||||
0+[0-9a-f]+ l d .mips16.call.m16_static1_d 0+[0-9a-f]+ .mips16.call.m16_static1_d
|
||||
0+[0-9a-f]+ l F .mips16.call.m16_static1_d 0+[0-9a-f]+ __call_stub_m16_static1_d
|
||||
0+[0-9a-f]+ l d .mips16.call.m32_static1_dl 0+[0-9a-f]+ .mips16.call.m32_static1_dl
|
||||
0+[0-9a-f]+ l F .mips16.call.m32_static1_dl 0+[0-9a-f]+ __call_stub_m32_static1_dl
|
||||
0+[0-9a-f]+ l d .mips16.call.m16_static1_dl 0+[0-9a-f]+ .mips16.call.m16_static1_dl
|
||||
0+[0-9a-f]+ l F .mips16.call.m16_static1_dl 0+[0-9a-f]+ __call_stub_m16_static1_dl
|
||||
0+[0-9a-f]+ l d .mips16.call.m32_static1_dlld 0+[0-9a-f]+ .mips16.call.m32_static1_dlld
|
||||
0+[0-9a-f]+ l F .mips16.call.m32_static1_dlld 0+[0-9a-f]+ __call_stub_m32_static1_dlld
|
||||
0+[0-9a-f]+ l d .mips16.call.m16_static1_dlld 0+[0-9a-f]+ .mips16.call.m16_static1_dlld
|
||||
0+[0-9a-f]+ l F .mips16.call.m16_static1_dlld 0+[0-9a-f]+ __call_stub_m16_static1_dlld
|
||||
0+[0-9a-f]+ l d .mips16.call.fp.m32_static1_d_l 0+[0-9a-f]+ .mips16.call.fp.m32_static1_d_l
|
||||
0+[0-9a-f]+ l F .mips16.call.fp.m32_static1_d_l 0+[0-9a-f]+ __call_stub_fp_m32_static1_d_l
|
||||
0+[0-9a-f]+ l d .mips16.call.fp.m16_static1_d_l 0+[0-9a-f]+ .mips16.call.fp.m16_static1_d_l
|
||||
0+[0-9a-f]+ l F .mips16.call.fp.m16_static1_d_l 0+[0-9a-f]+ __call_stub_fp_m16_static1_d_l
|
||||
0+[0-9a-f]+ l d .mips16.call.fp.m32_static1_d_d 0+[0-9a-f]+ .mips16.call.fp.m32_static1_d_d
|
||||
0+[0-9a-f]+ l F .mips16.call.fp.m32_static1_d_d 0+[0-9a-f]+ __call_stub_fp_m32_static1_d_d
|
||||
0+[0-9a-f]+ l d .mips16.call.fp.m16_static1_d_d 0+[0-9a-f]+ .mips16.call.fp.m16_static1_d_d
|
||||
0+[0-9a-f]+ l F .mips16.call.fp.m16_static1_d_d 0+[0-9a-f]+ __call_stub_fp_m16_static1_d_d
|
||||
0+[0-9a-f]+ l d .mips16.call.m32_static16_d 0+[0-9a-f]+ .mips16.call.m32_static16_d
|
||||
0+[0-9a-f]+ l F .mips16.call.m32_static16_d 0+[0-9a-f]+ __call_stub_m32_static16_d
|
||||
0+[0-9a-f]+ l d .mips16.call.m16_static16_d 0+[0-9a-f]+ .mips16.call.m16_static16_d
|
||||
0+[0-9a-f]+ l F .mips16.call.m16_static16_d 0+[0-9a-f]+ __call_stub_m16_static16_d
|
||||
0+[0-9a-f]+ l d .mips16.call.m32_static16_dl 0+[0-9a-f]+ .mips16.call.m32_static16_dl
|
||||
0+[0-9a-f]+ l F .mips16.call.m32_static16_dl 0+[0-9a-f]+ __call_stub_m32_static16_dl
|
||||
0+[0-9a-f]+ l d .mips16.call.m16_static16_dl 0+[0-9a-f]+ .mips16.call.m16_static16_dl
|
||||
0+[0-9a-f]+ l F .mips16.call.m16_static16_dl 0+[0-9a-f]+ __call_stub_m16_static16_dl
|
||||
0+[0-9a-f]+ l d .mips16.call.m32_static16_dlld 0+[0-9a-f]+ .mips16.call.m32_static16_dlld
|
||||
0+[0-9a-f]+ l F .mips16.call.m32_static16_dlld 0+[0-9a-f]+ __call_stub_m32_static16_dlld
|
||||
0+[0-9a-f]+ l d .mips16.call.m16_static16_dlld 0+[0-9a-f]+ .mips16.call.m16_static16_dlld
|
||||
0+[0-9a-f]+ l F .mips16.call.m16_static16_dlld 0+[0-9a-f]+ __call_stub_m16_static16_dlld
|
||||
0+[0-9a-f]+ l d .mips16.call.fp.m32_static16_d_l 0+[0-9a-f]+ .mips16.call.fp.m32_static16_d_l
|
||||
0+[0-9a-f]+ l F .mips16.call.fp.m32_static16_d_l 0+[0-9a-f]+ __call_stub_fp_m32_static16_d_l
|
||||
0+[0-9a-f]+ l d .mips16.call.fp.m16_static16_d_l 0+[0-9a-f]+ .mips16.call.fp.m16_static16_d_l
|
||||
0+[0-9a-f]+ l F .mips16.call.fp.m16_static16_d_l 0+[0-9a-f]+ __call_stub_fp_m16_static16_d_l
|
||||
0+[0-9a-f]+ l d .mips16.call.fp.m32_static16_d_d 0+[0-9a-f]+ .mips16.call.fp.m32_static16_d_d
|
||||
0+[0-9a-f]+ l F .mips16.call.fp.m32_static16_d_d 0+[0-9a-f]+ __call_stub_fp_m32_static16_d_d
|
||||
0+[0-9a-f]+ l d .mips16.call.fp.m16_static16_d_d 0+[0-9a-f]+ .mips16.call.fp.m16_static16_d_d
|
||||
0+[0-9a-f]+ l F .mips16.call.fp.m16_static16_d_d 0+[0-9a-f]+ __call_stub_fp_m16_static16_d_d
|
||||
#...
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_l
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_l
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_d
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_d
|
||||
#...
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_ld
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_ld
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_dl
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_dl
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_dlld
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_dlld
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_d_l
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_d_l
|
||||
#...
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_d_d
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_d_d
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ f32
|
||||
0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 f16
|
||||
0+[0-9a-f]+ t __call_stub_fp_m16_static16_d_d
|
||||
0+[0-9a-f]+ t __call_stub_fp_m16_static16_d_l
|
||||
0+[0-9a-f]+ t __call_stub_fp_m16_static1_d_d
|
||||
0+[0-9a-f]+ t __call_stub_fp_m16_static1_d_l
|
||||
0+[0-9a-f]+ t __call_stub_fp_m32_static16_d_d
|
||||
0+[0-9a-f]+ t __call_stub_fp_m32_static16_d_l
|
||||
0+[0-9a-f]+ t __call_stub_fp_m32_static1_d_d
|
||||
0+[0-9a-f]+ t __call_stub_fp_m32_static1_d_l
|
||||
0+[0-9a-f]+ t __call_stub_m16_static16_d
|
||||
0+[0-9a-f]+ t __call_stub_m16_static16_dl
|
||||
0+[0-9a-f]+ t __call_stub_m16_static16_dlld
|
||||
0+[0-9a-f]+ t __call_stub_m16_static1_d
|
||||
0+[0-9a-f]+ t __call_stub_m16_static1_dl
|
||||
0+[0-9a-f]+ t __call_stub_m16_static1_dlld
|
||||
0+[0-9a-f]+ t __call_stub_m32_static16_d
|
||||
0+[0-9a-f]+ t __call_stub_m32_static16_dl
|
||||
0+[0-9a-f]+ t __call_stub_m32_static16_dlld
|
||||
0+[0-9a-f]+ t __call_stub_m32_static1_d
|
||||
0+[0-9a-f]+ t __call_stub_m32_static1_dl
|
||||
0+[0-9a-f]+ t __call_stub_m32_static1_dlld
|
||||
0+[0-9a-f]+ t __fn_stub_m16_d
|
||||
0+[0-9a-f]+ t __fn_stub_m16_d_d
|
||||
0+[0-9a-f]+ t __fn_stub_m16_dl
|
||||
0+[0-9a-f]+ t __fn_stub_m16_dlld
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static16_d
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static16_d_d
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static16_dl
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static16_dlld
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static1_d
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static1_d_d
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static1_dl
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static1_dlld
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static32_d
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static32_d_d
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static32_dl
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static32_dlld
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static_d
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static_d_d
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static_dl
|
||||
0+[0-9a-f]+ t __fn_stub_m16_static_dlld
|
||||
[ ]+ U __mips16_adddf3
|
||||
[ ]+ U __mips16_fixdfsi
|
||||
[ ]+ U __mips16_floatsidf
|
||||
[ ]+ U __mips16_ret_df
|
||||
0+[0-9a-f]+ T f16
|
||||
0+[0-9a-f]+ T f32
|
||||
0+[0-9a-f]+ T m16_d
|
||||
0+[0-9a-f]+ T m16_d_d
|
||||
0+[0-9a-f]+ T m16_d_l
|
||||
0+[0-9a-f]+ T m16_dl
|
||||
0+[0-9a-f]+ T m16_dlld
|
||||
0+[0-9a-f]+ T m16_l
|
||||
0+[0-9a-f]+ T m16_ld
|
||||
0+[0-9a-f]+ t m16_static16_d
|
||||
0+[0-9a-f]+ t m16_static16_d_d
|
||||
0+[0-9a-f]+ t m16_static16_d_l
|
||||
0+[0-9a-f]+ t m16_static16_dl
|
||||
0+[0-9a-f]+ t m16_static16_dlld
|
||||
0+[0-9a-f]+ t m16_static16_l
|
||||
0+[0-9a-f]+ t m16_static16_ld
|
||||
0+[0-9a-f]+ t m16_static1_d
|
||||
0+[0-9a-f]+ t m16_static1_d_d
|
||||
0+[0-9a-f]+ t m16_static1_d_l
|
||||
0+[0-9a-f]+ t m16_static1_dl
|
||||
0+[0-9a-f]+ t m16_static1_dlld
|
||||
0+[0-9a-f]+ t m16_static1_l
|
||||
0+[0-9a-f]+ t m16_static1_ld
|
||||
0+[0-9a-f]+ t m16_static32_d
|
||||
0+[0-9a-f]+ t m16_static32_d_d
|
||||
0+[0-9a-f]+ t m16_static32_d_l
|
||||
0+[0-9a-f]+ t m16_static32_dl
|
||||
0+[0-9a-f]+ t m16_static32_dlld
|
||||
0+[0-9a-f]+ t m16_static32_l
|
||||
0+[0-9a-f]+ t m16_static32_ld
|
||||
0+[0-9a-f]+ t m16_static_d
|
||||
0+[0-9a-f]+ t m16_static_d_d
|
||||
0+[0-9a-f]+ t m16_static_d_l
|
||||
0+[0-9a-f]+ t m16_static_dl
|
||||
0+[0-9a-f]+ t m16_static_dlld
|
||||
0+[0-9a-f]+ t m16_static_l
|
||||
0+[0-9a-f]+ t m16_static_ld
|
||||
0+[0-9a-f]+ T m32_d
|
||||
0+[0-9a-f]+ T m32_d_d
|
||||
0+[0-9a-f]+ T m32_d_l
|
||||
0+[0-9a-f]+ T m32_dl
|
||||
0+[0-9a-f]+ T m32_dlld
|
||||
0+[0-9a-f]+ T m32_l
|
||||
0+[0-9a-f]+ T m32_ld
|
||||
0+[0-9a-f]+ t m32_static16_d
|
||||
0+[0-9a-f]+ t m32_static16_d_d
|
||||
0+[0-9a-f]+ t m32_static16_d_l
|
||||
0+[0-9a-f]+ t m32_static16_dl
|
||||
0+[0-9a-f]+ t m32_static16_dlld
|
||||
0+[0-9a-f]+ t m32_static16_l
|
||||
0+[0-9a-f]+ t m32_static16_ld
|
||||
0+[0-9a-f]+ t m32_static1_d
|
||||
0+[0-9a-f]+ t m32_static1_d_d
|
||||
0+[0-9a-f]+ t m32_static1_d_l
|
||||
0+[0-9a-f]+ t m32_static1_dl
|
||||
0+[0-9a-f]+ t m32_static1_dlld
|
||||
0+[0-9a-f]+ t m32_static1_l
|
||||
0+[0-9a-f]+ t m32_static1_ld
|
||||
0+[0-9a-f]+ t m32_static32_d
|
||||
0+[0-9a-f]+ t m32_static32_d_d
|
||||
0+[0-9a-f]+ t m32_static32_d_l
|
||||
0+[0-9a-f]+ t m32_static32_dl
|
||||
0+[0-9a-f]+ t m32_static32_dlld
|
||||
0+[0-9a-f]+ t m32_static32_l
|
||||
0+[0-9a-f]+ t m32_static32_ld
|
||||
0+[0-9a-f]+ t m32_static_d
|
||||
0+[0-9a-f]+ t m32_static_d_d
|
||||
0+[0-9a-f]+ t m32_static_d_l
|
||||
0+[0-9a-f]+ t m32_static_dl
|
||||
0+[0-9a-f]+ t m32_static_dlld
|
||||
0+[0-9a-f]+ t m32_static_l
|
||||
0+[0-9a-f]+ t m32_static_ld
|
||||
#pass
|
||||
|
||||
@ -2,6 +2,7 @@
|
||||
#name: MIPS MIPS64 MIPS-3D ASE instructions
|
||||
#source: mips64-mips3d.s
|
||||
#stderr: mips64-mips3d.l
|
||||
#as: -64
|
||||
|
||||
# Check MIPS64 MIPS-3D ASE instruction assembly and disassembly
|
||||
# Same as mips64-mips3d.d, but does not need -mips3d assembler
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
#as: -march=octeon
|
||||
#as: -march=octeon -64
|
||||
#objdump: -M reg-names=numeric -dr
|
||||
#name: MIPS octeon instructions
|
||||
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn -mmips:sb1
|
||||
#name: SB-1 MDMX subset and extensions
|
||||
#as: -march=sb1
|
||||
#as: -march=sb1 -64
|
||||
|
||||
# Check SB-1 MDMX subset and extensions assembly and disassembly
|
||||
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn -mmips:sb1
|
||||
#name: SB-1 paired single extensions
|
||||
#as: -march=sb1
|
||||
#as: -march=sb1 -64
|
||||
|
||||
.*: +file format .*mips.*
|
||||
|
||||
|
||||
@ -34,7 +34,6 @@ if { [istarget powerpc*-*-*] } then {
|
||||
if { [istarget powerpc-*-*aix*] } then {
|
||||
run_dump_test "altivec_xcoff"
|
||||
run_dump_test "altivec_xcoff64"
|
||||
run_dump_test "booke_xcoff"
|
||||
} else {
|
||||
run_dump_test "altivec"
|
||||
run_dump_test "altivec_and_spe"
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
# Copyright (C) 1993, 1994, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
|
||||
# 2004, 2005, 2007 Free Software Foundation, Inc.
|
||||
# 2004, 2005, 2007, 2009 Free Software Foundation, Inc.
|
||||
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
@ -371,19 +371,16 @@ proc run_dump_tests { testcases {extra_options {}} } {
|
||||
# as: FLAGS
|
||||
# When assembling FILE.s, pass FLAGS to the assembler.
|
||||
#
|
||||
# PROG: PROGRAM-NAME
|
||||
# The name of the program to run to analyze the .o file produced
|
||||
# by the assembler. This can be omitted; run_dump_test will guess
|
||||
# which program to run by seeing which of the flags options below
|
||||
# is present.
|
||||
#
|
||||
# objdump: FLAGS
|
||||
# nm: FLAGS
|
||||
# objcopy: FLAGS
|
||||
# objdump: FLAGS
|
||||
# readelf: FLAGS
|
||||
# Use the specified program to analyze the .o file, and pass it
|
||||
# FLAGS, in addition to the .o file name. Note that they are run
|
||||
# with LC_ALL=C in the environment to give consistent sorting
|
||||
# of symbols.
|
||||
# of symbols. If no FLAGS are needed then use:
|
||||
# PROG: [nm objcopy objdump readelf]
|
||||
# instead.
|
||||
#
|
||||
# source: SOURCE
|
||||
# Assemble the file SOURCE.s. If omitted, this defaults to FILE.s.
|
||||
|
||||
Loading…
Reference in New Issue
Block a user