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[cgen]
* cpu/mep-core.cpu (fsft, ssarb): Mark as VOLATILE. * cpu/mep-ivc2.cpu (many): Add VOLATILE to more insns that make unspecified accesses to control registers. [sid/component/cgen-cpu/mep] * mep-cop1-16-decode.cxx: Regenerate. * mep-cop1-16-decode.h: Regenerate. * mep-cop1-16-defs.h: Regenerate. * mep-cop1-16-model.cxx: Regenerate. * mep-cop1-16-model.h: Regenerate. * mep-cop1-16-sem.cxx: Regenerate. * mep-cop1-32-decode.cxx: Regenerate. * mep-cop1-32-decode.h: Regenerate. * mep-cop1-32-defs.h: Regenerate. * mep-cop1-32-model.cxx: Regenerate. * mep-cop1-32-model.h: Regenerate. * mep-cop1-32-sem.cxx: Regenerate. * mep-cop1-48-decode.cxx: Regenerate. * mep-cop1-48-decode.h: Regenerate. * mep-cop1-48-defs.h: Regenerate. * mep-cop1-48-model.cxx: Regenerate. * mep-cop1-48-model.h: Regenerate. * mep-cop1-48-sem.cxx: Regenerate. * mep-cop1-64-decode.cxx: Regenerate. * mep-cop1-64-decode.h: Regenerate. * mep-cop1-64-defs.h: Regenerate. * mep-cop1-64-model.cxx: Regenerate. * mep-cop1-64-model.h: Regenerate. * mep-cop1-64-sem.cxx: Regenerate. * mep-core1-decode.cxx: Regenerate. * mep-core1-decode.h: Regenerate. * mep-core1-defs.h: Regenerate. * mep-core1-model.cxx: Regenerate. * mep-core1-model.h: Regenerate. * mep-core1-sem.cxx: Regenerate. * mep-cpu.h: Regenerate. * mep-decode.cxx: Regenerate. * mep-decode.h: Regenerate. * mep-defs.h: Regenerate. * mep-desc.h: Regenerate. * mep-model.cxx: Regenerate. * mep-model.h: Regenerate. * mep-sem.cxx: Regenerate. [opcodes] * mep-desc.c: Regenerate. * mep-desc.h: Regenerate. * mep-opc.c: Regenerate. * mep-opc.h: Regenerate.
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@ -1,3 +1,10 @@
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2009-07-06 DJ Delorie <dj@redhat.com>
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* mep-desc.c: Regenerate.
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* mep-desc.h: Regenerate.
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* mep-opc.c: Regenerate.
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* mep-opc.h: Regenerate.
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2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
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* i386-opc.h (CpuFMA4): Add CpuFMA4.
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File diff suppressed because it is too large
Load Diff
@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2007 Free Software Foundation, Inc.
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Copyright 1996-2009 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2007 Free Software Foundation, Inc.
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Copyright 1996-2009 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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@ -145,12 +145,6 @@ mep_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
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int ok1;
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int ok2;
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int ok3;
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/* If we're assembling VLIW packets, ignore the 12-bit BSR as we
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can't relax that. The 24-bit BSR is matched instead. */
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if (insn->base->num == MEP_INSN_BSR12
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&& cgen_bitset_contains (cd->isas, ISA_EXT_COP1_64))
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return 0;
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/* If the insn has an option bit set that we don't want,
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reject it. */
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2007 Free Software Foundation, Inc.
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Copyright 1996-2009 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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