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* gas/arm/neon-psyn.s: Basic test of programmers syntax.

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* gas/arm/neon-psyn.d: Expected output of above.
This commit is contained in:
Julian Brown 2006-04-26 15:55:17 +00:00
parent 14c28b746f
commit 2161fcce7b
3 changed files with 121 additions and 1 deletions
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7
gas/testsuite/ChangeLog
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2005-04-26 Julian Brown <julian@codesourcery.com>
2006-04-26 Julian Brown <julian@codesourcery.com>
* gas/arm/neon-psyn.s: Basic test of programmers syntax.
* gas/arm/neon-psyn.d: Expected output of above.
2006-04-26 Julian Brown <julian@codesourcery.com>
* gas/arm/copro.s: Avoid ldcl which encodes as a bad Neon instruction.
* gas/arm/copro.d: Update accordingly.

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gas/testsuite/gas/arm/neon-psyn.d Normal file
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# name: Neon programmers syntax
# as: -mfpu=neon
# objdump: -dr --prefix-addresses --show-raw-insn
.*: +file format .*arm.*
Disassembly of section .text:
0[0-9a-f]+ <[^>]+> f2144954 vmul\.i16 q2, q2, q2
0[0-9a-f]+ <[^>]+> f2a33862 vmul\.i32 d3, d3, d2\[1\]
0[0-9a-f]+ <[^>]+> f2233912 vmul\.i32 d3, d3, d2
0[0-9a-f]+ <[^>]+> f2222803 vadd\.i32 d2, d2, d3
0[0-9a-f]+ <[^>]+> f3924a4a vmull\.u16 q2, d2, d2\[1\]
0[0-9a-f]+ <[^>]+> f2910061 vmla\.i16 d0, d1, d1\[2\]
0[0-9a-f]+ <[^>]+> f2910061 vmla\.i16 d0, d1, d1\[2\]
0[0-9a-f]+ <[^>]+> f2255805 vadd\.i32 d5, d5, d5
0[0-9a-f]+ <[^>]+> f2275117 vorr d5, d7, d7
0[0-9a-f]+ <[^>]+> ee021b70 vmov\.16 d2\[1\], r1
0[0-9a-f]+ <[^>]+> ee251b10 vmov\.32 d5\[1\], r1
0[0-9a-f]+ <[^>]+> ec432b15 vmov d5, r2, r3
0[0-9a-f]+ <[^>]+> ee554b30 vmov\.s8 r4, d5\[1\]
0[0-9a-f]+ <[^>]+> ec565b15 vmov r5, r6, d5
0[0-9a-f]+ <[^>]+> f396a507 vabal\.u16 q5, d6, d7
0[0-9a-f]+ <[^>]+> f3bb2744 vcvt\.s32\.f32 q1, q2
0[0-9a-f]+ <[^>]+> f3bb4e15 vcvt\.f32\.u32 d4, d5, #5
0[0-9a-f]+ <[^>]+> f3bc7c05 vdup\.32 d7, d5\[1\]
0[0-9a-f]+ <[^>]+> f3ba1904 vtbl\.8 d1, {d10-d11}, d4
0[0-9a-f]+ <[^>]+> f4aa698f vld2\.32 {d6\[1\],d7\[1\]}, \[sl\]
0[0-9a-f]+ <[^>]+> f4aa476f vld4\.16 {d4\[1\],d6\[1\],d8\[1\],d10\[1\]}, \[sl\]
0[0-9a-f]+ <[^>]+> f4aa6e4f vld3\.16 {d6\[\]-d8\[\]}, \[sl\]
0[0-9a-f]+ <[^>]+> ee100b30 vmov\.s16 r0, d0\[0\]
0[0-9a-f]+ <[^>]+> f42a604f vld4\.16 {d6-d9}, \[sl\]
0[0-9a-f]+ <[^>]+> f4aa266f vld3\.16 {d2\[1\],d4\[1\],d6\[1\]}, \[sl\]
0[0-9a-f]+ <[^>]+> f3b47908 vtbl\.8 d7, {d4-d5}, d8
0[0-9a-f]+ <[^>]+> f3142156 vbsl q1, q2, q3
0[0-9a-f]+ <[^>]+> f3032e04 vcge\.f32 d2, d3, d4
0[0-9a-f]+ <[^>]+> f3b52083 vcge\.s16 d2, d3, #0
0[0-9a-f]+ <[^>]+> ee823b30 vdup\.16 d2, r3

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.arm
.syntax unified
fish .qn q2
cow .dn d2[1]
chips .dn d2
banana .dn d3
vmul fish.s16, fish.s16, fish.s16
vmul banana, banana, cow.s32
vmul d3.s32, d3.s32, d2.s32
vadd d2.s32, d3.s32
vmull fish.u32, chips.u16, chips.u16[1]
X .dn D0.S16
Y .dn D1.S16
Z .dn Y[2]
VMLA X, Y, Z
VMLA X, Y, Y[2]
foo .dn d5
bar .dn d7
foos .dn foo[1]
vadd foo, foo, foo.u32
vmov foo, bar
vmov d2.s16[1], r1
vmov d5.s32[1], r1
vmov foo, r2, r3
vmov r4, foos.s8
vmov r5, r6, foo
baa .qn q5
moo .dn d6
sheep .dn d7
chicken .dn d8
vabal baa, moo.u16, sheep.u16
vcvt q1.s32, q2.f32
vcvt d4.f, d5.u32, #5
vdup bar, foos.32
vtbl d1, {baa}, d4.8
el1 .dn d4.16[1]
el2 .dn d6.16[1]
el3 .dn d8.16[1]
el4 .dn d10.16[1]
vld2 {moo.32[1], sheep.32[1]}, [r10]
vld4 {el1, el2, el3, el4}, [r10]
vld3 {moo.16[], sheep.16[], chicken.16[]}, [r10]
vmov r0,d0.s16[0]
el5 .qn q3.16
el6 .qn q4.16
vld4 {el5,el6}, [r10]
vld3 {d2.s16[1], d4.s16[1], d6.s16[1]}, [r10]
chicken8 .dn chicken.8
vtbl d7.8, {d4, d5}, chicken8
vbsl q1.8, q2.16, q3.8
vcge d2.32, d3.f, d4.f
vcge d2.16, d3.s16, #0
dupme .dn d2.s16
vdup dupme, r3