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* Makefile.in (SIM_OBJS): Add sim-load.o.
* interp.c (sim_kind, myname): New static locals. (sim_open): Set sim_kind, myname. Ignore -E arg. (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to load file into simulator. Set start address from bfd. (sim_create_inferior): Return SIM_RC. Delete arg start_address.
This commit is contained in:
David Edelsohn
parent
1d77e69d4a
commit
1ad886c928
@ -1,3 +1,12 @@
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Thu Apr 17 03:53:18 1997 Doug Evans <dje@canuck.cygnus.com>
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* Makefile.in (SIM_OBJS): Add sim-load.o.
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* interp.c (sim_kind, myname): New static locals.
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(sim_open): Set sim_kind, myname. Ignore -E arg.
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(sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
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load file into simulator. Set start address from bfd.
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(sim_create_inferior): Return SIM_RC. Delete arg start_address.
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Wed Apr 16 19:53:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* simops.c (OP_10007E0): Only provide system calls SYS_execv,
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@ -1,11 +1,61 @@
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#include <signal.h>
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#include "sysdep.h"
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#include "bfd.h"
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#include "remote-sim.h"
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#include "callback.h"
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#include "v850_sim.h"
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enum interrupt_type
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{
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int_none,
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int_reset,
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int_nmi,
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int_intov1,
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int_intp10,
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int_intp11,
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int_intp12,
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int_intp13,
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int_intcm4,
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num_int_types
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};
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enum interrupt_cond_type
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{
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int_cond_none,
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int_cond_pc,
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int_cond_time
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};
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struct interrupt_generator
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{
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enum interrupt_type type;
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enum interrupt_cond_type cond_type;
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int number;
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int address;
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int time;
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int enabled;
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struct interrupt_generator *next;
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};
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char *interrupt_names[] = {
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"",
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"reset",
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"nmi",
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"intov1",
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"intp10",
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"intp11",
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"intp12",
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"intp13",
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"intcm4",
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NULL
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};
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struct interrupt_generator *intgen_list;
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/* True if a non-maskable (such as NMI or reset) interrupt generator
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is present. */
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static int have_nm_generator;
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#ifndef INLINE
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#ifdef __GNUC__
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#define INLINE inline
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@ -14,11 +64,20 @@
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#endif
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#endif
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#define MEM_SIZE 18 /* V850 memory size is 18 bits XXX */
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/* These default values correspond to expected usage for the chip. */
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SIM_ADDR rom_size = 0x8000;
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SIM_ADDR low_end = 0x200000;
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SIM_ADDR high_start = 0xffe000;
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SIM_ADDR high_base;
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host_callback *v850_callback;
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int v850_debug;
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static SIM_OPEN_KIND sim_kind;
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static char *myname;
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uint32 OP[4];
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@ -35,6 +94,7 @@ static void do_format_9_10 PARAMS ((uint32));
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static void init_system PARAMS ((void));
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#define MAX_HASH 63
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struct hash_entry
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{
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struct hash_entry *next;
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@ -55,12 +115,15 @@ hash(insn)
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|| (insn & 0x0700) == 0x0600
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|| (insn & 0x0780) == 0x0700)
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return (insn & 0x07e0) >> 5;
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if ((insn & 0x0700) == 0x0300
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|| (insn & 0x0700) == 0x0400
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|| (insn & 0x0700) == 0x0500)
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return (insn & 0x0780) >> 7;
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if ((insn & 0x07c0) == 0x0780)
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return (insn & 0x07c0) >> 6;
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return (insn & 0x07e0) >> 5;
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}
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@ -76,7 +139,7 @@ lookup_hash (ins)
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{
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if (h->next == NULL)
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{
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(*v850_callback->printf_filtered) (v850_callback, "ERROR looking up hash for %x\n", ins);
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(*v850_callback->printf_filtered) (v850_callback, "ERROR looking up hash for 0x%x, PC=0x%x\n", ins, PC);
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exit(1);
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}
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h = h->next;
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@ -84,6 +147,9 @@ lookup_hash (ins)
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return (h);
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}
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/* FIXME These would more efficient to use than load_mem/store_mem,
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but need to be changed to use the memory map. */
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uint8
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get_byte (x)
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uint8 *x;
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@ -138,6 +204,92 @@ put_word (addr, data)
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a[3] = (data >> 24) & 0xff;
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}
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uint8 *
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map (addr)
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SIM_ADDR addr;
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{
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uint8 *p;
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/* Mask down to 24 bits. */
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addr &= 0xffffff;
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if (addr < low_end)
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{
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/* "Mirror" the addresses below 1MB. */
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if (addr < 0x100000)
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addr &= (rom_size - 1);
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else
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addr += (rom_size - 0x100000);
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return (uint8 *) (addr + State.mem);
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}
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else if (addr >= high_start)
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{
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/* If in the peripheral I/O region, mirror 1K region across 4K,
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and similarly if in the internal RAM region. */
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if (addr >= 0xfff000)
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addr &= 0xfff3ff;
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else if (addr >= 0xffe000)
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addr &= 0xffe3ff;
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return (uint8 *) (addr - high_start + high_base + State.mem);
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}
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else
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{
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/* Signal a memory error. */
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State.exception = SIGSEGV;
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/* Point to a location not in main memory - renders invalid
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addresses harmless until we get back to main insn loop. */
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return (uint8 *) &(State.dummy_mem);
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}
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}
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uint32
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load_mem (addr, len)
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SIM_ADDR addr;
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int len;
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{
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uint8 *p = map (addr);
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switch (len)
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{
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case 1:
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return p[0];
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case 2:
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return p[1] << 8 | p[0];
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case 4:
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return p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0];
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default:
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abort ();
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}
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}
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void
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store_mem (addr, len, data)
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SIM_ADDR addr;
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int len;
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uint32 data;
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{
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uint8 *p = map (addr);
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switch (len)
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{
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case 1:
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p[0] = data;
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return;
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case 2:
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p[0] = data;
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p[1] = data >> 8;
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return;
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case 4:
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p[0] = data;
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p[1] = data >> 8;
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p[2] = data >> 16;
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p[3] = data >> 24;
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return;
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default:
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abort ();
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}
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}
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static void
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do_format_1_2 (insn)
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uint32 insn;
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@ -241,19 +393,82 @@ sim_size (power)
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int power;
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{
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if (State.mem)
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{
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free (State.mem);
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}
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int totsize;
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State.mem = (uint8 *)calloc(1,1<<MEM_SIZE);
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if (State.mem)
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free (State.mem);
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totsize = rom_size + (low_end - 0x100000) + (0x1000000 - high_start);
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high_base = rom_size + (low_end - 0x100000);
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State.mem = (uint8 *) calloc (1, totsize);
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if (!State.mem)
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{
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(*v850_callback->printf_filtered) (v850_callback, "Memory allocation failed.\n");
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exit(1);
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(*v850_callback->printf_filtered) (v850_callback, "Allocation of main memory failed.\n");
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exit (1);
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}
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}
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void
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sim_set_memory_map (spec)
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char *spec;
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{
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char *reststr, *nreststr;
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SIM_ADDR new_low_end, new_high_start;
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new_low_end = low_end;
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new_high_start = high_start;
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if (! strncmp (spec, "hole=", 5))
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{
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new_low_end = sim_parse_number (spec + 5, &reststr);
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if (new_low_end < 0x100000)
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{
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(*v850_callback->printf_filtered) (v850_callback,
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"Low end must be at least 0x100000\n");
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return;
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}
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if (*reststr == ',')
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{
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++reststr;
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new_high_start = sim_parse_number (reststr, &nreststr);
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/* FIXME Check high_start also */
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}
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(*v850_callback->printf_filtered) (v850_callback,
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"Hole goes from 0x%x to 0x%x\n",
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new_low_end, new_high_start);
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}
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else
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{
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(*v850_callback->printf_filtered) (v850_callback, "Invalid specification for memory map, must be `hole=<m>[,<n>]'\n");
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}
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if (new_low_end != low_end || new_high_start != high_start)
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{
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low_end = new_low_end;
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high_start = new_high_start;
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if (State.mem)
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{
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(*v850_callback->printf_filtered) (v850_callback, "Reconfiguring memory (old contents will be lost)\n");
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sim_size (1);
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}
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}
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}
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/* Parse a number in hex, octal, or decimal form. */
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int
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sim_parse_number (str, rest)
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char *str, **rest;
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{
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if (str[0] == '0' && str[1] == 'x')
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return strtol (str, rest, 16);
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else if (str[0] == '0')
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return strtol (str, rest, 16);
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else
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return strtol (str, rest, 10);
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}
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static void
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init_system ()
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{
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@ -262,35 +477,45 @@ init_system ()
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}
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int
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sim_write (addr, buffer, size)
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sim_write (sd, addr, buffer, size)
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SIM_DESC sd;
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SIM_ADDR addr;
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unsigned char *buffer;
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int size;
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{
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int i;
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init_system ();
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for (i = 0; i < size; i++)
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{
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State.mem[i+addr] = buffer[i];
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}
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store_mem (addr + i, 1, buffer[i]);
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return size;
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}
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void
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sim_open (args)
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char *args;
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SIM_DESC
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sim_open (kind,argv)
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SIM_OPEN_KIND kind;
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char **argv;
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{
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struct simops *s;
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struct hash_entry *h;
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if (args != NULL)
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char **p;
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sim_kind = kind;
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myname = argv[0];
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for (p = argv + 1; *p; ++p)
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{
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if (strcmp (*p, "-E") == 0)
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++p; /* ignore endian spec */
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else
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#ifdef DEBUG
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if (strcmp (args, "-t") == 0)
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if (strcmp (*p, "-t") == 0)
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v850_debug = DEBUG;
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else
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#endif
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(*v850_callback->printf_filtered) (v850_callback, "ERROR: unsupported option(s): %s\n",args);
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(*v850_callback->printf_filtered) (v850_callback, "ERROR: unsupported option(s): %s\n",*p);
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}
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/* put all the opcodes in the hash table */
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@ -304,18 +529,22 @@ sim_open (args)
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if (h->ops)
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{
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h->next = calloc(1,sizeof(struct hash_entry));
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h->next = (struct hash_entry *) calloc(1,sizeof(struct hash_entry));
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h = h->next;
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}
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h->ops = s;
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h->mask = s->mask;
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h->opcode = s->opcode;
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}
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/* fudge our descriptor for now */
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return (SIM_DESC) 1;
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}
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void
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sim_close (quitting)
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sim_close (sd, quitting)
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SIM_DESC sd;
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int quitting;
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{
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/* nothing to do */
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@ -335,111 +564,229 @@ sim_set_profile_size (n)
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(*v850_callback->printf_filtered) (v850_callback, "sim_set_profile_size %d\n", n);
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}
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time_t start_time;
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static void do_interrupt PARAMS ((enum interrupt_type));
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void
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sim_resume (step, siggnal)
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sim_resume (sd, step, siggnal)
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SIM_DESC sd;
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int step, siggnal;
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{
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uint32 inst, opcode;
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reg_t oldpc;
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struct interrupt_generator *intgen;
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time_t now;
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PC = State.sregs[0];
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if (step)
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State.exception = SIGTRAP;
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else
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State.exception = 0;
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if (step)
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State.exception = SIGTRAP;
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else
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State.exception = 0;
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do
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{
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inst = RLW (PC);
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oldpc = PC;
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opcode = (inst & 0x07e0) >> 5;
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if ((opcode & 0x30) == 0
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|| (opcode & 0x38) == 0x10)
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{
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do_format_1_2 (inst & 0xffff);
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PC += 2;
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}
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else if ((opcode & 0x3C) == 0x18
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|| (opcode & 0x3C) == 0x1C
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|| (opcode & 0x3C) == 0x20
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|| (opcode & 0x3C) == 0x24
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|| (opcode & 0x3C) == 0x28)
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{
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do_format_4 (inst & 0xffff);
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PC += 2;
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}
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else if ((opcode & 0x3C) == 0x2C)
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{
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do_format_3 (inst & 0xffff);
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/* No PC update, it's done in the instruction. */
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}
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else if ((opcode & 0x38) == 0x30)
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{
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do_format_6 (inst);
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PC += 4;
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}
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else if ((opcode & 0x3C) == 0x38)
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{
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do_format_7 (inst);
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PC += 4;
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}
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else if ((opcode & 0x3E) == 0x3C)
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{
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do_format_5 (inst);
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/* No PC update, it's done in the instruction. */
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}
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else if ((opcode & 0x3F) == 0x3E)
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{
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do_format_8 (inst);
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PC += 4;
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}
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else
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{
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do_format_9_10 (inst);
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PC += 4;
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}
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}
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while (!State.exception);
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time (&start_time);
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State.sregs[0] = PC;
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do
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{
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/* Fetch the current instruction. */
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inst = RLW (PC);
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oldpc = PC;
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opcode = (inst & 0x07e0) >> 5;
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/* Decode the opcode field. */
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if ((opcode & 0x30) == 0
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|| (opcode & 0x38) == 0x10)
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{
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do_format_1_2 (inst & 0xffff);
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PC += 2;
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}
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else if ((opcode & 0x3C) == 0x18
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|| (opcode & 0x3C) == 0x1C
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|| (opcode & 0x3C) == 0x20
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|| (opcode & 0x3C) == 0x24
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|| (opcode & 0x3C) == 0x28)
|
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{
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do_format_4 (inst & 0xffff);
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PC += 2;
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}
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else if ((opcode & 0x3C) == 0x2C)
|
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{
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do_format_3 (inst & 0xffff);
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/* No PC update, it's done in the instruction. */
|
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}
|
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else if ((opcode & 0x38) == 0x30)
|
||||
{
|
||||
do_format_6 (inst);
|
||||
PC += 4;
|
||||
}
|
||||
else if ((opcode & 0x3C) == 0x38)
|
||||
{
|
||||
do_format_7 (inst);
|
||||
PC += 4;
|
||||
}
|
||||
else if ((opcode & 0x3E) == 0x3C)
|
||||
{
|
||||
do_format_5 (inst);
|
||||
/* No PC update, it's done in the instruction. */
|
||||
}
|
||||
else if ((opcode & 0x3F) == 0x3E)
|
||||
{
|
||||
do_format_8 (inst);
|
||||
PC += 4;
|
||||
}
|
||||
else
|
||||
{
|
||||
do_format_9_10 (inst);
|
||||
PC += 4;
|
||||
}
|
||||
|
||||
/* Check for and handle pending interrupts. */
|
||||
if (intgen_list && (have_nm_generator || !(PSW & PSW_ID)))
|
||||
{
|
||||
intgen = NULL;
|
||||
for (intgen = intgen_list; intgen != NULL; intgen = intgen->next)
|
||||
{
|
||||
if (intgen->cond_type == int_cond_pc
|
||||
&& oldpc == intgen->address
|
||||
&& intgen->enabled)
|
||||
{
|
||||
break;
|
||||
}
|
||||
else if (intgen->cond_type == int_cond_time
|
||||
&& intgen->enabled)
|
||||
{
|
||||
time (&now);
|
||||
if (((long) now - (long) start_time) > intgen->time)
|
||||
{
|
||||
intgen->enabled = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (intgen)
|
||||
do_interrupt (intgen->type);
|
||||
}
|
||||
else if (State.pending_nmi)
|
||||
{
|
||||
State.pending_nmi = 0;
|
||||
do_interrupt (int_nmi);
|
||||
}
|
||||
}
|
||||
while (!State.exception);
|
||||
}
|
||||
|
||||
static void
|
||||
do_interrupt (inttype)
|
||||
enum interrupt_type inttype;
|
||||
{
|
||||
/* Disable further interrupts. */
|
||||
PSW |= PSW_ID;
|
||||
/* Indicate that we're doing interrupt not exception processing. */
|
||||
PSW &= ~PSW_EP;
|
||||
if (inttype == int_reset)
|
||||
{
|
||||
PC = 0;
|
||||
PSW = 0x20;
|
||||
ECR = 0;
|
||||
/* (Might be useful to init other regs with random values.) */
|
||||
}
|
||||
else if (inttype == int_nmi)
|
||||
{
|
||||
if (PSW & PSW_NP)
|
||||
{
|
||||
/* We're already working on an NMI, so this one must wait
|
||||
around until the previous one is done. The processor
|
||||
ignores subsequent NMIs, so we don't need to count them. */
|
||||
State.pending_nmi = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
FEPC = PC;
|
||||
FEPSW = PSW;
|
||||
/* Set the FECC part of the ECR. */
|
||||
ECR &= 0x0000ffff;
|
||||
ECR |= 0x10;
|
||||
PSW |= PSW_NP;
|
||||
PC = 0x10;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
EIPC = PC;
|
||||
EIPSW = PSW;
|
||||
/* Clear the EICC part of the ECR, will set below. */
|
||||
ECR &= 0xffff0000;
|
||||
switch (inttype)
|
||||
{
|
||||
case int_intov1:
|
||||
PC = 0x80;
|
||||
ECR |= 0x80;
|
||||
break;
|
||||
case int_intp10:
|
||||
PC = 0x90;
|
||||
ECR |= 0x90;
|
||||
break;
|
||||
case int_intp11:
|
||||
PC = 0xa0;
|
||||
ECR |= 0xa0;
|
||||
break;
|
||||
case int_intp12:
|
||||
PC = 0xb0;
|
||||
ECR |= 0xb0;
|
||||
break;
|
||||
case int_intp13:
|
||||
PC = 0xc0;
|
||||
ECR |= 0xc0;
|
||||
break;
|
||||
case int_intcm4:
|
||||
PC = 0xd0;
|
||||
ECR |= 0xd0;
|
||||
break;
|
||||
default:
|
||||
/* Should never be possible. */
|
||||
abort ();
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int
|
||||
sim_trace ()
|
||||
sim_trace (sd)
|
||||
SIM_DESC sd;
|
||||
{
|
||||
#ifdef DEBUG
|
||||
v850_debug = DEBUG;
|
||||
#endif
|
||||
sim_resume (0, 0);
|
||||
sim_resume (sd, 0, 0);
|
||||
return 1;
|
||||
}
|
||||
|
||||
void
|
||||
sim_info (verbose)
|
||||
sim_info (sd, verbose)
|
||||
SIM_DESC sd;
|
||||
int verbose;
|
||||
{
|
||||
(*v850_callback->printf_filtered) (v850_callback, "sim_info\n");
|
||||
}
|
||||
|
||||
void
|
||||
sim_create_inferior (start_address, argv, env)
|
||||
SIM_ADDR start_address;
|
||||
SIM_RC
|
||||
sim_create_inferior (sd, argv, env)
|
||||
SIM_DESC sd;
|
||||
char **argv;
|
||||
char **env;
|
||||
{
|
||||
PC = start_address;
|
||||
return SIM_RC_OK;
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
sim_kill ()
|
||||
sim_kill (sd)
|
||||
SIM_DESC sd;
|
||||
{
|
||||
/* nothing to do */
|
||||
}
|
||||
|
||||
void
|
||||
sim_set_callbacks(p)
|
||||
sim_set_callbacks (sd, p)
|
||||
SIM_DESC sd;
|
||||
host_callback *p;
|
||||
{
|
||||
v850_callback = p;
|
||||
@ -448,21 +795,28 @@ sim_set_callbacks(p)
|
||||
/* All the code for exiting, signals, etc needs to be revamped.
|
||||
|
||||
This is enough to get c-torture limping though. */
|
||||
|
||||
void
|
||||
sim_stop_reason (reason, sigrc)
|
||||
sim_stop_reason (sd, reason, sigrc)
|
||||
SIM_DESC sd;
|
||||
enum sim_stop *reason;
|
||||
int *sigrc;
|
||||
{
|
||||
|
||||
*reason = sim_stopped;
|
||||
if (State.exception == SIGQUIT)
|
||||
*sigrc = 0;
|
||||
if (State.exception == SIG_V850_EXIT)
|
||||
{
|
||||
*reason = sim_exited;
|
||||
*sigrc = State.regs[7];
|
||||
}
|
||||
else
|
||||
*sigrc = State.exception;
|
||||
{
|
||||
*reason = sim_stopped;
|
||||
*sigrc = State.exception;
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
sim_fetch_register (rn, memory)
|
||||
sim_fetch_register (sd, rn, memory)
|
||||
SIM_DESC sd;
|
||||
int rn;
|
||||
unsigned char *memory;
|
||||
{
|
||||
@ -470,7 +824,8 @@ sim_fetch_register (rn, memory)
|
||||
}
|
||||
|
||||
void
|
||||
sim_store_register (rn, memory)
|
||||
sim_store_register (sd, rn, memory)
|
||||
SIM_DESC sd;
|
||||
int rn;
|
||||
unsigned char *memory;
|
||||
{
|
||||
@ -478,31 +833,205 @@ sim_store_register (rn, memory)
|
||||
}
|
||||
|
||||
int
|
||||
sim_read (addr, buffer, size)
|
||||
sim_read (sd, addr, buffer, size)
|
||||
SIM_DESC sd;
|
||||
SIM_ADDR addr;
|
||||
unsigned char *buffer;
|
||||
int size;
|
||||
{
|
||||
int i;
|
||||
for (i = 0; i < size; i++)
|
||||
{
|
||||
buffer[i] = State.mem[addr + i];
|
||||
}
|
||||
buffer[i] = load_mem (addr + i, 1);
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
int current_intgen_number = 1;
|
||||
|
||||
void
|
||||
sim_do_command (cmd)
|
||||
char *cmd;
|
||||
{
|
||||
(*v850_callback->printf_filtered) (v850_callback, "sim_do_command: %s\n", cmd);
|
||||
sim_set_interrupt (spec)
|
||||
char *spec;
|
||||
{
|
||||
int i, num;
|
||||
char **argv;
|
||||
struct interrupt_generator *intgen, *tmpgen;
|
||||
extern char **buildargv ();
|
||||
|
||||
argv = buildargv (spec);
|
||||
|
||||
if (*argv && ! strcmp (*argv, "add"))
|
||||
{
|
||||
/* Create a new interrupt generator object. */
|
||||
intgen = (struct interrupt_generator *)
|
||||
malloc (sizeof(struct interrupt_generator));
|
||||
intgen->type = int_none;
|
||||
intgen->cond_type = int_cond_none;
|
||||
intgen->address = 0;
|
||||
intgen->time = 0;
|
||||
intgen->enabled = 0;
|
||||
++argv;
|
||||
/* Match on interrupt type name. */
|
||||
for (i = 0; i < num_int_types; ++i)
|
||||
{
|
||||
if (*argv && ! strcmp (*argv, interrupt_names[i]))
|
||||
{
|
||||
intgen->type = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (intgen->type == int_none)
|
||||
{
|
||||
(*v850_callback->printf_filtered) (v850_callback, "Interrupt type unknown; known types are\n");
|
||||
for (i = 0; i < num_int_types; ++i)
|
||||
{
|
||||
(*v850_callback->printf_filtered) (v850_callback, " %s", interrupt_names[i]);
|
||||
}
|
||||
(*v850_callback->printf_filtered) (v850_callback, "\n");
|
||||
free (intgen);
|
||||
return;
|
||||
}
|
||||
++argv;
|
||||
intgen->address = 0;
|
||||
intgen->time = 0;
|
||||
if (*argv && ! strcmp (*argv, "pc"))
|
||||
{
|
||||
intgen->cond_type = int_cond_pc;
|
||||
++argv;
|
||||
intgen->address = sim_parse_number (*argv, NULL);
|
||||
}
|
||||
else if (*argv && ! strcmp (*argv, "time"))
|
||||
{
|
||||
intgen->cond_type = int_cond_time;
|
||||
++argv;
|
||||
intgen->time = sim_parse_number (*argv, NULL);
|
||||
}
|
||||
else
|
||||
{
|
||||
(*v850_callback->printf_filtered) (v850_callback, "Condition type must be `pc' or `time'.\n");
|
||||
free (intgen);
|
||||
return;
|
||||
}
|
||||
/* We now have a valid interrupt generator. Number it and add
|
||||
to the list of generators. */
|
||||
intgen->number = current_intgen_number++;
|
||||
intgen->enabled = 1;
|
||||
intgen->next = intgen_list;
|
||||
intgen_list = intgen;
|
||||
(*v850_callback->printf_filtered) (v850_callback, "Interrupt generator %d (NMI) at pc=0x%x, time=%d.\n", intgen_list->number, intgen_list->address, intgen_list->time);
|
||||
}
|
||||
else if (*argv && !strcmp (*argv, "remove"))
|
||||
{
|
||||
++argv;
|
||||
num = sim_parse_number (*argv, NULL);
|
||||
tmpgen = NULL;
|
||||
if (intgen_list)
|
||||
{
|
||||
if (intgen_list->number == num)
|
||||
{
|
||||
tmpgen = intgen_list;
|
||||
intgen_list = intgen_list->next;
|
||||
}
|
||||
else
|
||||
{
|
||||
for (intgen = intgen_list; intgen != NULL; intgen = intgen->next)
|
||||
{
|
||||
if (intgen->next != NULL && intgen->next->number == num)
|
||||
{
|
||||
tmpgen = intgen->next;
|
||||
intgen->next = intgen->next->next;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (tmpgen)
|
||||
free (tmpgen);
|
||||
else
|
||||
(*v850_callback->printf_filtered) (v850_callback,
|
||||
"No interrupt generator numbered %d, ignoring.\n", num);
|
||||
}
|
||||
}
|
||||
else if (*argv && !strcmp (*argv, "info"))
|
||||
{
|
||||
if (intgen_list)
|
||||
{
|
||||
for (intgen = intgen_list; intgen != NULL; intgen = intgen->next)
|
||||
(*v850_callback->printf_filtered) (v850_callback,
|
||||
"Interrupt generator %d (%s) at pc=0x%x/time=%d%s.\n",
|
||||
intgen->number,
|
||||
interrupt_names[intgen->type],
|
||||
intgen->address,
|
||||
intgen->time,
|
||||
(intgen->enabled ? "" : " (disabled)"));
|
||||
}
|
||||
else
|
||||
{
|
||||
(*v850_callback->printf_filtered) (v850_callback, "No interrupt generators defined.\n");
|
||||
}
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
(*v850_callback->printf_filtered) (v850_callback,
|
||||
"Invalid interrupt command, must be one of `add', `remove', or `info'.\n");
|
||||
}
|
||||
/* Cache the presence of a non-maskable generator. */
|
||||
have_nm_generator = 0;
|
||||
for (intgen = intgen_list; intgen != NULL; intgen = intgen->next)
|
||||
{
|
||||
if (intgen->type == int_nmi || intgen->type == int_reset)
|
||||
{
|
||||
have_nm_generator = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int
|
||||
sim_load (prog, from_tty)
|
||||
void
|
||||
sim_do_command (sd, cmd)
|
||||
SIM_DESC sd;
|
||||
char *cmd;
|
||||
{
|
||||
char *mm_cmd = "memory-map";
|
||||
char *int_cmd = "interrupt";
|
||||
|
||||
if (! strncmp (cmd, mm_cmd, strlen (mm_cmd))
|
||||
&& strchr (" ", cmd[strlen(mm_cmd)]))
|
||||
sim_set_memory_map (cmd + strlen(mm_cmd) + 1);
|
||||
|
||||
else if (! strncmp (cmd, int_cmd, strlen (int_cmd))
|
||||
&& strchr (" ", cmd[strlen(int_cmd)]))
|
||||
sim_set_interrupt (cmd + strlen(int_cmd) + 1);
|
||||
|
||||
else if (! strcmp (cmd, "help"))
|
||||
{
|
||||
(*v850_callback->printf_filtered) (v850_callback, "V850 simulator commands:\n\n");
|
||||
(*v850_callback->printf_filtered) (v850_callback, "interrupt add <inttype> { pc | time } <value> -- Set up an interrupt generator\n");
|
||||
(*v850_callback->printf_filtered) (v850_callback, "interrupt remove <n> -- Remove an existing interrupt generator\n");
|
||||
(*v850_callback->printf_filtered) (v850_callback, "interrupt info -- List all the interrupt generators\n");
|
||||
(*v850_callback->printf_filtered) (v850_callback, "memory-map hole=<m>,<n> -- Set the memory map to have a hole between <m> and <n>\n");
|
||||
(*v850_callback->printf_filtered) (v850_callback, "\n");
|
||||
}
|
||||
else
|
||||
(*v850_callback->printf_filtered) (v850_callback, "\"%s\" is not a valid V850 simulator command.\n",
|
||||
cmd);
|
||||
}
|
||||
|
||||
SIM_RC
|
||||
sim_load (sd, prog, abfd, from_tty)
|
||||
SIM_DESC sd;
|
||||
char *prog;
|
||||
bfd *abfd;
|
||||
int from_tty;
|
||||
{
|
||||
/* Return nonzero so GDB will handle it. */
|
||||
return 1;
|
||||
extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
|
||||
bfd *prog_bfd;
|
||||
|
||||
prog_bfd = sim_load_file (sd, myname, v850_callback, prog, abfd,
|
||||
sim_kind == SIM_OPEN_DEBUG);
|
||||
if (prog_bfd == NULL)
|
||||
return SIM_RC_FAIL;
|
||||
PC = bfd_get_start_address (prog_bfd);
|
||||
if (abfd == NULL)
|
||||
bfd_close (prog_bfd);
|
||||
return SIM_RC_OK;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user