mirror/binutils-gdb
2
0
Fork 0
mirror of https://sourceware.org/git/binutils-gdb.git synced 2025-04-06 14:21:43 +08:00
Code Issues Packages Projects Releases Wiki Activity

x86: Ignore rounding for vcvt[,u]si2sd under r32 and vcvt[,u]dq2pd instead of reporting bad for disassembler

Browse Source 
According to SDM, vcvt[,u]si2sd under r32 and vcvt[,u]dq2pd treat
Rounding as Ignored when trying to using them. Thus, disassembler
should accept bytecode with rounding instead of reporting bad.

For assembler, it needs some more time to decide how to deal
with that.

gas/ChangeLog:

	* testsuite/gas/i386/evex.d: Add new testcase for vcvt[,u]dq2pd.
	Change the output for vcvt[,u]si2sd.
	* testsuite/gas/i386/evex.s: Ditto.
	* testsuite/gas/i386/x86-64-evex.d: Ditto.

opcodes/ChangeLog:

	* i386-dis-evex-w.h: Add EXxEVexR64 for vcvt[,u]dq2pd.
	* i386-dis.c (OP_Rounding): Mark EVEX_b as used to change the handle
	for ignored rounding.
This commit is contained in:
Haochen Jiang 2025-01-14 16:18:50 +08:00
parent bd55dac896
commit 18575d2ca8
5 changed files with 21 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
gas/testsuite/gas/i386/evex.d
View File

@ -8,14 +8,18 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 62 f1 d6 38 2a f0 vcvtsi2ssl %eax,\{rd-sae\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sdl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sdl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d6 08 7b f0 vcvtusi2ssl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 08 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 08 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ssl %eax,\{rd-sae\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 e1 7e 08 2d c0 \{evex\} vcvtss2si %xmm0,%eax
+[a-f0-9]+: 62 e1 7c 08 c2 c0 00 vcmpeqps %xmm0,%xmm0,%k0
+[a-f0-9]+: 62 f1 7e 38 e6 f5 vcvtdq2pd %ymm5,%zmm6
+[a-f0-9]+: 62 f1 7a 38 e6 f5 vcvtdq2pd %xmm5,%ymm6
+[a-f0-9]+: 62 f1 7e 38 7a f5 vcvtudq2pd %ymm5,%zmm6
+[a-f0-9]+: 62 f1 7a 38 7a f5 vcvtudq2pd %xmm5,%ymm6
#pass

4
gas/testsuite/gas/i386/evex.s
View File

@ -13,3 +13,7 @@ _start:
.insn EVEX.LIG.F2.0F.W1 0x7b, %eax,{rd-sae},%xmm5,%xmm6
.byte 0x62, 0xe1, 0x7e, 0x08, 0x2d, 0xc0
.byte 0x62, 0xe1, 0x7c, 0x08, 0xc2, 0xc0, 0x00
.insn EVEX.512.F3.0F.W0 0xe6, {rd-sae},%zmm5,%ymm6
.insn EVEX.256.F3.0F.W0 0xe6, {rd-sae},%ymm5,%xmm6
.insn EVEX.512.F3.0F.W0 0x7a, {rd-sae},%zmm5,%ymm6
.insn EVEX.256.F3.0F.W0 0x7a, {rd-sae},%ymm5,%xmm6

8
gas/testsuite/gas/i386/x86-64-evex.d
View File

@ -9,14 +9,18 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 62 f1 d6 38 2a f0 vcvtsi2ss %rax,\{rd-sae\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sd %eax,\{rd-bad\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sd %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sd %rax,\{rd-sae\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d6 08 7b f0 vcvtusi2ss %rax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 08 7b f0 vcvtusi2sd %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 08 7b f0 vcvtusi2sd %rax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ss %rax,\{rd-sae\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sd %eax,\{rd-bad\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sd %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sd %rax,\{rd-sae\},%xmm5,%xmm6
+[a-f0-9]+: 62 e1 7e 08 2d c0 vcvtss2si %xmm0,%r16d
+[a-f0-9]+: 62 e1 7c 08 c2 c0 00 vcmpeqps %xmm0,%xmm0,\(bad\)
+[a-f0-9]+: 62 f1 7e 38 e6 f5 vcvtdq2pd %ymm5,%zmm6
+[a-f0-9]+: 62 f1 7a 38 e6 f5 vcvtdq2pd %xmm5,%ymm6
+[a-f0-9]+: 62 f1 7e 38 7a f5 vcvtudq2pd %ymm5,%zmm6
+[a-f0-9]+: 62 f1 7a 38 7a f5 vcvtudq2pd %xmm5,%ymm6
#pass

4
opcodes/i386-dis-evex-w.h
View File

@ -97,7 +97,7 @@
},
/* EVEX_W_0F7A_P_1 */
{
{ "vcvtudq2pd", { XM, EXEvexHalfBcstXmmq }, 0 },
{ "vcvtudq2pd", { XM, EXEvexHalfBcstXmmq, EXxEVexR64 }, 0 },
{ "vcvtuqq2pd", { XM, EXx, EXxEVexR }, 0 },
},
/* EVEX_W_0F7A_P_2 */
@ -161,7 +161,7 @@
},
/* EVEX_W_0FE6_P_1 */
{
{ "%XEvcvtdq2pd", { XM, EXEvexHalfBcstXmmq }, 0 },
{ "%XEvcvtdq2pd", { XM, EXEvexHalfBcstXmmq, EXxEVexR64 }, 0 },
{ "vcvtqq2pd", { XM, EXx, EXxEVexR }, 0 },
},
/* EVEX_W_0FE7 */

3
opcodes/i386-dis.c
View File

@ -14412,6 +14412,7 @@ OP_Rounding (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED)
if (ins->modrm.mod != 3 || !ins->vex.b)
return true;
ins->evex_used |= EVEX_b_used;
switch (bytemode)
{
case evex_rounding_64_mode:
@ -14419,11 +14420,9 @@ OP_Rounding (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED)
return true;
/* Fall through. */
case evex_rounding_mode:
ins->evex_used |= EVEX_b_used;
oappend (ins, names_rounding[ins->vex.ll]);
break;
case evex_sae_mode:
ins->evex_used |= EVEX_b_used;
oappend (ins, "{");
break;
default: