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Add a sparc simulator with the sparc bareboard target.

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gdb/ChangeLog:

        * configure.tgt (sparc-*-*): Set gdb_sim to ../sim/erc32/libsim.a.
        (sparc-*-rtems*): Delete, now redundant with the sparc-*-* case.
This commit is contained in:
Joel Brobecker 2010-09-28 21:46:09 +00:00
parent 6e1bb179c2
commit 0ac7be2557
2 changed files with 6 additions and 5 deletions
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5
gdb/ChangeLog
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@ -1,3 +1,8 @@
2010-09-28 Joel Brobecker <brobecker@adacore.com>
* configure.tgt (sparc-*-*): Set gdb_sim to ../sim/erc32/libsim.a.
(sparc-*-rtems*): Delete. Now redundant with sparc-*-*.
2010-09-28 Joel Brobecker <brobecker@adacore.com>
* NEWS: Announce Ravenscar Profile support.

6
gdb/configure.tgt
View File

@ -514,15 +514,11 @@ sparc-*-solaris2* | sparcv9-*-solaris2* | sparc64-*-solaris2*)
gdb_target_obs="sparc64-tdep.o sparc64-sol2-tdep.o sparc-tdep.o \
sparc-sol2-tdep.o sol2-tdep.o solib.o solib-svr4.o"
;;
sparc-*-rtems*)
# Target: SPARC embedded with simulator
gdb_target_obs="sparc-tdep.o"
gdb_sim=../sim/erc32/libsim.a
;;
sparc-*-*)
# Target: SPARC
gdb_target_obs="sparc-tdep.o ravenscar-thread.o \
ravenscar-sparc-thread.o"
gdb_sim=../sim/erc32/libsim.a
;;
sparc64-*-*)
# Target: UltraSPARC