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aarch64: Relax check for RNG system registers

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FEAT_RNG is an optional Armv8.5-A extension, but it can be backported
to earlier architectures as well.  GAS previously made the RNG registers
conditional on having both armv8.5-a and +rng, but only +rng should be
required.

This seems to be the only feature that was handled like this.

opcodes/
	* aarch64-opc.c (SR_RNG): Don't require V8_5.

gas/
	* testsuite/gas/aarch64/rng-1.s, testsuite/gas/aarch64/rng-1.d: New
	test.
This commit is contained in:
Richard Sandiford 2022-03-31 17:51:16 +01:00
parent fa8a0804b8
commit 025f768ffc
3 changed files with 14 additions and 1 deletions
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10
gas/testsuite/gas/aarch64/rng-1.d Normal file
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@ -0,0 +1,10 @@
#source: rng-1.s
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0+ <.*>:
.*: d53b2405 mrs x5, rndr
.*: d53b2426 mrs x6, rndrrs

3
gas/testsuite/gas/aarch64/rng-1.s Normal file
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@ -0,0 +1,3 @@
.arch armv8.4-a+rng
mrs x5, rndr
mrs x6, rndrrs

2
opcodes/aarch64-opc.c
View File

@ -3974,7 +3974,6 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
SYSREG ((n), (e), (f) | F_ARCHEXT, \
AARCH64_FEATURE_##fe1 | AARCH64_FEATURE_##fe2)
#define SR_RNG(n,e,f) SR_FEAT2(n,e,f,RNG,V8_5)
#define SR_V8_1_A(n,e,f) SR_FEAT2(n,e,f,V8_A,V8_1)
#define SR_V8_4_A(n,e,f) SR_FEAT2(n,e,f,V8_A,V8_4)
@ -3994,6 +3993,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
#define SR_LOR(n,e,f) SR_FEAT (n,e,f,LOR)
#define SR_PAN(n,e,f) SR_FEAT (n,e,f,PAN)
#define SR_RAS(n,e,f) SR_FEAT (n,e,f,RAS)
#define SR_RNG(n,e,f) SR_FEAT (n,e,f,RNG)
#define SR_SME(n,e,f) SR_FEAT (n,e,f,SME)
#define SR_SSBS(n,e,f) SR_FEAT (n,e,f,SSBS)
#define SR_SVE(n,e,f) SR_FEAT (n,e,f,SVE)