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Skip ARM v8 tests for COFF based targets.
2016-01-20 23:00:57 +08:00
2016-01-20 Nick Clifton <nickc@redhat.com>
PR 19458
* testsuite/gas/arm/armv8_2-a.d: Skip for COFF based targets.
* testsuite/gas/arm/archv8m-main.d: Likewise.
* testsuite/gas/arm/archv8m-base.d: Likewise.
[AArch64] Reject invalid immediate operands to MSR UAO In the instruction to write to the ARMv8.2 PSTATE field UAO, MSR UAO, #<imm>, the immediate should be either 0 or 1 but GAS accepts any unsigned 4-bit integer. This patch implements the constraint on the immediate, generating an error if the immediate operand is invalid, and adds tests for the illegal forms. opcodes/ 2016-01-20 Matthew Wahab <matthew.wahab@arm.com> * aarch64-opc.c (operand_general_constraint_met_p): Check validity of MSR UAO immediate operand. gas/ 2016-01-20 Matthew Wahab <matthew.wahab@arm.com> * testsuite/gas/aarch64/armv8_2-a-illegal.d: New. * testsuite/gas/aarch64/armv8_2-a-illegal.l: New. * testsuite/gas/aarch64/armv8_2-a-illegal.s: New. Change-Id: Ibdec4967c00b1ef3be9dbc43d23b2c70d1a0b28c
2016-01-20 22:25:46 +08:00
2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
* testsuite/gas/aarch64/armv8_2-a-illegal.d: New.
* testsuite/gas/aarch64/armv8_2-a-illegal.l: New.
* testsuite/gas/aarch64/armv8_2-a-illegal.s: New.
Add support for an ARM specific 'y' section attribute flag to mark the section as NOREAD. bfd/ChangeLog: * elf32-arm.c ((elf32_arm_special_sections): Remove catch of noread section using '.text.noread' pattern. gas/ChangeLog: * config/obj-elf.c (obj_elf_change_section) : Allow arm section with SHF_ARM_NOREAD section flag. * config/tc-arm.h (md_elf_section_letter) : Implement this hook to handle letter 'y'. (arm_elf_section_letter) : Declare it. * config/tc-arm.c (arm_elf_section_letter): Handle letter 'y' to set SHF_ARM_NOREAD section flag. * doc/c-arm.texi (ARM section attribute 'y'): Document it. gas/testsuite/ChangeLog: * gas/arm/section-execute-only.s: New test case. * gas/arm/section-execute-only.d: Expected output. ld/testsuite/ChangeLog: * ld-arm/thumb1-noread-not-present-mixing-two-section.s: Add 'y' attribute usage. * ld-arm/thumb1-noread-present-one-section.s: Likewise. * ld-arm/thumb1-noread-present-two-section.s: Likewise. * ld-arm/thumb1-input-section-flag-match.s: Likewise. binutils/ChangeLog: * readelf.c (get_elf_section_flags): Display y letter for section with SHF_ARM_NOREAD section flag in readelf section output. (process_section_headers): Add y letter in readelf section output key mapping for ARM architecture.
2016-01-20 20:53:50 +08:00
2016-01-20 Mickael Guene <mickael.guene@st.com>
Terry Guo <terry.guo@arm.com>
* config/obj-elf.c (obj_elf_change_section) : Allow arm section with
SHF_ARM_NOREAD section flag.
* config/tc-arm.h (md_elf_section_letter) : Implement this hook to
handle letter 'y'.
(arm_elf_section_letter) : Declare it.
* config/tc-arm.c (arm_elf_section_letter): Handle letter 'y' to set
SHF_ARM_NOREAD section flag.
* doc/c-arm.texi (ARM section attribute): Document the 'y' attribute.
* testsuite/gas/arm/section-execute-only.s: New test case.
* testsuite/gas/arm/section-execute-only.d: Expected output.
MIPS: Remove remnants of 48-bit microMIPS instruction support The POOL48A major opcode was defined in early revisions of the 64-bit microMIPS ISA, has never been implemented, and was removed before the 64-bit microMIPS ISA specification[1] has been finalized. This complements commit a6c7053929dd ("MIPS/opcodes: Remove microMIPS 48-bit LI instruction"). References: [1] "MIPS Architecture for Programmers, Volume II-B: The microMIPS64 Instruction Set", MIPS Technologies, Inc., Document Number: MD00594, Revision 3.06, October 17, 2012, Table 6.2 "microMIPS64 Encoding of Major Opcode Field", p. 578 gas/ * config/tc-mips.c (micromips_insn_length): Remove the mention of 48-bit microMIPS instructions. gdb/ * mips-tdep.c (mips_insn_size): Remove 48-bit microMIPS instruction support. (micromips_next_pc): Likewise. (micromips_scan_prologue): Likewise. (micromips_deal_with_atomic_sequence): Likewise. (micromips_stack_frame_destroyed_p): Likewise. (mips_breakpoint_from_pc): Likewise. opcodes/ * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS instruction support.
2016-01-19 05:29:37 +08:00
2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
* config/tc-mips.c (micromips_insn_length): Remove the mention
of 48-bit microMIPS instructions.
Provide AC_PROG_LEX that copes with LEX=missing from top-level config/ PR binutils/19481 * override.m4 (AC_PROG_LEX): Define. binutils/ * configure: Regenerate. gas/ * configure: Regenerate. ld/ * configure: Regenerate.
2016-01-18 13:36:49 +08:00
2016-01-18 Alan Modra <amodra@gmail.com>
* configure: Regenerate.
Regen configure Picks up 2016-01-12 libtool.m4 change. bfd/ * configure: Regenerate. binutils/ * configure: Regenerate. gas/ * configure: Regenerate. gprof/ * configure: Regenerate. ld/ * configure: Regenerate. opcodes/ * configure: Regenerate.
2016-01-17 09:50:55 +08:00
2016-01-17 Alan Modra <amodra@gmail.com>
* configure: Regenerate.
m68hc11/12 and xgate config.sub weirdness Oddly, config.sub converts a duple ending in -elf for these target to -unknown-none, which means they aren't seen as elf targets by binutils. So, counter that. This exposes a number of testsuite issues (ones you would have seen if configuring with a full triple, say m68hc11-unknown-elf). binutils/ * testsuite/lib/binutils-common.exp (is_elf_format): Return true for m68hc11/12 and xgate triples. gas/ * testsuite/gas/cfi/cfi.exp: Exclude m68hc11/12 from m68k test. ld/ * testsuite/lib/ld-lib.exp (check_shared_lib_support): Exclude xgate. * testsuite/ld-elf/endsym.d: xfail m68hc11/12 and xgate. * testsuite/ld-elf/pr14156a.d: Likewise. * testsuite/ld-elf/pr14926.d: Don't run for m68hc11/12 and xgate. * testsuite/ld-elf/sec64k.exp: Likewise.
2016-01-17 09:43:43 +08:00
2016-01-17 Alan Modra <amodra@gmail.com>
* testsuite/gas/cfi/cfi.exp: Exclude m68hc11/12 from m68k test.
Fix display of RL78 MOVW instructions that use the stack pointer. * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw instructions that can support stack pointer operations. * rl78-decode.c: Regenerate. * rl78-dis.c: Fix display of stack pointer in MOVW based instructions. * testsuite/gas/rl78/sp-relative-movw.s: New test. * testsuite/gas/rl78/sp-relative-movw.d: Expected disassembly. * testsuite/gas/rl78/rl78.exp: Run the new test.
2016-01-15 00:23:35 +08:00
2016-01-14 Nick Clifton <nickc@redhat.com>
* testsuite/gas/rl78/sp-relative-movw.s: New test.
* testsuite/gas/rl78/sp-relative-movw.d: Expected disassembly.
* testsuite/gas/rl78/rl78.exp: Run the new test.
[AArch64] Fix missing architecture checks for ARMv8.2 system registers. Some of the RAS system registers added to binutils as part of the ARMv8.2 support are missing the feature checks to warn when they aren't supported by the target. This patch adds the missing feature checks with a test to check that the correct warnings are given for all the ARMv8.2 system registers. gas/ 2016-01-14 Matthew Wahab <matthew.wahab@arm.com> * testsuite/gas/aarch64/illegal-sysreg-2.l: New. * testsuite/gas/aarch64/illegal-sysreg-2.d: New. opcodes/ 2016-01-14 Matthew Wahab <matthew.wahab@arm.com> * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals testing for RAS support. Add checks for erxfr_el1, erxctlr_el1, erxtatus_el1 and erxaddr_el1. Change-Id: I66b590ea49c1eb6b0e5c93e0dc2bc9c4e79a52fe
2016-01-14 18:55:11 +08:00
2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
* testsuite/gas/aarch64/illegal-sysreg-2.l: New.
* testsuite/gas/aarch64/illegal-sysreg-2.d: New.
Nios II/GAS: Fix build error in `output_movia' Fix: cc1: warnings being treated as errors .../gas/config/tc-nios2.c: In function 'output_movia': .../gas/config/tc-nios2.c:3474: warning: 'code' may be used uninitialized in this function make[4]: *** [tc-nios2.o] Error 1 seen with GCC 4.1.2 and 4.4.7. gas/ * config/tc-nios2.c (output_movia): Preset `code' to 0.
2016-01-14 04:58:29 +08:00
2016-01-13 Maciej W. Rozycki <macro@imgtec.com>
* config/tc-nios2.c (output_movia): Preset `code' to 0.
Remove spurious condition in test for closing parenthesis. * config/tc-h8300.c (get_operand): Remove spurious condition in test for closing parenthesis.
2016-01-14 01:47:34 +08:00
2016-01-13 Yoshinori Sato <ysato@users.sourceforge.jp>
* config/tc-h8300.c (get_operand): Remove spurious condition in
test for closing parenthesis.
[ARM] Support ARMv8.2 RAS extension. The ARMv8.2 architecture includes the RAS extension which adds an instruction, ESB, and a number of coprocessor registers. This patch adds the instruction to binutils, making it available when -march=armv8.2-a is selected. It also adds tests for the instruction and for the coprocessor registers. gas/ 2016-01-12 Matthew Wahab <matthew.wahab@arm.com> * config/tc-arm.c (arm_ext_v8_2): New. (insns): Add "esb". * testsuite/gas/arm/armv8_2-a.d: New. * testsuite/gas/arm/armv8_2-a.s: New. opcodes/ 2016-01-12 Matthew Wahab <matthew.wahab@arm.com> * arm-dis.c (arm_opcodes): Add "esb". (thumb_opcodes): Likewise. Change-Id: I67f3d70789db78d1c66a56c4994675f99ac15e34
2016-01-13 00:35:30 +08:00
2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-arm.c (arm_ext_v8_2): New.
(insns): Add "esb".
* testsuite/gas/arm/armv8_2-a.d: New.
* testsuite/gas/arm/armv8_2-a.s: New.
PowerPC gas test vsx3 Tweak for padding, now present for COFF. * testsuite/gas/ppc/vsx3.d: Accept nop padding.
2016-01-12 15:50:26 +08:00
2016-01-12 Alan Modra <amodra@gmail.com>
* testsuite/gas/ppc/vsx3.d: Accept nop padding.
Delete opcodes that have been removed from ISA 3.0. opcodes/ * ppc-opc.c <xscmpnedp>: Delete. <xvcmpnedp>: Likewise. <xvcmpnedp.>: Likewise. <xvcmpnesp>: Likewise. <xvcmpnesp.>: Likewise. gas/ * testsuite/gas/ppc/power9.d <xscmpnedp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp.>: Delete tests. * testsuite/gas/ppc/power9.s: Likewise. * testsuite/gas/ppc/vsx3.d: Likewise. * testsuite/gas/ppc/vsx3.s: Likewise.
2016-01-12 01:54:58 +08:00
2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
* testsuite/gas/ppc/power9.d <xscmpnedp, xvcmpnedp, xvcmpnedp.,
xvcmpnesp, xvcmpnesp.>: Delete tests.
* testsuite/gas/ppc/power9.s: Likewise.
* testsuite/gas/ppc/vsx3.d: Likewise.
* testsuite/gas/ppc/vsx3.s: Likewise.
m68k: fix constraints of move.[bw] for ISA_B/C For ISA_B/C only the combination #,d(An) is allowed in addition to the ISA_A combinations for move.b and move.w (and pc-relative is never allowed as destination). opcodes/ PR gas/13050 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in addition to ISA_A. gas/ PR gas/13050 * testsuite/gas/m68k/all.exp: Add tests p13050-1 and p13050-2. * testsuite/gas/m68k/p13050-1.s: New file. * testsuite/gas/m68k/p13050-2.d: New file. * testsuite/gas/m68k/p13050-2.s: New file.
2016-01-08 18:38:00 +08:00
2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
PR gas/13050
* testsuite/gas/m68k/all.exp: Add tests p13050-1 and p13050-2.
* testsuite/gas/m68k/p13050-1.s: New file.
* testsuite/gas/m68k/p13050-2.d: New file.
* testsuite/gas/m68k/p13050-2.s: New file.
bfd/arc: Add R_ prefix to all relocation names The convention within for relocation names is that they start with the string "R_", however, this is not so for ARC for the display names of relocations, however, internally, the names for the relocations types do have the 'R_' prefix. I suspect that the missing 'R_' on the output strings was an oversight, as I can't see any comment to the contrary. To bring ARC into line with other targets, this commit adds the 'R_' prefix to the output strings used for relocation names, and updates all of the assembler tests where this was exposed. bfd/ChangeLog: * elf32-arc.c (reloc_type_to_name): Change ARC_RELOC_HOWTO to place 'R_' before the reloc name returned. (elf_arc_howto_table): Change ARC_RELOC_HOWTO to place 'R_' before the relocation string. gas/ChangeLog: * testsuite/gas/arc/adc.d: Add 'R_' prefix to relocation names. * testsuite/gas/arc/add.d: Likewise. * testsuite/gas/arc/and.d: Likewise. * testsuite/gas/arc/asl.d: Likewise. * testsuite/gas/arc/asr.d: Likewise. * testsuite/gas/arc/bic.d: Likewise. * testsuite/gas/arc/extb.d: Likewise. * testsuite/gas/arc/extw.d: Likewise. * testsuite/gas/arc/j.d: Likewise. * testsuite/gas/arc/jl.d: Likewise. * testsuite/gas/arc/ld2.d: Likewise. * testsuite/gas/arc/lsr.d: Likewise. * testsuite/gas/arc/mov.d: Likewise. * testsuite/gas/arc/or.d: Likewise. * testsuite/gas/arc/pcl-relocs.d: Likewise. * testsuite/gas/arc/pcrel-relocs.d: Likewise. * testsuite/gas/arc/pic-relocs.d: Likewise. * testsuite/gas/arc/plt-relocs.d: Likewise. * testsuite/gas/arc/rlc.d: Likewise. * testsuite/gas/arc/ror.d: Likewise. * testsuite/gas/arc/rrc.d: Likewise. * testsuite/gas/arc/sbc.d: Likewise. * testsuite/gas/arc/sda-relocs.d: Likewise. * testsuite/gas/arc/sda-relocs2.d: Likewise. * testsuite/gas/arc/sexb.d: Likewise. * testsuite/gas/arc/sexw.d: Likewise. * testsuite/gas/arc/st.d: Likewise. * testsuite/gas/arc/sub.d: Likewise. * testsuite/gas/arc/tls-relocs.d: Likewise. * testsuite/gas/arc/xor.d: Likewise.
2016-01-05 22:46:39 +08:00
2016-01-06 Andrew Burgess <andrew.burgess@embecosm.com>
* testsuite/gas/arc/adc.d: Add 'R_' prefix to relocation names.
* testsuite/gas/arc/add.d: Likewise.
* testsuite/gas/arc/and.d: Likewise.
* testsuite/gas/arc/asl.d: Likewise.
* testsuite/gas/arc/asr.d: Likewise.
* testsuite/gas/arc/bic.d: Likewise.
* testsuite/gas/arc/extb.d: Likewise.
* testsuite/gas/arc/extw.d: Likewise.
* testsuite/gas/arc/j.d: Likewise.
* testsuite/gas/arc/jl.d: Likewise.
* testsuite/gas/arc/ld2.d: Likewise.
* testsuite/gas/arc/lsr.d: Likewise.
* testsuite/gas/arc/mov.d: Likewise.
* testsuite/gas/arc/or.d: Likewise.
* testsuite/gas/arc/pcl-relocs.d: Likewise.
* testsuite/gas/arc/pcrel-relocs.d: Likewise.
* testsuite/gas/arc/pic-relocs.d: Likewise.
* testsuite/gas/arc/plt-relocs.d: Likewise.
* testsuite/gas/arc/rlc.d: Likewise.
* testsuite/gas/arc/ror.d: Likewise.
* testsuite/gas/arc/rrc.d: Likewise.
* testsuite/gas/arc/sbc.d: Likewise.
* testsuite/gas/arc/sda-relocs.d: Likewise.
* testsuite/gas/arc/sda-relocs2.d: Likewise.
* testsuite/gas/arc/sexb.d: Likewise.
* testsuite/gas/arc/sexw.d: Likewise.
* testsuite/gas/arc/st.d: Likewise.
* testsuite/gas/arc/sub.d: Likewise.
* testsuite/gas/arc/tls-relocs.d: Likewise.
* testsuite/gas/arc/xor.d: Likewise.
Copyright update for binutils
2016-01-01 19:25:12 +08:00
2016-01-01 Alan Modra <amodra@gmail.com>
Update year range in copyright notice of all files.
New 2016 binutils ChangeLog files Note that this does not create bfd/doc/ChangeLog, */testsuite/ChangeLog and include/*/ChangeLog files.
2016-01-01 18:44:31 +08:00
For older changes see ChangeLog-2015 and testsuite/ChangeLog-2015
Copyright (C) 2016 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
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